Stars
Implement a ChatGPT-like LLM in PyTorch from scratch, step by step
A FPGA friendly 32 bit RISC-V CPU implementation
RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
Box64 - Linux Userspace x86_64 Emulator with a twist, targeted at ARM64, RV64 and LoongArch Linux devices
体系结构研讨 + ysyx高阶大纲 (WIP
Two Level Cache Controller implementation in Verilog HDL
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.
转换网易云音乐 ncm 到 mp3 / flac. Convert Netease Cloud Music ncm files to mp3/flac files.
A simple, open source bilingual translation extension & Greasemonkey script (一个简约、开源的 双语对照翻译扩展 & 油猴脚本)
Llama中文社区,Llama3在线体验和微调模型已开放,实时汇总最新Llama3学习资料,已将所有代码更新适配Llama3,构建最好的中文Llama大模型,完全开源可商用
面向开发者的 LLM 入门教程,吴恩达大模型系列课程中文版
🗂️A file list/WebDAV program that supports multiple storages, powered by Gin and Solidjs. / 一个支持多存储的文件列表/WebDAV程序,使用 Gin 和 Solidjs。
This script will allow you to mimic your windows pc as a Galaxy Book laptop, this is usually used to bypass Samsung Notes
Approaching (Almost) Any Machine Learning Problem