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Zero ASIC Corporation
- Cambridge, MA, USA
- www.zeroasic.com
- in/andreasolofsson
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sn-code-inside / EMCSimulationOfElectronicSystems
Forked from Kranichstein/EMCSimulationOfElectronicSystemsThis repository contains simulation models discussed in the Book "EMC Simulation of Electronics Systems" by Andreas Barchanski and Jan Hansen.
HISIM introduces a suite of analytical models at the system level to speed up performance prediction for AI models, covering logic-on-logic architectures across 2D, 2.5D, 3D and 3.5D integration
RISC-V Directed Test Framework and Compliance Suite, RiESCUE
Instant Kubernetes-Native Application Observability
NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.
CSL-KU / firechip
Forked from firesim/firechipTop-Level Project for Firebox SoC, consisting of Rocket, NVDLA, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator used in FireSim.
TuRTLe: A Unified Evaluation of LLMs for RTL Generation 🐢 (MLCAD 2025)
An ultra portable handheld Linux device using Raspberry CM5 unit as Core with 4" 720X720 TFT Touch display and the original blackberry keyboard
CADAM is the open source text-to-CAD web application
VS Code extension for SystemVerilog design navigation and RTL tracing. Seamlessly integrates with waveform viewer for post-simulation debug
Create memory map diagrams directly from linker map files
Flip flop setup, hold & metastability explorer tool
Fixed point math library for SystemVerilog
A minimal tensor processing unit (TPU), inspired by Google's TPU V2 and V1
This repo contains the scripts that are used to model and optimize an optical receiver.
This repo contains introduction of gm/id method and its application to some OTA design examples.
pystateye - A Python Implementation of Statistical Eye Analysis and Visualization
Create real electronics with Typescript and React