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Zero ASIC Corporation
- Cambridge, MA, USA
- www.zeroasic.com
- in/andreasolofsson
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Boilerplate codebase for Embedded FPGA kernel development via YosysHQ & BSV
A curated list of open-source resources for IC design.
AI-native IC design plugin with MCP-EDA — from natural-language intent to verified silicon.
WaveCrux public beta — issue tracking, help, and the public test-fixture corpus. No application source.
A minimal GPU design in Verilog to learn how GPUs work from the ground up
High quality and composable RTL libraries in SystemVerilog
An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics
Sudoless Apple Silicon system monitor (native SwiftUI GUI) with ANE / Media Engine / memory-bandwidth tracking
Param + EDA — a hierarchical configuration system for EDA tooling: config-folder tree with parent/child scoping, lazy variable substitution, and JSON-backed load/save.
Universal bidirectional grammar-driven engine for EDA file formats. One grammar drives parse + save for GDSII, LEF, DEF, Tcl.
An open-source, JEDEC JESD270-4A-compliant HBM4 memory subsystem (controller + PHY-shim + DFT + RAS + security wrapper) tightly coupled to an open RISC-V-native LPU accelerator. Apache-2.0 RTL, CER…
[DEPRECATED → wrightca1/edgenos] AS4610-54T bring-up, now part of the unified multi-arch/multi-ASIC EdgeNOS repo
Zero Board Computer semihosting device reference implementation
The SoC for the introduction to chip design course spring 2026
CoreSmith is a Prompt to GDS Agentic Flow
A collection of agent skills for CAD, robotics and hardware design
A fully featured audio DSP firmware for the Raspberry Pi Pico (RP2040) and Pico 2 (RP2350). Official Discord: https://discord.gg/RCyqxAQ5xS
ARCH hardware description language and compiler