RISC-V: declare FP as an alias of the register X8 #802
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Thanks! According to https://riscv-non-isa.github.io/riscv-elf-psabi-doc/#_dwarf_register_numbers, we're also missing v0-v31, and 64 for the alternate frame return column (but I don't know what name we would give it). |
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Sure, let's do it in a subsequent PR. |
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The register is used as the FP register and documented in that way:
https://msyksphinz-self.github.io/riscv-isadoc/html/regs.html#integer-registers