Stars
AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog
HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI
2025最新悄咪咪收集的10000+个Telegram群合集,附全网最有趣好用的机器人BOT🤖【dianbaodaohang.com】
Browse media content with your own rules on Android TV
《动手学深度学习》:面向中文读者、能运行、可讨论。中英文版被70多个国家的500多所大学用于教学。
SuperPrompt is an attempt to engineer prompts that might help us understand AI agents.
Vim plugin, insert or delete brackets, parentheses, and quotes in pairs
Advance UVM testbench with DPI integration, Assertions, Functional Coverage andHierarchical Sequence
12 Weeks, 24 Lessons, AI for All!
A list of cool features of Git and GitHub.
🚀 Power Your World with AI - Explore, Extend, Empower.
fancyss is a project providing tools to across the GFW on asuswrt/merlin based router.
经济学人(含音频)、纽约客、卫报、连线、大西洋月刊等英语杂志免费下载,支持epub、mobi、pdf格式, 每周更新
A curated list of awesome awesomeness
润学全球官方指定GITHUB,整理润学宗旨、纲领、理论和各类润之实例;解决为什么润,润去哪里,怎么润三大问题; 并成为新中国人的核心宗教,核心信念。
Random instruction generator for RISC-V processor verification
Functional verification project for the CORE-V family of RISC-V cores.
Verilog/SystemVerilog Syntax and Omni-completion
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server