A first and basic iteration of an ongoing interactive C++ Raytracer project.

This project implements a Universal Shift Register with parallel loading in Verilog and includes a testbench to simulate its operation.

This project implements a sequential binary multiplier in Verilog and includes a testbench to simulate its operation. The multiplier uses a simple algorithm to multiply two numbers by repeated addi…

Writing code for some common and basic algorithms as I study them.

Developing a game for the july-aug summerjam competition.