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This project implements a Verilog-based Vending Machine Controller with support for APB configuration, item dispensing, and currency validation. It features FSM control, clock domain synchronization, and is fully synthesizable for FPGA applications.
A Verilog-based RTL design of a configurable vending machine controller with APB configuration, asynchronous input handling, and real-time item dispensing.
This repository features a Verilog-based vending machine controller IP core, supporting multi-clock domain operation, inventory management, and currency denominations. Built with the APB protocol for efficient configuration, it offers smart change calculation and robust error handling. Developed in the SURE ProEd internship training with experts.
This project, developed under SURE Trust, presents a scalable Verilog-based vending machine controller using FSM and modular RTL design. It handles asynchronous inputs, supports APB configuration, and enables real-time dispensing to enhance performance and flexibility.
The project involves the design and analysis of a differential amplifier, a core analog circuit used to amplify the difference between two input signals while rejecting common-mode noise. It was implemented and simulated using Cadence Virtuoso, focusing on parameters like gain, CMRR, and biasing stability.
A Vending Machine Controller is a digital system that manages the operation of a vending machine,including item selection,dispensing and change/refund handling.it ensures correct item delivery based on user input and available balance using sequential logic