Artificial intelligence (AI) is reshaping the semiconductor landscape-both as a fast-growing end market and as a catalyst for innovation across mobile, automotive, networking, industrial and beyond. Taiwan's industry leaders are at the forefront of this transformation, proactively developing next-generation packaging technologies critical to AI semiconductor content.AI workloads are driving demand for specialized chip architectures that can process massive amounts of data quickly and efficiently. In data centers, high-performance AI chips-such as GPUs or AI accelerators-support large-scale model training and inference for applications like AI chatbots. At the edge, devices rely on high-efficiency chips like NPUs to enable real-time decision-making in applications such as autonomous vehicles, smart cameras and mobile devices.This shift in computing architecture depends on advanced packaging. By enabling higher performance and power efficiency through a tighter integration of compute and memory, advanced packaging supports the sophistication and scale of modern AI chips. Taiwan's expertise in advanced packaging and its expansive semiconductor supply chain are accelerating this shift.Why Heterogeneous Integration is Key to PerformanceMoore's Law scaling is becoming more expensive due to the complexity needed to keep increasing transistor counts. As a result, innovation is diversifying. Technologies like high numerical aperture extreme ultraviolet (high-NA EUV) lithography and new transistor designs such as gate all around (GAA) continue to push traditional scaling. Developments with backside power delivery (BPDN) are improving overall raw performance by providing a more stable power supply. Breakthroughs in semiconductor packaging are now playing an increasingly pivotal role.Semiconductor packaging has evolved beyond protecting and connecting chips to powering device performance. At the heart of this shift is heterogeneous integration-the ability to combine multiple chips or chiplets in a single package. This modular approach offers a flexible, cost-effective way to integrate diverse functions in packaging instead of on a single chip, to meet requirements without relying solely on traditional scaling.Advanced Packaging Technologies Enabling AIAI chips are growing in complexity, with some expected to contain up to a trillion transistors per package by the end of the decade. Advanced packaging supports this growth through system-level integration of compute and memory.High bandwidth memory (HBM) plays a key role. By stacking memory vertically and placing it close to the GPU, HBM reduces latency and boosts data transfer speeds while lowering power consumption. Interposers and substrates facilitate efficient communication between components. In many modern AI designs, hundreds of logic and memory chips are integrated into a single high-value package to meet specifications.Credit: KLATo support the growing architectural demands and evolving semiconductor chip requirements, the industry is advancing 2D, 2.5D and 3D packaging architectures-where 2D places chips side-by-side on a substrate, 2.5D arranges them on an interposer and 3D stacks them vertically. Technologies like hybrid bonding, embedded bridges, wafer- and panel-level interposers, glass core substrates and co-packaged optics help to increase interconnect density and improve system performance. These innovations provide new ways to shorten signal paths to increase bandwidth and reduce power loss-critical for AI workloads.Advanced Packaging Innovation Brings Manufacturing ChallengesAs packaging complexity increases, so do manufacturing challenges. More chip designs per package, larger die sizes, smaller features, denser interconnects and new materials all raise the bar for packaging yield management.Credit: KLAWith more components and interconnects placed into a single package, the number of potential failure points increases. A single chip or interconnect defect can compromise the entire multi-die package-resulting in costly yield loss. In this environment, tighter process control becomes essential to ensure high yield and reliability.Heterogeneous integration brings challenges similar to those found in front end semiconductor manufacturing, demanding greater defect sensitivity and tighter metrology precision. KLA addresses these challenges with a comprehensive portfolio of advanced packaging process control and process-enabling solutions-for wafers, panels and components – designed to scale advanced packaging complexity without compromising quality.Evolving 2.5D and 3D packaging architectures create new yield challenges that need improved process and process control solutions.Credit: KLAAI Needs Intelligent IntegrationThe semiconductor industry is anticipated to reach US$1 trillion globally by 2030, according to PwC in November 2024, driven by a wide range of applications-including the rapid growth of AI from data centers to edge devices. AI demands high compute capacity with optimized power use, pushing the boundaries of semiconductor chip design and integration. Taiwan’s semiconductor manufacturers welcome these opportunities.It's widely recognized that 90% of the world's advanced semiconductors are produced in Taiwan, contributing to a combined semiconductor output value that exceeded NT$5 trillion in 2024, up 22.4% from 2023, according to statistics released by the Industrial Technology Research Institute (ITRI). Global demand for AI chips is surging.AI is also driving a diversification of semiconductor content. Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) provide higher power density, faster switching, and better thermal efficiency than silicon, making them increasingly important for efficient power delivery in AI systems.In data center and HPC environments, AI growth is also pushing development in photonics and co-packaged optics for network switches to improve data transfer speeds and energy efficiency. Quantum computing, still in early stages, could eventually reshape how complex AI workloads are processed.Across these domains, advanced packaging serves as the foundation for uniting diverse technologies into compact, high-efficiency systems. Taiwan technology leaders are driving this advanced packaging innovation, and KLA is proud to serve as their collaborative partner.2025 marks the 35th anniversary of KLA's operations in Taiwan. Headquartered in the United States, KLA is a global leader in semiconductor inspection and metrology, with over 15,000 employees worldwide. The expertise and insights cultivated at KLA Taiwan over three decades, in partnership with our valued customers, underscore a commitment to technical excellence in the AI era-when chip manufacturing requirements are more complex and challenging than ever before.The future of semiconductors isn't just about smaller transistors – it's about smarter integration. Packaging has become essential to performance. At the boundaries of Moore's Law, advanced packaging has emerged as the key to meeting next-generation semiconductor device requirements.With deep expertise in process, process control and customer collaboration, KLA is helping the semiconductor industry build what comes next. As AI redefines what's possible, the technologies that support it must evolve just as rapidly. KLA's dedicated team of engineers, physicists and data scientists embraces the scale and significance of this transformation, helping shape the future of semiconductor innovation in the AI age-where advanced packaging plays a pivotal role.

As AI models and computing demands continue to grow exponentially, the biggest challenge in chip design is no longer pure processing power, but the bandwidth gap between processors and memory. Even with continuous improvements in processor performance, if data cannot be delivered in real time, overall system efficiency remains limited.To overcome this bottleneck, Die-to-Die high-speed interconnect and HBM4/PHY IP integration have emerged as critical technologies for next-generation AI and HPC chip designs.Progate Group Corporation(PGC), a member of the TSMC Design Center Alliance (DCA), leverages its ASIC turnkey expertise and participation in the Synopsys IP OEM Program to deliver advanced design capabilities comparable to leading international players-while offering a more cost-effective, high-value service model that helps global customers accelerate AI and HPC deployment and mass production.Technical Highlights: Comprehensive Support from Design to ProductionPGC provides one-stop technical services, supporting clients from chip design to production. The coverage includes high-speed interconnects, memory integration, foundry certifications, and AI/HPC application-oriented designs, helping clients shorten time-to-market efficiently.Die-to-Die Interconnect and Chiplet ArchitecturePGC offers advanced expertise in Die-to-Die interconnect and Chiplet-based system design, supporting 2.5D and 3D integration technologies to enable high-speed, low-latency, and low-power chip-to-chip communication. All solutions are compliant with the Universal Chiplet Interconnect Express (UCIe) standard, ensuring interoperability and scalability across heterogeneous and cross-supply-chain environments.This capability addresses the growing demand for high-bandwidth and flexible multi-die integration, empowering customers to build next-generation Chiplet-based systems with enhanced performance and modularity.HBM4 / PHY IP IntegrationLeveraging Synopsys-certified IP, PGC enables rapid integration of HBM4 memory and PHY interfaces to shorten design cycles while strengthening design reliability. These high-bandwidth memory solutions help design teams overcome data transfer bottlenecks and achieve terabyte-per-second (TB/s) throughput, meeting the stringent performance requirements of AI and high-performance computing (HPC) applications.TSMC DCA Certification AdvantageAs a certified member of TSMC's Design Center Alliance (DCA), PGC provides end-to-end design-to-tape-out support within the TSMC's ecosystem. Customers can leverage TSMC's CyberShuttle multi-project wafer (MPW) program to conduct rapid prototyping and design validation, followed by seamless transition to mass production through PGC's ASIC turnkey services. All designs are fully compatible with advanced packaging technologies such as Wafer-on-Wafer (WoW) and 2.5D/3D integration architectures within major foundry ecosystems, ensuring a smooth and efficient path from prototype to production.AI / HPC Application FocusPGC's dedicated ASIC designs are optimized for AI and high-performance computing (HPC) applications, spanning AI accelerators, data center chips, and high-speed network switch devices. These designs support AI training, HPC simulation, and large-scale data processing workloads, meeting the performance, power, and scalability requirements of next-generation computing environments.Ecosystem IntegrationPGC's services are closely aligned with TSMC's advanced foundry ecosystem, combined with Synopsys-certified EDA and IP solutions, to deliver a complete ASIC turnkey flow covering: High-speed interface IP - ASIC design service - process support - packaging service - verification - testing - mass production.In addition to its own testing equipment and validation capabilities, PGC maintains long-term partnerships with multiple advanced test houses, enabling precise analysis for high-frequency, high-speed interface and advanced-node devices.This level of integration significantly reduces design risk and accelerates time-to-market, while ensuring that the design results are fully compatible with mainstream advanced packaging technologies - such as 2.5D/3D integration and wafer-on-wafer architectures within major foundry ecosystems - as well as international standards including UCIe.PGC delivers high reliability, low risk, and accelerated time-to-production through its comprehensive ASIC turnkey services, allowing customers to focus on differentiated design and market innovation. By leveraging its proven engineering expertise and established partnerships across the semiconductor supply chain, PGC helps customers reduce overall design and ASIC development costs, enhance design success rates, and improve product stability.In addition, PGC provides cross-regional engineering and project management support spanning Taiwan, Japan, China, and the United States - empowering global deployment strategies for AI and HPC applications with consistent quality and technical alignment.PGC provides complete ASIC turnkey services supporting 2.5D/3D advanced packaging technologies.Credit:PGC

In the wake of the AI and Electric Vehicle (EV) era, efficient power supply and conversion have become a critical battleground. For over a decade, 3S Silicon Tech has been deeply committed to developing high-reliability packaging equipment for power devices and modules. Over the past five years, the company's formic acid vacuum reflow oven has gained widespread acclaim from leading international IDMs and the world's largest OSATs. Its remarkable advantages—including low void rates, flux-free soldering, and post-solder cleaning-free processes—effectively resolve metal oxidation issues, establishing 3S as a leading brand for high-end power module reflow packaging.From data to prediction: AI empowers equipment3S Silicon Tech's core technology utilizes AI to build process behavior models, enabling equipment to learn from data, predict, and self-optimize. Through machine learning (ML), the system analyzes vast amounts of data from sources like MES, sales, and SQL databases to identify key process variables.This allows the equipment to learn from past experience and provide precise parameter recommendations, leading to:1. Precise process tuning: The AI model recommends optimal parameters for different product types, ensuring perfect soldering every time. For example, baseline models for heating elements in various temperature zones are established before the equipment leaves the factory. By continuously monitoring the heating elements, the AI uses predictive analysis to issue early warnings before a malfunction occurs, ensuring process stability, preventing unexpected downtime, and even predicting the lifespan of the heating element.2. Yield and quality optimization: AI analysis quantifies the interactive relationships between different parameters and variables. Using a correlation matrix model, it provides optimal parameter recommendations for power modules, effectively boosting yield and product reliability.3. Precise predictive profiling: This technology effectively prevents up to 99.99% of equipment failures, optimizing production efficiency, reducing downtime, and significantly lowering maintenance costs.Green sustainability: Achieving flux-free solderingBeyond intelligence, this new launch also emphasizes sustainability. 3S Silicon Tech's AI-empowered formic acid vacuum reflow oven features a unique flux-free soldering capability. This not only enables a clean and highly reliable soldering process without the need for post-solder cleaning, but also reduces waste by up to 99%, providing a dual benefit of environmental protection and cost control for businesses.3S Silicon Tech sincerely invites you to SEMICON Taiwan 20253S Silicon Tech's AI-empowered formic acid reflow oven offers semiconductor manufacturers a highly efficient and easily implementable solution. This technology is specifically designed to address customers' void rate concerns, clearly demonstrating the immense application value of AI in semiconductor manufacturing. It further helps companies achieve a comprehensive upgrade in yield stability, predictive analysis, and maintenance optimization.3S Silicon Tech cordially invites all industry professionals and partners to visit our Booth Q5338 at Hall 2 of the Nangang Exhibition Center during SEMICON Taiwan from September 10-12, 2025. Come experience our cutting-edge AI and formic acid reflow oven technology and witness the journey toward smart, optimized manufacturing. For more information, please visit the 3S Silicon Tech Official Website.

The age of AI greatly boosts Semiconductor manufacturing demands in advanced packaging. As packaging complexity increases (more I/O, smaller bump pitches, higher density), making the integration of nano-precision platforms and thermal stabilization in Semiconductor automation a strategic investment.PBA Systems will debut its latest nano-precision dual gantry platform series and metrology stage series designed for CoWoS and smart manufacturing requirements, to be showcased in the 2025 SEMICON Taiwan exhibition, located at Hall 2, 1st floor, Booth Q5536 in the Taipei Nangang Exhibition Center from Sep. 10th to Sep. 12th.For semiconductor advanced packaging technologyThe technology drivers of Heterogeneous Integration Architectures in Semiconductor advanced packaging involve different materials and bump density, and drive different process equipment requirements. From 2.5D to 3D development, semiconductor advanced Packaging may require different Die Attachment Processes, from high-speed, high-accuracy to thermal compressed and hybrid bonding. These processes require highly precise, custom-designed platforms for automation.PBA's latest dual gantry nano precision platform series offers high precision solutions for flip-chip bonding, thermo-compression bonding, and hybrid bonding. Its special dual-gantry architecture facilitates special simultaneous, multi-axis motion controls for high-speed die bonding and precision assembly applications, with less floor space requirements and high yield rates. PBA offers fast custom design services.Key advantages of PBA dual gantry series include:Nanometer-level assembly accuracy to boost high throughput and yield rates.Design with controllable suppression of thermal expansion minimizes yield loss.Scalability to support heterogeneous integration and next-generation chip architectures.Custom-designed High-speed, high-precision positioning to ensure both productivity and process stability.Flexible joint design, reduction of vibrations and resonance, improved accuracyPowered by PBA motors, an advancement from traditional ball-screw or belt motors, enjoyed low cogging force with anti-cogging features.In addition to offering fast custom design solutions, PBA also offers 250,000 square feet of contract manufacturing space for flexible manufacturing plans for worldwide system partners.PBA will also showcase its Z-Axis High-Precision Positioning Stage series at the upcoming SEMICON Taiwan show. This stage series offers ideal motion solutions for vertical movement in semiconductor automation with limited space and high-precision requirements, ideal for AOI inspection and PCB pick-and-place applications.Leader in nano-precision stage and gantry solutions for automationPBA Korea specializes in high-precision stage technologies. PBA Group further merged Korea SOONHAN Engineering, Korea's leading manufacturer of precision stage systems for 31 years, powering PBA Group to become one of the world's top precision stage experts that provide dynamic custom design and manufacturing services. PBA Systems is also a technology-capable partner of Mitsubishi Electric and Applied Materials. PBA group's contract OEM manufacturing experiences for many world-renowned semiconductor equipment partners in Asia also differentiate the group from regional local vendors.Meet the expert tech talkThe SEMICON Taiwan show will feature several advanced technical talk sessions in dedicated show floor booth sections. In the Smart Manufacturing Expo section, PBA will participate in the Expert Talk session on September 12, located at Talk Booth Q5356, 1F, Nan-Gang Exhibition Hall 2. PBA will be presenting the highly anticipated speech topic: PBA's Dual-Gantry Precision Platform Series for Semiconductor Advanced Packaging and Metrology Equipment. This is a rare opportunity for industry professionals to gain smart manufacturing insights directly from the expert—don't miss it.Global reach, local serviceHeadquartered in Singapore, PBA Group has R&D and sales offices in Singapore, Taiwan, South Korea, Japan, Malaysia, China, the United States, and Europe. The Taiwan branch offers a one-stop solution, providing everything from direct drive motors and modules to custom-integrated, high-precision platform systems. This ensures fast, flexible, and innovative smart manufacturing services for both local and international clients.For system partners with product customization or procurement inquiries, please contact.PBA released their latest Nano-Precision Dual Gantry Stage Platform Series for Heterogeneous Semiconductor Advanced Packaging and Metrology Equipment. To Be Debuted at the 2025 SEMICON Taiwan. PBA

Chroma ATE Inc. will participate in SEMICON Taiwan 2025, presenting a full suite of breakthrough semiconductor test solutions. The showcase will focus on applications in AI chips, advanced packaging, high-performance computing (HPC), and AIoT—designed to meet the evolving demands of next-generation semiconductor testing.Advanced Packaging 3D Metrology Solutions - Chroma 7980/7981The Chroma 7980/7981 systems feature Chroma's patented BLiSTM technology, purpose-built for nanoscale critical dimension measurement. These systems incorporate application-optimized algorithms and user interfaces to deliver high-speed surface profiling and fast auto-focusing capabilities, along with large-area image stitching. They address key needs in advanced packaging processes such as TSV/VIA, RDL, probe mark inspection, overlay, and sub-micron surface profiling. Additionally, Chroma's inspection and in-situ AOI solutions, like the Chroma 7961, enable real-time defect detection and inline process quality control.AI-Driven Test Platform - Chroma 3680When hardware innovation meets AI-enhanced software, a new era of automated test equipment emerges.The Chroma 3680 platform is purpose-built to meet the demands of modern semiconductor testing, combining high-efficiency algorithms with a modular architecture to redefine flexibility and efficiency in test systems.This platform features a unified and intelligent system architecture that enables real-time, accurate test program conversion—reducing migration time and manpower by over 80%. It addresses key pain points such as poor portability of legacy test programs and time-consuming debugging processes, supporting diverse chip architectures with a concrete and effective solution.Chroma 3680 supports modular expansion to meet increasingly diverse future requirements, and can be equipped with the HDRF2 module for one-click activation of RF testing, greatly simplifying test setup. The overall platform is designed for high scalability and flexibility, enabling fast adaptation across different product lines, application needs, and test scales—streamlining both development and validation processes.Tri-Temp System-Level Test SolutionsChroma's 3100 and 3200 pick-and-place handler solutions, paired with the 31000R/31000K Series Temperature Forcing Systems, deliver a powerful, fully integrated platform to meet the unprecedented challenges of AI-era device testing.The advanced 3110, 3200, 3200-HD, 3210, and 3260 pick-and-place systems feature industry-leading SLT testing solutions, including a high-precision contact force system, CVOT (Chroma Virtual Operation Tools) for intelligent yield optimization, integrated device protection features, and a universal change kit design for fast, flexible device conversion. These systems ensure superior test quality through scalable architecture that integrates seamlessly into both engineering and high-volume production environments.The intelligent 31000R thermal solution provides a wide and stable temperature control range from –40°C to 150°C, with high-power dissipation capability up to 2,900 W. It features advanced thermal performance with direct phase-change cooling, intelligent power monitoring, and high-precision multi-zone control. This makes it ideal for AI, HPC, and thermally demanding automotive applications.SuperSizer Nano-Particle Monitoring SystemsPowered by advanced aerosol particle measurement technology, the SuperSizer system delivers precise monitoring of nano-sized particles ranging from 3 nm to 20 nm, overcoming the limitations of conventional optical systems, especially bubble interference.The SuperSizer II, V, VI, and VII generations have been widely adopted for real-time monitoring of critical wet chemicals such as CMP slurry, isopropyl alcohol (IPA), hydrogen peroxide/pure water, and ammonia solutions. The latest addition to the series, SuperSizer VIII, is purpose-built for hydrochloric acid monitoring—extending the system's capabilities into more aggressive chemistries.By enabling in-line and real-time particle detection, the SuperSizer platform helps minimize wafer defects, ensure chemical purity, and improve overall process yield.Visit Chroma at SEMICON Taiwan 2025From September 10–12, Chroma ATE will exhibit at SEMICON Taiwan 2025 at the Taipei Nangang Exhibition Center, Hall 1, 1F (Booth K2876).In addition to showcasing our wide-ranging portfolio of test solutions, Chroma will present at the Semiconductor Advanced Inspection and Metrology Forum. Our presentation "White-Light Interferometry Integration with Electromagnetic Simulation and Digital Light-Field Control for Advanced Packaging" will explore innovative applications of advanced packaging inspection and metrology technologies.Join us at SEMICON Taiwan 2025 and connect with our team to exchange insights on the future of test and innovation.Chroma ATE Inc. will participate in SEMICON Taiwan 2025, presenting a full suite of breakthrough semiconductor test solutions. The showcase will focus on applications in AI chips, advanced packaging, high-performance computing (HPC), and AIoT—designed to meet the evolving demands of next-generation semiconductor testing. Chroma ATE Inc.

Tescan Group proudly introduces its new global brand platform The Art of Discovery at this year's Microscopy Conference (MC) in Karlsruhe, Germany. Built on the belief that beauty lies in what is yet to be discovered, it reflects Tescan's ambition to be a trusted growth partner in science. Following its global introduction at MC 2025, the brand platform will make its Asia-Pacific debut at SEMICON Taiwan (September 8–12, 2025).This rebrand signals a pivotal step in Tescan' s shift toward a more integrated model — combining advanced technology, workflow-focused solutions, expert support, and a community built on shared knowledge. This represents Tescan's broader focus on delivering customer-centric solutions rather than simply providing technology.New Aspiration, Approach and Drivers"Our brand transformation captures who we are today — a company built on strong partnerships, driven by results, fueled by innovation, and committed to delivering purposeful solutions that put users first," says Sirine Assaf, Chief Revenue Officer at Tescan. Guided by its core principles, Tescan sets a clear ambition: to empower customers and partners with tools, software, and services built for what's next. At the heart of this transformation is a simple idea — removing the barriers between a question and its discovery. "This transformation isn't just about technology. It reflects a continuous evolution in how we think, how we work together, and how we enable the scientific community with timely solutions to fasten their discoveries," says Assaf.Automation and InnovationBuilding on last year's successful introduction of multiple new instruments (including the plasma FIB-SEM Amber X 2) — Tescan continues its innovation journey across the entire portfolio. This year, the company's primary focus is on enhancing automation throughout all its products, aiming to streamline scientists' workflows at a time when speed and accuracy are more important than ever. Alongside its new brand platform, Tescan is also unveiling two new software solutions: AutoSection and TEM AutoPrep PRO – Inverted & Planar Lamella Automation. "Our primary goal in this area is to reduce the time from instrument purchase to when users can fully leverage its capabilities. We accomplish this through intelligent automation, deep application expertise, and close collaboration with our customers," closes Bruno Janssens, Chief Strategy Officer at Tescan.CEO PerspectiveJean-Charles Chen, CEO of Tescan Group, commented: "This is much more than a cosmetic redesign. It's a strategic repositioning that reflects the way we see how science is evolving, and how Tescan is evolving with it. We're aligning with a new era of scientific discovery by enabling better-integrated workflows, faster time from question to insight, and a tighter connection between our technology and our users' needs. It's a shift from being a product-oriented company to becoming a solutions partner. This means more automation, smarter software, and a mindset rooted in customer outcomes. The new look is simply a reflection of that deeper change.”APAC RolloutFollowing an exclusive offline preview at the International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) in early August, Tescan will make the APAC debut of its new brand at SEMICON Taiwan (September 8–12, 2025). As part of the Semiconductor Advanced Inspection and Metrology Forum, Hervé Macé, Global Business Development Director for Semiconductors, will speak on September 12 on Development of New Workflows to Address Metrology and Failure Analysis Challenges at Macroscale, Microscale and Nanoscale.Venue: 701F, 7F, Taipei Nangang Exhibition Center Hall 2. 

With the rapid expansion of artificial intelligence (AI), high-performance computing (HPC), and data center applications, the demand for high-speed chip-to-chip interconnects has intensified, driving advanced packaging technologies toward higher density and lower latency. Heterogeneous integration architectures such as CoWoS, CoPoS, and HBM are accelerating in adoption, while Thermo-Compression Bonding (TCB) has emerged as a critical process technology thanks to its advantages of low thermal stress and high bonding strength.Global equipment leaders including BESI, ASMPT, Kulicke & Soffa, Hanmi, and Shibaura are actively investing in TCB, underscoring its growing strategic importance.In response to this market momentum, Taiwan-based precision equipment manufacturer Micraft System Plus Co., Ltd. (MSP＋) has officially announced the launch of its first self-developed TCB bonder, which will make its public debut at SEMI Taiwan 2025. Purpose-built for heterogeneous integration applications, the system integrates Micraft’s years of expertise in precision automation and features localized heating, programmable temperature control, pressure sensing, platform leveling, and micron-level alignment—marking a new milestone for Taiwan’s equipment industry in advanced semiconductor processes.According to Micraft, the system employs multiple independently controlled heating modules, enabling rapid localized heating and cooling to minimize the thermal-affected zone and reduce warpage risk. Leveraging its extensive wafer bonder experience with optical semiconductor customers, the company has incorporated pressure sensing and leveling technologies that dynamically adjust bonding pressure and thermal profiles. This ensures uniform bonding quality and high yield, particularly for fine-pitch, low thermal stress, high-precision, and high-throughput packaging requirements.The bonder is further equipped with advanced optical alignment modules from Carl Zeiss, combined with Micraft’s proprietary optical system and cutting-edge vision algorithms. This enables alignment accuracy of better than 1 μm. In addition, the system offers high process flexibility, supporting a wide range of materials and carrier formats to meet diverse requirements of OSATs and IDMs.Micraft has long been a pioneer in the MicroLED equipment market, with its laser mass transfer and repair platforms already adopted and mass-produced by Taiwan’s two leading panel makers. By extending its expertise into advanced packaging, Micraft leverages its core strengths in precision motion control, optical integration, and thermal processing. Several leading domestic and international semiconductor customers have already initiated tool qualification programs.Looking ahead, Micraft plans to continue developing next-generation wafer-level bonding equipment, including Hybrid Bonding and Co-Packaged Optics (CPO), to address the rising demands of 3D IC and chiplet architectures. Through these efforts, Micraft aims to strengthen Taiwan’s role in the global advanced packaging supply chain and further advance the localization and globalization of Taiwan’s precision equipment technologies.Micraft System Plus warmly invites industry partners to visit its booth at SEMI Taiwan 2025 to explore collaborative opportunities and witness the next generation of bonding solutions.

ASMPT will be exhibiting at SEMICON Taiwan from September 10 to 12, 2025. The theme of the presentation at Booth L0716 at Level 4, TaiNEX 1 in Taipei is: "Empower the Intelligence Revolution." This refers to the driving forces for new chip technologies like AI, smart mobility, and hyperconnectivity. As a leading provider of advanced packaging and semiconductor assembly solutions, ASMPT enables its customers to develop cutting-edge AI technologies, supporting both high-performance AI chips that integrate advanced memory technologies like HBM and efficient components for edge devices. ASMPT will showcase three machines at SEMICON Taiwan: the new ALSI LASER Platform, the fine-pitch wire bonding solution AERO PRO, and the SIPLACE CA2 uniting semiconductor and SMT processes.ASMPT will be exhibiting at SEMICON Taiwan from September 10 to 12, 2025.ASMPTThe next-generation LASER platform has been specifically developed to meet the increasingly complex requirements of IDM and Foundry semiconductor companies for laser dicing and grooving wafer materials. This new system with ASMPT's patented multi-beam technology expands the company's portfolio with a focus on front-end operations."The new platform combines high-precision laser processing with smart automation to support the next generation of semiconductor manufacturing", says Patrick Huberts, Head of Business and Marketing at ASMPT ALSI. "It's the ideal platform for applications in advanced packaging, AI, and power automotive. We invite you to join us for the official launch and discover the new machine live at our booth during SEMICON Taiwan."High-performance wire bondingASMPT also introduces its latest high-performance wire bonder at SEMICON: the AERO PRO. Developed for high-density semiconductor designs, this machine delivers the highest bonding accuracy and exceptional speed for wires with diameters of 0.5 mil (≈12.7 µm). Thanks to integrated real-time monitoring and preventive maintenance functions, the system is ideally suited for use in intelligent, networked production environments. To accommodate complex designs such as system-in-package (SiP) and multi-chip modules (MCMs), as well as applications like ball grid arrays (BGAs), land grid arrays (LGAs), memory modules, or quad flat packages (QFPs) with external leads. For uniform 22-µm bond balls, it employs the patented X-POWER 2.0 transducer—a lightweight and vibration-optimized ultrasonic transducer that supports mixed-wire and vertical bonding in bond via array (BVA) technology. Optimized for complex interconnects in memory, microcontroller units (MCUs), and more, ideal for advanced applications such as AI edge devices and automotive systems.Bridging Semiconductor and SMTThe hybrid SIPLACE CA2 placement solution from ASMPT SMT Solutions redefines advanced packaging by uniting semiconductor and SMT processes in a single, high-speed platform. Traditionally, die bonding and SMT placement were separate steps — now, they are seamlessly integrated. Designed for advanced packaging applications in smartphones, 5G, AI, high-performance computing (HPC), and IoT devices, the SIPLACE CA2 processes both SMDs from tape and dies taken directly from sawn wafers. This eliminates the need for expensive die taping, saving up to 800 km of tape annually in 24/7 production, reducing both cost and material waste. With up to 76,000 components per hour (cph) for SMT, 54,000 cph for Die Attach, and accuracy of up to 10nm @ 3σ accuracy, the SIPLACE CA2 delivers high-speed and accuracy — even for advanced Die Attach and Flip Chip applications. A breakthrough buffer system decouples die pickup from placement, solving previous speed limitations. Up to 50 wafers can be managed with just 13 seconds of swap time – unmatched in the industry.The SIPLACE CA2 boosts productivity in advanced packaging by combining classic surface-mount technology with die-attach and flip-chip assembly. ASMPT

xMEMS Labs, the global leader in solid-state MEMS speakers and micro-scale thermal solutions, today announced the return of its highly anticipated xMEMS Live Asia seminar series, taking place September 16 in Taipei and September 18 in Shenzhen.Now in its third year, xMEMS Live Asia brings together engineers, product designers, system architects and company executives to explore how MEMS-based audio and active thermal management technologies are redefining the design and performance of next-generation AI interface devices – from AI glasses, smartphones, headphones and earbuds to SSDs, optical transceivers and rack servers in the data center.This year's one-day seminars will center on live product demonstrations of Sycamore, xMEMS' revolutionary thin and lightweight full-range MEMS loudspeaker, and cooling, the world's first solid-state air pump-on-a-chip delivering active thermal management in devices where conventional fans can't go.Attendees will experience:1) AI glasses featuring Sycamore speakers and cooling for discreet, high-fidelity sound and heat management in ultra-thin eyewear2) Next-gen headphones featuring full-range Sycamore, paired with cooling to deliver the world's first active earcup ventilation3) SSD thermal management featuring cooling for higher sustained data transfers4) Plus a smartwatch with Sycamore, TWS earbud solutions with Cypress and Lassen, and thermal demos showcasing cooling at both chip and system levelsIn addition to hands-on demos, the seminar features deep-dive technical sessions from xMEMS engineers, covering performance testing, system integration, and product optimization for Sycamore and cooling across a variety of applications. Dedicated sessions on headphone and TWS implementations will offer further insight into how xMEMS solutions deliver superior fidelity, form factor reduction, and system-level benefits for consumer electronics."AI is changing how we interface with devices while also increasing processor and thermal loads," said Joseph Jiang, CEO of xMEMS Labs. "At xMEMS Live Asia, we'll demonstrate how Sycamore and cooling technologies are enabling a new generation of thinner and lighter-weight conversational AI interfaces and active thermal management for improved on-device intelligence and system performance."Registration is now open. Seating is limited. Click here for English, here for Simplified Chinese, or here for Traditional Chinese. Reserve your spot today to experience the future of conversational AI interfaces and AI thermal management!For more information about xMEMS and its solid-state solutions, visit xmems.com.Showcasing Live Demonstrations of AI Interface and Thermal Device Innovation Enabled by Sycamore and cooling on September 16 in Taipei and September 18 in Shenzhen.

Test Research, Inc. (TRI), the leading test and inspection systems provider for the electronics manufacturing industry, will join SEMICON Taiwan held at Taipei Nangang Exhibition Center, Hall 1 - 1F from September 10-12, 2025. Visit TRI's Booth No. K3070 to learn more about the latest Advanced WLP/PLP and SEMI Back-End Package Inspection and metrology solutions.TRI's Inspection and Metrology Applications include: Chiplet & Chip-on-Wafer (CoW), System-in-Package (SiP), Advanced WLP, TSV Metrology, μBump, Cu Pillar, Surface Topology, Profiling, Thin Film Thickness, Patterned Wafer, Inner Crack/Chipping, After Sawing Defects, Die Underfill, Glue, Epoxy & Flux, Wafer Bumping and Die / Wire Bonding.TRI will showcase the Wafer Inspection and metrology Platform, TR7950Q SII, capable of wafer macroscopic 3D inspection and micro measurement metrology. The TR7950Q SII has applications in Advanced WLP, Wafer Frame, Patterned Wafer, Wafer Bumping, WLCSP, Through Silicon Via (TSV), thin film, and more.TRI will also exhibit the back-end inspection solutions, the TR7007Q SII-S for C4 bumps (~100 μm Ø), Mini-LED, and 008004 paste inspection applications, and the TR7900Q SII-R TRI's Reject Station with A-Powered 3D Inspection that can inspect die, wire diameters of up to 15 μm (0.6 mil), SiP, underfill, bumps, and more. The lineup will also include an X-ray Inspection Demo Station. TRI's SEMI AXI solutions can inspect C4 bumps and Cu pillars.