BJT AC DC & Multistage
BJT AC DC & Multistage
OBJECTIVES
After studying the material in this chapter, you will be able to describe and/or analyze: the need for biased and signal stabilizing circuitry, common-emitter amplifier circuits using voltage divider biasing, common-emitter amplifier circuits using emitter biasing, common-emitter amplifier circuits using voltage feedback biasing, RC coupled multistage amplifiers, direct coupled multistage amplifiers, and troubleshooting procedures for transistor circuits.
5.1
INTRODUCTION
In the previous chapter you studied the bipolar transistor and learned how to make a simple amplifier circuit. Our study was limited, however, in that we assumed an ideal transistor and considered only single-stage amplifiers. In this chapter, we will consider transistor limitations and multistage amplifier circuits.
If a transistor has a typical beta of 150, what is the acceptable range of beta for the transistor? 161
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Step 1. Calculate the minimum beta: min = typical  (typical  50%) = 150  (150  50%) = 75 Step 2. Calculate the maximum beta: max = typical + (typical  100%) = 150 + (150  100%) = 300 A transistor with a typical beta of 150 is considered good if its actual beta is within the range of 75 to 300. The beta of a transistor also varies with changes in temperature. Figure 51 shows a graph of beta versus temperature. For an operational temperature of 0C, the beta of the 2N3904 is 140, and at a temperature of 100C, the beta is 220.
240
FIGURE 51
In order for a transistor amplifier circuit to be useful, the circuit must be stable and predictable. With no signal applied to the amplifier circuit, the amplifier is in the quiescent state. At quiescence, the voltage across the transistor (VCE) and the current through the transistor (IC) should be constant. When the signal is applied to a class-A amplifier, the signal will cause variations around the quiescent point, also referred to as the Q-point. It is the function of the bias circuit to hold the circuit stable at the designed Q-point. Example 5.2 shows how the base-biased amplifier is not effective at holding the Q-point constant with changes in beta.
EXAMPLE 5.2
Calculate the values of Ic and VCE for the transistor amplifier in Figure 52, assuming the transistor has a beta of (a) 100 and (b) 180. Step 1. Calculate IC and Vc for a beta equal to 100. IB = VRb/Rb = 9.3 V/930 k = 10 A Ic = Ib = 100 10 A = 1 mA VRc = Ic Rc = 1 mA 5 k = 5 V Vc = Vcc VRc = 10 V 5 V = 5 V
5.1 INTRODUCTION
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Step 2. Calculate IC and Vc for a beta equal to 180. IB = VRb/Rb = 9.3 V/930 k = 10  Ic = Ib = 180  10 A = 1.8 mA VRc = Ic  Rc = 1.8 mA  5 k = 9 V Vc = Vcc  VRc = 10 V  9 V = 1 V
VCC = 10 V
Rb 930 k
Rc 5 k
RL 5 k
FIGURE 52
Base-biased amplifier
Calculate the voltage at the junctions of R1 and R2 for both circuits shown in Figure 53 and determine the percentage of change in voltage caused by adding the load. Step 1. Calculate the voltage at the test point for the circuit in Figure 53(a). The circuit is an unloaded voltage divider, and the voltage at the test point can be calculated by using the voltage divider formula. Vout = Vin R2/(R1 + R2) = 12 V 2 k/x0 k + 2 k) = 2 V Step 2. Calculate the voltage at the test point for the circuit in Figure 53(b). The parallel equivalent resistance (REQ) of R2 and the load resistor must first be calculated before the voltage divider formula can be used. REQ = R2 || RL = 2 k || 20 k = 1.82 k Vout = Vin REQ/(R1 + REQ ) Vout = 12 V 1.82 k/(10 k + 1.82 k) = 1.85 V
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Step 3. Calculate the percent of change in voltage caused by loading the voltage divider circuit. % = V/V  100% V = 2 V  1.85 V = 0.15 V % = 0.15 V/2 V  100% = 7.5%
12 V
12 V
R1 10 k
TP = 2 V
IR1
R1 10 k
TP = 1.85 V
R2 2 k
IR2
IRL R2 2 k
RL 20 k
(a)
(b)
FIGURE 53
The voltage divider circuit in Figure 53(b) can be considered a lightly loaded voltage divider because the load resistor is ten times the resistance of R2. The load causes the voltage at the junction of the voltage divider to drop by 7.5%. Loads with higher resistance will cause a smaller drop in voltage, and loads with lower resistance will cause a greater drop. A good rule of thumb is to consider the voltage divider lightly loaded if the load is ten times or greater the value of the parallel resistor (R2 in this case). For lightly loaded voltage dividers, the voltage at the junction of the divider can be approximated using the simple voltage divider formula. Figure 53(b) shows that the conventional current through R1 divides, and a portion of the current flows through R2 while the remainder flows through the load resistor. If the voltage divider is lightly loaded, most of the current will flow through R2, and less than 10% of the current will flow through the load.
5.2
The amplifier circuit shown in Figure 54(a) uses voltage divider biasing. This method of biasing has proven to be a popular way to design bipolar transistor amplifiers. The circuit counteracts the effects of the uncertainty of beta. For DC bias analysis, the circuit can be simplified as shown in Figure 54(b) because the capacitors are considered open to the DC bias currents. The name voltage divider comes from the fact that the base voltage is provided by a voltage divider formed by Rb1 and Rb2. The voltage at the junction of Rb1 and Rb2 holds the base voltage constant. The circuit is always designed so the base current (IB) is less than 10% of the current flowing through Rb2. Therefore, the voltage divider is essentially not loaded by the base current flow. Since the voltage divider formed by Rb1 and Rb2 is lightly loaded, the base voltage (VB) can be easily calculated by using the simple voltage divider formula. The base/emitter junction is forward-biased. Therefore, the emitter voltage (VE) will be one junction drop different than the
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VCC = 10 V
VCC = 10 V
Rb1 46 k
Rc 5 k
Rb1 46 k
Rc 5 k
Rb2 10 k
Re 1 k
RL 5 k
Rb2 10 k
Re 1 k
(a)
(b)
FIGURE 54
base voltage. Once the voltage on the emitter is known, the emitter current (IE) can be easily calculated using Ohms law, since Re is connected between the emitter and ground. The collector current (IC) can be approximated, since it is almost the same as the emitter current. With the collector current known, the collector voltage (VC) can be calculated. The preceding paragraph gave the procedures for calculating all of the bias voltages and currents for a voltage divider biased amplifier. Note that the calculations were completely independent of the beta of the transistor. This means the voltage divider biased amplifier will maintain a constant Q-point (IC will be constant) even with large changes in beta. The circuit design does depend on a minimum beta, but we can be sure the engineer designed the circuit for the minimum beta of the transistor. Example 5.4 will show you how easy it is to calculate the bias voltages and currents for a voltage divider biased amplifier circuit.
VCC = 10 V
Rb1 46 k
Rc 5 k
Rb2 10 k
Re 1 k
RL 5 k
FIGURE 55
EXAMPLE 5.4
Calculate VB, VE, IE, IC, VC, and VCE for the amplifier circuit in Figure 55. Step 1. Calculate the base voltage (VB). Since the base voltage divider is lightly loaded, we can use the simple voltage divider formula.
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Step
Step
Step
Step
VB = Vcc Rb2/(Rb1 + Rb2) VB = 10 V 10 k/(46 k + 10 k) = 1.8 V 2. Calculate the emitter voltage (VE). The base/emitter junction is forward-biased. The circuit is using a silicon NPN transistor, so the base must be 0.7 V more positive than the emitter. VE = VB VBE VE = 1.8 V 0.7 V = 1.1 V 3. Calculate the emitter current (IE) and collector current (IC). Ohms law can be used to calculate the emitter current, since RE(total) is connected between the emitter and ground. IE = VE/RE(total) (RE(total) = Re in this case.) IE = 1.1 V/1 k = 1.1 mA IE IC (Base current is small; therefore, IE is approximately equal to IC.) IC 1.1 mA 4. Calculate the collector voltage. With the collector current known, the voltage drop across Rc can be calculated. If the voltage across Rc is subtracted from the supply voltage (VCC), the voltage on the collector can be found. VRc = Ic Rc = 1.1 mA 5 k = 5.5 V Vc = Vcc VRc = 10 V 5.5 V = 4.5 V 5. Calculate the collector to emitter voltage (VCE). The voltage across the transistor can be calculated by finding the difference in voltage between the collector and the emitter. VCE = VC VE VCE = 4.5 V 1.1 V = 3.4 V
Voltage divider biasing uses current-mode feedback to stabilize the circuit. The current flowing through the emitter resistor causes negative feedback and stabilizes the circuit. Voltage divider biasing is a practical way to make the bias circuitry independent of beta. This approach is not the only means of stabilization, but it is one of the most popular.
5.3
The price paid for independence from beta is a decrease in signal voltage gain. Fortunately, these lower voltage gains are predictable. The input impedance is also affected, but it increases, and in most cases this is a plus. We will discuss each of these parameters and then look at some examples. The size and the type of resistance in the emitter leg has a great effect on the operation of the voltage divider amplifier. There are five types of resistances in the emitter leg, each of which is defined in the following list. As you continue with the chapter, use this list to make sure you understand the type of emitter resistance being discussed. r'e is the internal signal resistance of the base/emitter junction (r'e = 25 mV/IE). Re is an external emitter resistor that opposes signal current (AC) and bias current (DC). RE is an external emitter resistor that only opposes bias current (DC).
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re is the total signal (AC) resistance in the emitter leg and is equal to r'e plus Re. RE(total) is the total bias (DC) resistance in the emitter leg and is equal to RE plus Re.
Rb1
Rc rb = Rb1|| Rb2
Rb2
Re
RL
zin
Rb1
Rb2
r'e Re
zin
rb re = r'e + Re (c)
re
(a)
(b)
Assume a beta of 100 and calculate the input impedance of the circuit in Figure 57.
VCC = 10 V
Rb1 46 k
Rc 5 k
Rb2 10 k
Re 1 k
RL 5 k
FIGURE 57
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Step 1. Calculate the biased emitter current. The biased emitter current is needed to calculate the value of r'e. VB = Vcc Rb2/(Rb1 + Rb2) VB = 10 V 10 k/(46 k + 10 k) = 1.8 V VE = VB VBE VE = 1.8 V 0.7 V = 1.1 V IE = VE/RE(total) (RE(total) = Re in this case.) IE = 1.1 V/1 k = 1.1 mA Step 2. Calculate the signal resistance of the base/emitter junction. r'e = 25 mV/IE = 25 mV/1.1 mA = 23 Step 3. Draw an equivalent circuit showing how Rb1, Rb2, Re, and r'e appear from the perspective of the signal generator. The equivalent circuit is shown in Figure 58.
zin
Rb1 Rb2 46 k 10 k
r'e 23 Re 1 k
FIGURE 58
Step 4. Calculate the signal resistance in the base leg (rb). rb = Rb1 || Rb2 = 46 k || 10 k = 8.2 k Step 5. Calculate the signal resistance in the emitter leg (re). re = r'e + Re = 23 + 1 k = 1023 Step 6. Multiply the emitter leg signal resistance times beta. (Assume beta equals 100.) re = 100 1023 = 102.3 k Step 7. Draw the simplified equivalent circuit showing the base signal resistance in parallel with the emitter path signal resistance. The equivalent circuit is shown in Figure 59.
zin
rb 8.2 k
re 102.3 k
FIGURE 59
Step 8. Calculate the circuit input impedance by finding the parallel equivalent of the signal base resistance and the signal emitter path resistance. zin = rb || re = 8.2 k || 102.3 k = 7.6 k
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Two points should be noted. First, if the value of Re is large in comparison to the value of r'e, then r'e can be dropped from the calculation. Second, note that beta is still in the equation, but by examining Example 5.5, you can see that the signal base resistance (rb) is the main influence on input impedance. Because of this, changes in beta do not have a dramatic effect.
Rb1 46 k
2 Vp-p
Rb2 10 k
RL 5 k Re 1 k
FIGURE 510
Step 1. Calculate the signal resistance in the collector leg. rc = Rc || RL = 5 k || 5 k = 2.5 k Step 2. Calculate the signal resistance of the base/emitter junction. VB = Vcc Rb2/(Rb1 + Rb2) VB = 10 V 10 k/(46 k + 10 k) = 1.8 V VE = VB VBE VE = 1.8 V 0.7 V = 1.1 V IE = VE/RE(total) (RE(total) = Re in this case.) IE = 1.1 V/1 k = 1.1 m r'e = 25 mV/IE = 25 mV/1.1 mA = 23 Step 3. Calculate the signal resistance in the emitter leg. re = r'e + Re = 23 + 1000 = 1023 or 1.023 k Step 4. Calculate the voltage gain (Av). Av = rc/re = 2.5 k/1.023 k = 2.44
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The value of r'e has little affect on the voltage gain of the circuit as long as Re is much larger than r'e. The voltage gain is greatly reduced, but the gain is predictable because it is independent of r'e. In the following sections you will learn techniques to regain some of the lost gain and still have circuit stability. Once the voltage gain of an amplifier is known, the output signal can be easily calculated by multiplying the input signal by the voltage gain. It should be noted that the output signal swing is limited by the power supply voltage and the Q-point. A good rule of thumb to follow for estimating the maximum peak-to-peak signal swing is to calculate the voltage across the transistor at quiescence (VCE) and multiply this value by two. If the calculated output signal exceeds this value, clipping will occur on the peaks of the output signal. Example 5.7 shows how to calculate the output signal and the maximum output swing.
EXAMPLE 5.7
Calculate the output signal and the maximum output swing for the circuit in Figure 510. Step 1. Calculate the output signal. Vout = Vin Av = 2 Vp-p 2.44 = 4.88 Vp-p Step 2. Calculate VCE. The value of VE was calculated in Example 5.5 and equals 1.1 V. The value of Vc needs to be calculated. VRc = Ic Rc = 1.1 mA 5 k = 5.5 V (IE Ic was calculated in Example 5.5.) Vc = Vcc VRc = 10 V 5.5 V = 4.5 V VCE = Vc VE = 4.5 V 1.1 V = 3.4 V Step 3. Calculate the maximum output swing. maximum Vout p-p = 2 VCE = 2 3.4 V = 6.8 Vp-p Since the output signal (4.88 Vp-p) is less than the calculated maximum output swing (6.8 Vp-p), the output signal will not be clipped.
5.4
There are three variations of the voltage divider biased amplifier: the unbypassed, the fully bypassed, and the split emitter. The bias circuitry on all three variations functions the same. The difference is in the signal parameters. We will examine each variation and work an example of each.
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Rb1 50 k
Rb2 15 k
RL 10 k Re 1.5 k
assumptions made, but they will be close enough to use in troubleshooting. Example 5.8 demonstrates this approach.
EXAMPLE 5.8
Analyze the circuit in Figure 511. Calculate (a) the DC bias voltages for VB, VE, Vc, and VCE, and (b) the signal voltage gain (Av), input impedance (zin), output impedance (zout), and the approximate maximum signal output voltage swing. Step 1. Calculate the DC biased voltages and currents. VB = Vcc Rb2/(Rb1 + Rb2) VB = 16 V 15 k/(50 k + 15 k) = 3.7 V VE = VB VBE = 3.7 V 0.7 V = 3 V IE = VE/RE(total) = 3 V/1.5 k = 2 mA (RE(total) = Re in this case.) IC Ie = 2 m VRC = IC Rc = 2 mA 4 k = 8 V Vc = Vcc VRC = 16 V 8 V = 8 V VCE = Vc VE = 8 V 3 V = 5 V Step 2. Calculate the signal input impedance. Rb = Rb1 || Rb2 = 15 k || 50 k = 11.5 k re Re = 1.5 k (Re is large compared to r'e.) zin = rb || re zin = 11.5 k || 100 1.5 k zin = 10.7 k Step 3. Calculate the output impedance. zout = Rc = 4 k Step 4. Calculate the voltage gain. rc = Rc || RL = 4 k || 10 k = 2.86 k Av = rc/re Av = 2.86 k/1.5 k = 1.9 Step 5. Calculate the maximum output signal swing. An approximation of the output peak-to-peak signal swing equals 2 VCE. VCE = 5 V Therefore: Maximum output swing = 2 5 V = 10 Vp-p
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VCC = 16 V Rb1 50 k RC 4 k
Chapter 5
Transistor Circuits
Rb2 15 k
RE 1.5 k
RL 10 k
FIGURE 512
Calculate the input impedance, output impedance, and the voltage gain for the circuit in Figure 512. Step 1. Calculate r'e. VB = Vcc Rb2/(Rb1 + Rb2) VB = 16 V 15 k/(50 k + 15 k) = 3.7 V VE = VB VBE = 3.7 V 0.7 V = 3 V IE = VE/RE(total) = 3 V/1.5 k = 2 mA (RE(total) = RE in this case.) IC Ie = 2 mA r'e = 25 mV/IE = 25 mV/2 mA = 12.5
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Step 2. Calculate the input impedance. rb = Rb1 || Rb2 = 50 k ||15 k = 11.5 k re = r'e = 12.5 (RE is bypassed.) zin = rb || re = 11.5 k || (100 12.5 ) = 1.13 k Step 3. Calculate the output impedance. zout = Rc = 4 k Step 4. Calculate the voltage gain. rc = Rc || RL = 4 k || 10 k = 2.9 k Av = rc/re = 2.9 k/12.5 = 232 The circuits in Examples 5.8 and 5.9 are identical except for the addition of the bypass capacitor. The addition of the bypass capacitor makes a dramatic change to the voltage gain and input impedance. The voltage gain goes up from 1.9 to 232, and the input impedance goes down from 10.7 k to 1.13 k. The increase in voltage gain is generally considered a plus that would probably outweigh the disadvantages of lowering the input impedance. However, the voltage gain is now dependent on r'e, which makes it less predictable. The input impedance is not only lower but now is dependent on r'e and , which makes it less predictable than it was in the unbypassed circuit. Signal distortion is another disadvantage of the fully bypassed circuit. Figure 513 shows an example of signal distortion that is easily seen when the output signal has a large swing. The distortion is caused by fluctuations in r'e and directly affects the voltage gain of the amplifier. The fluctuations in r'e are caused by the wide variations in emitter current. On the positive swing of the input, the emitter current increases, causing r'e to decrease and the voltage gain to increase. On the negative swing of the input, the emitter current decreases, causing r'e to increase and the voltage gain to decrease.
Input 0 V
100 mVp-p
Output 0 V
10 Vp-p
FIGURE 513
Signal distortion
The fully bypassed circuit is used in low cost circuitry where the high voltage gain reduces the number of stages needed, therefore, cutting cost. The price paid for this lower cost is distortion, unpredictable voltage gains, and input impedances that fluctuate with changes in environmental conditions and device parameters.
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Rb1 50 k
Rb2 15 k RE 1.4 k
Re 100
RL 10 k
Calculate the input impedance, output impedance, and voltage gain for the circuit in Figure 514. Step 1. Calculate r'e. VB = Vcc Rb2/(Rb1 + Rb2) VB = 16 V 15 k/(50 k + 15 k) = 3.7 V VE = Vb Vbe = 3.7 V 0.7 V = 3 V IE = VE/RE(total) = 3 V/1.5 k = 2 mA (RE(total) = Re + RE.) IC Ie = 2 mA r'e = 25 mV/IE = 25 mV/2 mA = 12.5 Step 2. Calculate the input impedance. rb = Rb1 || Rb2 = 50 k || 15 k = 11.5 k re = r'e + Re = 12.5 + 100 = 112.5 zin = rb || re = 11.5 k || (100 112.5 ) = 5.7 k Step 3. Calculate the output impedance. zout = rc = 4 k Step 4. Calculate the voltage gain. rc = Rc || RL = 4 k || 10 k = 2.9 k Av = rc/re = 2.9 k/112.5 = 26
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The split-emitter amplifier has values of voltage gain and input impedance between those of the fully bypassed and the unbypassed circuits. The predictability of the signal parameters is also between the other two circuits. The amount of the emitter resistor left unbypassed determines the voltage gain and predictability of the circuit. Because the designer has the ability to control voltage gain and signal parameter predictability, the split-emitter voltage divider circuit has become a popular circuit in electronic systems.
ED AMPLIFIER
5.5
Figure 515 shows circuits using emitter bias for stabilization. The base is connected to ground through a relatively low resistance (Rb). The base/emitter is forward biased by a negative power supply (VEE) connected to the emitter resistor (Re). Since the base current is small, the voltage drop across the base resistor (Rb) is negligible, and the base is considered to be at zero volts. The forward-biased base/emitter junction drops to 0.7 V, so the emitter is at 0.7 V. This means the current through the emitter is determined by the value of the negative supply and the value of the emitter resistor. Since the emitter current is independent from changes in beta, the circuit obtains stability. One disadvantage of the emitter biased amplifier is the need for an emitter supply voltage (VEE). Example 5.11 shows how the DC voltage of the emitter biased amplifier can be calculated.
VCC = 15 V Rc 6.8 k
Rb 1 k
Re 12 k VEE = 15 V
Calculate the DC voltage VB, VE, and VC of the circuit shown in Figure 515. Step 1. Determine the base voltage. The base is at zero voltage because the current through Rb is considered negligible. VB = 0 V
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Step 2. Determine the emitter voltage. The base/emitter of the NPN transistor is forward biased, so the emitter must be 0.7 V negative with respect to the base. VE = 0.7 V Step 3. Calculate the collector current. IE = (VEE VBE)/Re = (15 V (0.7 V))/12 k = 1.2 mA (The negative sign can be dropped.) IC IE = 1.2 mA Step 4. Calculate the collector voltage. VRc = IC Rc = 1.2 mA 6.8 k = 8.2 V Vc = Vcc VRc = 15 V 8.2 V = 6.8 V
Figure 516 shows the same emitter biased amplifier with an input signal and a load connected. The signal parameters are calculated using the same procedure as the voltage divider amplifier. The emitter can be fully bypassed for high voltage gain or partly bypassed, which reduces the gain but improves predictability and reduces distortion. Example 5.12 shows how the signal parameters can be calculated.
Vcc = 15 V Rc 6.8 k RL 10 k
Rb
1 k
Re 500
RE 11.5 k
VEE = 15 V
Calculate the input impedance, output impedance, and voltage gain for the circuit in Figure 516. Step 1. Calculate r'e. IE = 1.2 mA (Calculated in Example 5.11.) r'e = 25 mV/IE = 25 mV/1.2 mA = 20.8 Step 2. Calculate the input impedance. rb = Rb = 1 k re = r'e + Re = 20.8 + 500 = 520.8 (r'e is small and may be disregarded.) zin = rb || re = 1 k || (100 521 ) = 981
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Step 3. Calculate the output impedance. zout = Rc = 6.8 k Step 4. Calculate the voltage gain. rc = Rc || RL = 6.8 k || 10 k = 4 k Av = rc/re = 4 k/521 = 7.7
5.6
Figure 517 shows circuits using voltage feedback for stabilization. Note that there is not a resistor in the emitter leg. Voltage divider biasing using current-mode feedback is normally preferred over voltage-mode feedback. However, for low voltage power supplies or when maximum output voltage swings are necessary, voltage-mode feedback may be preferred. Figure 517(a) shows a circuit operating from a 4 V supply. A resistor (Rb) is connected between the collector and base. The base current is controlled by the voltage dropped across Rb, which is equal to the collector-to-base voltage. If the collector current increases, the voltage on the collector will decrease, reducing the voltage across Rb. A reduced voltage across Rb causes less base current, which then causes the collector current to decrease. The opposite is also true. A decrease in collector current causes the collector voltage to increase, which increases the base current and causes the collector current to rise. The voltage across the transistor (VCE) stabilizes at approximately 2 V, and the remaining supply voltage is dropped across Rc. The voltage gain of the amplifier is the same as the fully bypassed voltage divider circuit and can be calculated using the formula Av = rc/re. Since there is no emitter resistor in the circuit, re = r'e causing the voltage gain to be high. The input impedance is equal to Rb divided by the voltage gain plus one in parallel with r'e times beta [zin = (Rb/Av + 1) || (r'e )] . The reason Rb appears to be much smaller than its actual size is because as the voltage goes up on the base end of Rb, the voltage is forced down on the collector end of Rb. Millers theorem states that the effective impedance of a component in the negative feedback loop of an amplifier is equal to the actual impedance of the component divided by the voltage gain plus one. The main advantage of the circuit in Figure 517(a) is its ability to operate with a low supply voltage. The circuit in Figure 517(b) uses voltage-mode feedback. The second resistor in the base circuit (Rb2) permits a portion of the current flowing through Rb1 to bypass the base. This permits the circuit
Vcc = 4 V Rc 2 k 200 k Rb RL 10 k Vcc = 10 V Rc 4.3 k 43 k Rb1 Rb2 6 k
(b)
RL 50 k
(a)
FIGURE 517
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to operate with a higher value of collector-to-emitter voltage (VCE). The circuit can be designed for ideal midpoint biasing, permitting maximum output signal swings. This type of voltage-mode feedback is often used to drive power amplifier stages when maximum swing is of utmost importance.
5.7
In order to obtain the gain an electronic system needs, it is often necessary to connect amplifiers in series. When amplifiers are connected in series, they are said to be cascaded. Figure 518 shows a two-stage cascaded amplifier circuit. The two stages are both voltage divider biased amplifiers.
VCC = 16V Rc 1.8 k C2 C1 Rb2 22 k Re 100  RE 1.8 k C4 Rb2 2.7 k RE 180  Rc 820  C3 Re 82  C5 RL 2.2 k
Rb1 37 k
Rb1 12 k
FIGURE 518
RC coupled amplifier
One method for coupling transistor stages together is by using coupling capacitors between stages. This method of coupling is called RC, or resistance-capacitor, coupling. Coupling capacitors act like an open for biased currents but are a short for signal currents. Because of this, the biased circuitry in each stage is independent. The biased currents and voltages can be calculated in the same manner used for a single-stage amplifier. You simply consider each stage individually. The signal parameters of a multistage amplifier are easy to calculate if you remember the following facts. The input impedance of the total circuit is equal to the input impedance of the first stage. The output impedance of the total circuit is equal to the output impedance of the final stage of the system. The voltage gain of the total circuit is equal to the product of the individual stages. The output signal from the first stage will see the input impedance of the second stage as its load resistance.
EXAMPLE 5.13
Analyze the circuit in Figure 518. Step 1. Analyze each stage independently for the biased voltages. First stage: VB = Vcc Rb2/(Rb1+Rb2) = 16 V 22 k/(37 k + 22 k) = 6 V VE = VB VBE = 6 V 0.7 V = 5.3 V IE = VE/RE(total) = 5.3 V/1.9 k = 2.8 mA
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VRC = IC Rc = 1.8 k 2.8 mA = 5 V VC = VCC VRC = 16 V 5 V = 11 V VCE = VC VE = 11 V 5.3 V = 5.7 V Second stage: VB = Vcc Rb2/(Rb1 + Rb2) = 16 V 2.7 k/(12 k + 2.7 k) = 2.9 V VE = VB VBE = 2.9 V 0.7 V = 2.2 V IE = VE/RE(total) = 2.2 V/262 = 8.4 mA VRC = IC Rc = 820 8.4 mA = 6.9 V VC = VCC VRC = 16 V 6.9 V = 9.1 V VCE = VC VE = 9.1 V 2.2 V = 6.9 V Step 2. Calculate the input impedance and output impedance of each stage. Assume beta to equal 100 for both transistors. First stage: rb = Rb1 || Rb2 = 37 k || 22 k = 13.8 k r'e = 25 mV/IE = 25 mV/2.8 mA = 9 re = r'e + Re = 9 + 100 = 109 zin = rb || re = 13.8 k || (100 109 ) = 6 k zout = Rc = 1.8 k Second stage: rb = Rb1 || Rb2 = 12 k || 2.7 k = 2.2 k r'e = 25 mV/IE = 25 mV/8.4 mA = 3 re = r'e + Re = 3 + 82 = 85 zin = rb || re = 2.2 k || (100 85 ) = 1.7 k zout = Rc = 820 Step 3. Calculate the voltage gain of each stage. First stage: rc = Rc || RL = 1.8 k || 1.7 k = 874 (RL = zin of next stage.) Av = rc/re = 874 /109 = 8 Second stage: rc = Rc || RL = 820 || 2.2 k = 597 Av = rc/re = 597 /85 = 7 Step 4. Calculate the input impedance, output impedance, and voltage gain of the total amplifier circuit. zin = zin of first stage = 6 k zout = zout of last stage = 820 Av(total) = AV1 AV2 = 8 7 = 56
D BYPASS CAPACITORS
5.8
Up to this point we have assumed the capacitors in the circuits to have zero impedance (Xc) for signal currents and infinite impedance for biased currents. The impedance of a capacitor is
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Chapter 5
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dependent on its capacitance and the frequency of the signal and is expressed as Xc = 1/(2Fc). Any size capacitor will exhibit some ohms of impedance at any frequency. Engineers design circuits so Xc is relatively small at the lowest operating frequency. Normally, technicians will not have to calculate the size of the capacitors, but it is helpful to have a rule of thumb to determine the approximate size. As a rule, Xc, at the lowest frequency, should be equal to one-tenth or less of the series impedance being driven by the signal passing through the capacitor. The signal passing through the input coupling capacitor is driving zin of the first stage of the circuit, and the impedance of the coupling capacitor should be one-tenth of zin. The coupling capacitor between stages should have an impedance of one-tenth of zin of the stage being driven. The output coupling capacitor should have an impedance of one-tenth of RL. The purpose of the emitter capacitor is to bypass signal currents to ground. The parallel combination of RE and the bypass capacitor should be one-tenth of r'e for the fully bypassed circuit or one-tenth of re (r'e + Re) for the split-emitter circuit. Example 5.14 will demonstrate how this rule of thumb can be used to calculate the size of coupling and bypass capacitors. It should be emphasized that the procedure to be used in Example 5.14 will result in estimated values that permit the technician to select capacitors for experimental circuits. Engineers use other calculation methods that result in smaller capacitor values that save money on commercially produced circuits.
EXAMPLE 5.14
Calculate the size of the coupling and bypass capacitors needed in the circuit in Figure 518 if the lowest signal frequency to be amplified is 300 Hz. Step 1. Determine the series resistance being driven by each capacitor. In Example 5.13, the input impedance and the value of signal resistance in the emitter leg (re) was calculated for each stage. These values are listed as the driven resistance in Table 51.
TABLE 51
Capacitor Driven resistance 6 k (zin Q1) 1.7 k (zin Q2) 2.2 k (RL) 109  (re Q1) 85  (re Q2) XC(max) 600  170  220  10.9  8.5  Capacitor value 0.9 F 3.1 F 2.4 F 49 F 63 F
C1 C2 C3 C4 C5
Step 2. Calculate the maximum impedance of the capacitor by assuming the capacitive reactance (Xc) to equal one-tenth of the driven resistance value shown in Table 51. Step 3. Using 300 Hz, calculate the value of each capacitor using the following formula. The calculation for the first capacitor is shown. Table 51 shows the calculated values for all capacitors for the circuit shown in Figure 518. C1 = 1/(2 Xc F) = 1/(2 600 300 Hz) = 0.9 F
The results in Table 51 show the minimum size capacitor using our rule of thumb for calculation. The next larger standard size capacitor can be used to construct the circuit. Since
181
coupling and bypass capacitors with larger capacitance values will function fine, often circuits will use the same value for all coupling capacitors.
ED AMPLIFIERS
5.9
Capacitor coupled (RC coupled) amplifiers are popular because each stage has its own independently biased circuit. Fluctuations in the DC operating point in one stage is not amplified by the next stage. Occasionally, however, it is necessary to have an amplifier that is capable of amplifying DC currents and voltages. In order to couple a DC signal from one stage to the next, it is necessary to remove the coupling capacitor and connect the output of one stage directly to the input of the next. Emitter-bypass capacitors are removed; thus, the DC signal gain will be the same as the dynamic signal gain. Figure 519 shows a two-stage direct coupled amplifier. The first stage uses emitter biasing. With no input signal, the 4.3 k emitter resistor connected to the negative 5 V supply sets the emitter and collector current of Q1 to 1 mA. The 1 mA of collector current flowing through Q1 causes a 15 V drop across the 15 k collector resistor setting the collector voltage at 5 V. The second stage uses a PNP transistor, and the bias voltage on the base is held constant at 5 V by the output of the first stage. The emitter of Q2 is connected to a 10 V supply through a 4.3 k emitter resistor. Since 4.3 V will be dropped across the emitter, the emitter current and collector current of Q2 will equal 1 mA. The 1 mA of collector current flows through the 20 k collector resistor of Q2, dropping 20 V. This causes the output to be zero volts at quiescence. One advantage of DC coupling is the high input impedance of the second stage. The high input impedance is a result of the absence of base resistors at the input of the second stage. This reduces loading on the first stage and permits a higher voltage gain. Example 5.15 shows how the direct coupled amplifier can be analyzed.
20 V 10 V
Rc1 15 k
Q1 Vin
5 V
Re1 4.3 k
EXAMPLE 5.15
For the circuit in Figure 519, calculate VB, VE, VC, VCE, zin, zout, and Av for each transistor. Then calculate zin, zout, and Av for the total circuit. Step 1. Calculate the DC voltage for the first stage. VB = 0 V (Assume the input signal has zero DC offset.) VE = VB VBE = 0 V 0.7 V = 0.7 V
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Transistor Circuits
IE = (5 V (0.7 V))/4.3 k = 1 mA IE IC VRc = Ic Rc1 = 1 mA 15 k = 15 V VC = VCC VRc = 20 V 15 V = 5 V VCE = VC VE = 5 V (0.7) V = 5.7 V Step 2. Calculate the DC voltage for the second stage. VB = VC of first stage = 5 V VE = VB + VBE = 5 V + 0.7 V = 5.7 V (PNP transistor VBE is added.) IE = (10 V 5.7 V)/4.3 k = 1 mA I E IC VRc = Ic Rc = 1 mA 20 k = 20 V VC = VCC VRc = 20 V (20 V) = 0 V VCE = VC VE = 0 V 5.7 V = 5.7 V Step 3. Calculate the input impedance and output impedance for each stage. Assume beta to equal 100 for both transistors. First stage: r'e = 25 mV/IE = 25 mV/1 mA = 25 re = r'e + Re = 25 + 4.3 k = 4.3 k (r'e is too small to consider.) zin = re = 100 4.3 k = 430 k zout = Rc = 15 k Second stage: r'e = 25 mV/IE = 25 mV/1 mA = 25 re = r'e + Re = 25 + 4.3 k 4.3 k (r'e is too small to consider.) zin = re = 100 4.3 k = 430 k zout = Rc = 20 k Step 4. Calculate the voltage gain of each stage. First stage: rc = Rc || RL = 15 k || 430 k = 14.5 k (RL = zin of second stage (430 k).) Av = rc/re = 14.5 k/4.3 k = 3.37 Second stage: rc = Rc = 20 k (No load resistance connected.) Av = rc/re = 20 k/4.3 k = 4.65 Step 5. Calculate zin, zout, and AV(total) for the total amplifier circuit. zin = zin first stage = 430 k zout = zout last stage = 20 k AV(total) = AV1 AV2 = 3.37 4.65 = 15.7
Direct coupled amplifiers have the advantage of being able to amplify DC voltages. However, in order to amplify DC, coupling capacitors and bypass capacitors must be removed. The removal of coupling capacitors means that stages cannot be individually biased, and any Q-point drift in one stage will be amplified by the next stage. The removal of the bypass capacitor causes the gain of each stage to be low. The system will require more stages to obtain the needed gain. Even
183
though direct coupled amplifiers have these disadvantages, they still are used in high quality circuits where low frequency and DC amplification are required. Another way to obtain DC and low frequency amplification is to use a capacitor coupled amplifier and chop (turning the signal off and on at a high frequency) the DC and low frequency signals so that they can be passed by the coupling capacitors. Chopper circuits will be discussed in a future chapter.
PRE-LAB 5.1
185
PRE-LAB
Voltage Divider Biased Amplifiers
5.1
1. Calculate and record VB, VE, VC, zin, zout, Av, and maximum output voltage swings without distortion for each circuit in Figure 520.
(a)
(b)
(c)
FIGURE 520
Circuit a: VB = _____ VE = ____ VC = _____ zout = _____ Av = _____ zin = _____ Maximum output voltage swing = _____ Circuit b: VE = _____ VC = _____ VB = _____ zout = _____ Av = _____ zin = _____ Maximum output voltage swing = _____ Circuit c: VE = _____ VC = _____ VB = _____ zout = _____ Av = _____ zin = _____ Maximum output voltage swing = _____ 2. For a minimum frequency of 1 kHz, calculate the minimum capacitor size for each capacitor in the circuit in Figure 520. C1 = _______ C5 = _______ C2 = _______ C6 = _______ C3 = _______ C7 = _______ C4 = _______ C8 = _______
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Transistor Circuits
3.
Simulate and record VB, VE, VC, zin, zout, Av, and maximum output voltage swings without distortion for each circuit in Figure 520. Circuit a: VB = _______ VE = _______ zin = _______ zout = _______ Maximum output voltage swing = ________ Circuit b: VB = _______ VE = _______ zout = _______ zin = _______ Maximum output voltage swing = ________ Circuit c: VB = _______ VE = _______ zout = _______ zin = _______ Maximum output voltage swing = ________ VC = _______ Av = _______
VC = _______ Av = _______
VC = _______ Av = _______
LAB 5.1
187
LAB
Voltage Divider Biased Amplifiers
I. Objective To analyze and construct three variations of voltage divider biased amplifiers. II. Test Equipment (1) sine wave generator (1) dual trace oscilloscope (1) 12 V power supply III. Components
5.1
Resistors: (1) 200 , (1) 620 , (1) 820 , (1) 3.9 k, (1) 5.6 k, (1) 8.2 k, (1) 39 k Capacitors: (2) 10 F and (1) 22 F Transistors: (1) 2N3904
Vcc = 12 V Rc 3.9 k RL 5.6 k
2 kHz
Rb1 39 k
Rb1 39 k
Rb2 8.2 k
Re 820
2 kHz
(a)
(b)
(c)
FIGURE 521
IV. Procedure 1. Calculate and record VB, VE, VC, zin, zout, Av, and maximum output voltage swing without distortion for each circuit in Figure 521. Circuit a: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Maximum output voltage swing = _____ Circuit b: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Maximum output voltage swing = _____ Circuit c: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Maximum output voltage swing = _____
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Chapter 5
Transistor Circuits
2. Construct each circuit in Figure 521 and measure the values of VB, VE, VC, zin, zout, Av, and maximum output voltage swing without distortion. Set the input signal frequency to 2 kHz and the signal magnitude as needed. Circuit a: VB = _____ VE = _____ VC = _____ zout = _____ Av = _____ zin = _____ Maximum output voltage swing = _____ Circuit b: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Maximum output voltage swing = _____ Circuit c: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Maximum output voltage swing = _____ V. Points to Discuss 1. Analyze and discuss the percent of difference in calculated and measured values.
2. Explain the difference in voltage gain (Av) among the three circuits.
3. Explain the difference in input impedance (zin) among the three circuits.
4. Why were zout and the DC voltage readings approximately the same for all three circuits?
PRE-LAB 5.2
189
PRE-LAB
Multistage Amplifier
5.2
1. Calculate and record all values listed below for the amplifier circuit in Figure 522. Stage 1: VB = _____ Av = _____ Stage 2: VB = _____ Av = _____ Total Circuit: Av = _____ VE = _____ zin = _____ VE = _____ zin = _____ zin = _____ VC = _____ zout = _____ VC = _____ zout = _____ zout = _____
18 V 56 k 3.9 k
+
56 k
3.6 k
+
10 F 2N3904
2N3904
10 F 6.2 k RL
10 F
+ 
20 mVp-p 15 k
200
10 k
100
22 F
1.2 k
22 F
910
FIGURE 522
2. For a minimum frequency of 1 kHz, calculate the minimum capacitor size for each capacitor in the circuit in Figure 522. C1 = _______ C2 = _______ C3 = _______ C4 = _______ C5 = _______ 3. Simulate and record VB, VE, VC, Av, zin, and zout, for the amplifier circuit in Figure 522. Stage 1: VB = _____ Av = _____ VE = _____ zin = _____ VC = _____ zout = _____
190
Chapter 5
Transistor Circuits
LAB 5.2
191
LAB
Multistage Amplifier
I. Objective To analyze a multistage amplifier to determine the bias and signal values at test points. II. Test Equipment (1) sine wave generator (1) dual-trace oscilloscope (1) 12 V power supply III. Components
5.2
Resistors: (1) 100 , (1) 180 , (1) 680 , (1) 820 , (2) 3.9 k, (3) 8.2 k, (2) 39 k Capacitors: (3) 2.2 F and (2) 10 F Transistors: (2) 2N3904
VCC = 12
39 k 2.2 F 2 kHz 100 mV 3.9 k 39 k 2.2 F 2N3904 8.2 k 10 F 3.9 k 2.2 F
Q1
100  820 
Q2
180  680 
2N3904
RL 8.2 k
8.2 k
10 F
FIGURE 523
IV. Procedure 1. Calculate and record all values listed below for the amplifier circuit in Figure 523. Stage 1: VE = _____ VC = _____ VB = _____ zin = _____ zout = _____ Av = _____ Stage 2: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Total Circuit: Av = _____ zin = _____ zout = _____
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Chapter 5
Transistor Circuits
2. Construct the circuit in Figure 523 and measure the values listed below for the amplifier circuit. Stage 1: VE = _____ VC = _____ VB = _____ Av = _____ zin = _____ zout = _____ Stage 2: VB = _____ VE = _____ VC = _____ zin = _____ zout = _____ Av = _____ Total Circuit: Av = _____ zin = _____ zout = _____ V. Points to Discuss 1. Explain any differences between calculated and measured values.
2. Explain why zin of the first stage equals zin of the total circuit.
3. Explain why zout of the last stage equals zout of the total circuit.
4. Explain why input impedance of the second stage affected the voltage gain of the first stage.
5. The total voltage gain of this circuit could be obtained by using a single-stage amplifier. Explain the advantages of using two stages.
QUESTIONS
193
QUESTIONS
5.1
1.
Introduction
Why is it necessary to stabilize the bipolar transistor amplifier against changes in beta? a. Beta changes with temperature. b. Beta changes with changes in coupling capacitors. c. Beta is different among transistors of the same type. d. Both a and c. The typical beta of a transistor should be considered to be ________. a. +50% and 50% b. +50% and 100% c. +100% and 50% d. +100% and 100% If beta changes, how will the lack of bias stability show up in an amplifier circuit? a. The collector voltage will change. b. The collector current will change. c. The emitter current will change. d. All of the above.
2.
3.
5.2
5.
6.
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Chapter 5
Transistor Circuits
7.
In voltage divider biased amplifiers, the collector voltage is calculated by _____. a. multiplying the collector current times the collector resistor b. multiplying the collector current times the load resistor c. adding the base voltage and the emitter voltage d. subtracting the voltage dropped across the collector resistor from the supply voltage
5.3
8.
5.4
QUESTIONS
195
14. Which type of voltage divider biased amplifier has the highest voltage gain? a. fully bypassed b. split-emitter c. unbypassed d. all the same 15. Which type of voltage divider biased amplifier has the least distortion? a. fully bypassed b. split-emitter c. unbypassed d. all the same
5.5
5.6
196
Chapter 5
Transistor Circuits
5.7
5.8
QUESTIONS
197
5.9
5.10
30. The collector of Q1 in Figure 524 measures approximately 20 V DC. a. The circuit is functioning correctly. b. Capacitor C2 is shorted. c. Capacitor C2 is open. d. Resistor R1 is open. 31. The collector of Q2 in Figure 524 measures 13.8 V DC. a. The circuit is functioning correctly. b. Transistor Q2 is open between the collector and the emitter. c. Capacitor C5 is shorted. d. Resistor R8 is shorted.
VCC = 20 V R3 8 k Q1 C2 C1
40 mVp-p
R1 128 k
R6 66 k
R8 3 k Q2 C3
R2 20 k
R5 1.8 k
R4 200 C4
R7 15 k R10 1.2 k
R9 300 C5
RL 3 k
FIGURE 524
32. The DC voltage at the junction of resistors R4 and R5 in Figure 524 is zero volts. a. The circuit is functioning correctly. b. Transistor Q1 has a collector to emitter short.
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Chapter 5
Transistor Circuits
c. Capacitor C4 is open. d. Resistor R2 is shorted. 33. The signal voltage gain of Q2 in Figure 524 is approximately two times the calculated gain. a. The circuit is functioning correctly. b. Capacitor C3 is open. c. Capacitor C3 is shorted. d. Capacitor C5 is open. 34. The signal voltage gain of Q1 is approximately three. a. The circuit is functioning correctly. b. Capacitor C4 is open. c. Capacitor C4 is shorted. d. Capacitor C2 is open.
PROBLEMS
1. For the circuit in Figure 525, find: VB = ______________ Vc = ____________ VCE = ____________ zin = ______________ VE = ____________ zout = ____________ Av = ___________ Vout = __________
VCC = 18 V
30 k
2 k
20 mVp-p
8 k
800
RL 3 k
FIGURE 525
2. For the circuit in Figure 526, find: VB = ______________ Vc = ____________ VCE = ____________ zin = ______________
PROBLEMS
VCC = 18 V
199
30 k
2 k
20 mVp-p
8 k
800
RL 3 k
FIGURE 526
3. For the circuit in Figure 527, find: Vc = ____________ VB = ____________ VE = ____________ Av = ___________ VCE = ____________ zin = ____________ zout = ____________ Vout = __________ 4. What is the largest signal that can be accommodated at the input of the circuit in Figure 527 before the output begins to clip?
VCC = 18 V
30 k
2 k
C2 C1
20 mVp-p 8 k 100 
RL 3 k C3
700
FIGURE 527
5. If the lowest frequency of operation is to be 100 Hz, select a value for C1, C2, and C3 in the circuit in Figure 527. C1 = _________ C2 = __________ 6. For the circuit in Figure 528, find: Vc = ____________ VB = ______________ VE = ____________ zout = ____________ VCE = ____________ zin = ______________ C3 = __________ Av = ___________ Vout = __________
200
Chapter 5
Transistor Circuits
Vcc = 12 V
3.3 k
50 mVp-p
2 k
300
RL 6 k
5.3 k
VEE = 12 V
FIGURE 528
7. Find the values requested below for the circuit in Figure 529. Stage 1: VB = ____________ Av = ____________ Stage 2: VB = ____________ Av = ____________ Total Circuit: Av = ____________ VE = _____________ zin = _____________ VE = _____________ zin = _____________ zin = _____________
VCC = 12 V R3 1 k Q1 C2 C1
20 mVp-p
R1 18 k
R6 7.4 k
R8 390 Q2 C3
R2 12 k R5 1.2 k
R4 82 C4
R9 22 C5
RL 1 k
FIGURE 529
8. If the lowest frequency of operation is to be 1 kHz, select a value for C1, C2, C3, C4, and C5 in the circuit in Figure 529. C2 = __________ C3 = __________ C1 = _________ C4 = _________ C5 = __________
PROBLEMS
201
9. Find the values requested below for the circuit in Figure 530. Stage 1: VB = ____________ Av = ____________ Stage 2: VB = ____________ Av = ____________ Total Circuit: zin = ____________ VE = _____________ zin = _____________ VE = _____________ zin = _____________ zout = _____________
16 V 8V
1.65 k
6 k
Q1
Q2
7.4 k
Vout
Vin
3.6 k 8 V
16 V
FIGURE 530