• BJT Circuits & Limitations

• LTspice

Acnowledgements:
Neamen, Donald: Microelectronics Circuit Analysis and Design, 3rd Edition

6.101 Spring 2017 Lecture 4 1

 General Configuration

Common
Emitter

Common
Common Base
Collector

6.101 Spring 2017 Lecture 4 2

 Transistor Configurations
TRANSISTOR AMPLIFIER CONFIGURATIONS

+15V +15V +15V

RL RL
R2 R2 R2

+ +

+ +

+ +
+
+
+
+
R1 VOUT + + VOUT
Vin R1 RE

+
Vin RE VOUT Vin R1 RE
- -
- - - -

[a] Common Emitter Amplifier [b] Common Collector [Emitter Follower] Amplifier [c] Common Base Amplifier

6.101 Spring 2017 Lecture 4 3

 Base Current – Resistor Divider

IC F
3.7 mA 50
4.0 mA 100
68K
4.2 mA 200
ib 4.3 mA 300
IC=0.6 mA

33K
Make ib small
compared to the
current through R2

6.101 Spring 2017 Lecture 4 4

 Commom Emitter – Hybrid π
TRANSISTOR AMPLIFIER CONFIGURATIONS WITH HYBRID- EQUIVALENT CIRCUITS

COMMON EMITTER AMPLIFER

+15V
 0 g m r
I CQ
RB
RL IC gm  VTH  26mv
VTH
C 2N3904
+ +

IB
Rs
vout v
+
vin
_ _
g m v

v1in
b c v1out   oib RL   o RL
Av  1  
ib r 
+
r ib
v in r
Rs
v1out
vout   o RL
RB RL
then Av    g m RL
+
vin e
o
_ _
gm

6.101 Spring 2017 Lecture 4 5

 Common Emitter with Emitter Degeneration

v1out   o ib RL   o RL
Av  1   ;
v in ib r   o  1RE  r   o  1RE

if r   o  1RE ; then Av  RL / RE

1
• Input resistance (β+1)RE
v out • Voltage  gain reduced by (1+gm RE)
v1in • Voltage gain less dependent on β
(linearity)

6.101 Spring 2017 Lecture 4 6

 AC Coupled vs DC Coupled Amplifiers
• AC Coupling
– Advantage: easy cascading 
with DC blocking capacitor, 
bias stability and stage 
independent
– Disadvantage: lot’s of R’s  
and C’s, no DC gain, need 
large C for low freqency

• DC coupling
– Some gain at DC
– Fewer R’s C’s

6.101 Spring 2017 Lecture 4 7

 Gain vs Frequency

6.101 Spring 2017 Lecture 4 8

 Cutoff Frequency Analysis

6.101 Spring 2017 Lecture 4 9

 Low Pass Filter LPF
log scale
AV (dB)

R 0
V1 C V2 -3dB

slope = -6 dB / octave
slope = -20 dB / decade

log f
1 fHI or f-3dB
V2  j XC j C 1
Av    
V1 R   j X C R  1 j RC  1 Degrees
j C
1
Av  PHASE LAG
sRC  1 0o

-45o
1
High frequency cutoff f   -90o
2RC

log f
fHI or f-3dB

6.101 Spring 2017 Lecture 2 10

 Cutoff Frequency Analysis

1 1
3db f3db  f  
2 RC 2 r (C  C )
gm
but  0  g m r or f 
2 r (C  C ) 

vbe
ib   vbe j (C  C )
r
g v gm r 
h fe  m be  
ib 1 j r (C  C ) 1 j r (C  C )

 gm
h fe  ft  h fe  1 or ft 
1 j(
f
) 2 r (C  C )
f

6.101 Spring 2017 Lecture 4 11

 Cutoff Frequency Parameters

 q 
g m    IC
 kT 
0  h fe (datasheet)
C  Cob (datasheet)
gm
 fT (transit frequency datasheet)
2 (C  C )
gm
C   C
2 fT r

6.101 Spring 2017 Lecture 4 12

 β

Use max for worst

case cu

6.101 Spring 2017 Lecture 4 13

 Miller Effect* – Common Emitter

CM  C [1  g m ( RC RL )]
• Neamen, Microlectronics 3rd Edition p 514

6.101 Spring 2017 Lecture 4 14

 Miller Effect

RC RC  4k r 2.6k RB  200k

C  4 pF C 0.2 pF gm 38.5ma / V
1
f3db  f  15.5MHz
2  r ||RB  (C  C )

with Miller Effect

CM  C [1 gm (RC RL )]
1
f3db  f  3.16MHz
2  r ||RB  (C  CM )

*Neamen, Microlectronics 3rd Edition p 515

6.101 Spring 2017 Lecture 4 15

 2N3904
CE configuration,
VCC +15v

6.101 Spring 2017 Lecture 4 16

 Common Base Configuration

6.101 Spring 2017 Lecture 4 17

 Common Collector (Emitter Follower)
 0 g m r
I CQ
gm  VTH  26mv
VTH

v1out  o  1ib RE  o  1 RE
Av  1   ;
v in ib R 's  r   o  1RE  R 's  r   o  1RE

if r   o  1RE ; then Av  1

• Buffer with unity gain
• High input resistance driving low 
v1in
v1out output resistance (current gain).

6.101 Spring 2017 Lecture 4 18

 Common Collector – Emitter Follower Biasing

+15V
• Β = 100, iB = 7.5ma/100 =‐ 75µa
7.5 mA • Using Thevenin equivalent, 
R2

 R1 
A
RB = R1||R2,   VB = 15 
2N3904
 1
R  R2 

R1 1.0 k
7.5 mA
VB = IBRB + 0.6V + 7.5V
B
VB = [75 µA x 10k] + 0.6V + 7.5V
VB = 750 mV + 0.6V + 7.5V
+15V VB = 8.9V

7.5 mA [15 R1] ÷ [R1 + R2] = 8.9V

15 R1 = 8.9 x [R1 + R2]
2N3904
IB [15−8.9] R1 = 8.9 R2
RB R1 = 1.44 R2
7.5 V [R1 x R2] ÷ [R1 + R2] = 10 kΩ
VB

[1.44R2 x R2] ÷ [1.44 R2 + R2] = 10kΩ

R2 = 16.9 kΩ (use 16 kΩ)
R1 = 1.44 R2 = 24.4 kΩ  (use 24 kΩ)

6.101 Spring 2017 Lecture 4 19

 Common Collector – Emitter Follower Biasing

• With R1 = 24kΩ,  R2 = 16 kΩ, the current 
+15V through the voltage divider is 15 ÷ [40 
kΩ] = 375 µA.
7.5 mA
R2 IDivider • The 75 µA base current is 20% of 375 µA.
A
8.1 V 2N3904 • With R1 = 2 kΩ, will need a divider 
current that is ~ 4.1 mA. (75 µA is only 
R1
~2% of 4.1 mA, which is negligible)
1.0 k
7.5 mA

B
• The voltage drop across R2 will be [15 V –
8.1 V] = 6.9 V;  R2 = 1.7 kΩ

• But input impedance will be low = ~890Ω

• Use bootstrapping configuration

= 24.4 kΩ  (use 24 kΩ)

6.101 Spring 2017 Lecture 4 20

 Low Frequency Hybrid‐ Equation Chart

High gain applications Unity gain, low High gain, better high
Moderate input resistance output resistance frequency response
High output resistance High input resist. Low input resistance

6.101 Spring 2017 Lecture 4 21

 Introduction to LTspice

Acknowledgment:  LTspice material based in part by 
Devon Rosner (6.101 TA), Engineer, Linear Technology

6.101 Spring 2017 Lecture 4 22