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Central Processing Unit

This document discusses the evolution of CPU architectures from CISC to RISC designs. It notes that initially RISC chips utilized simpler instructions compared to CISC, but that over time as transistor counts increased, RISC chips grew more complex while CISC chips adopted some RISC techniques. However, key RISC traits like uniform single-cycle instructions and register-to-register load/store architectures remain distinguishing factors. While the lines have blurred, some argue we are now in a "post-RISC" era as the approaches converge, but important differences still exist between RISC and CISC implementations.

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45 views55 pages

Central Processing Unit

This document discusses the evolution of CPU architectures from CISC to RISC designs. It notes that initially RISC chips utilized simpler instructions compared to CISC, but that over time as transistor counts increased, RISC chips grew more complex while CISC chips adopted some RISC techniques. However, key RISC traits like uniform single-cycle instructions and register-to-register load/store architectures remain distinguishing factors. While the lines have blurred, some argue we are now in a "post-RISC" era as the approaches converge, but important differences still exist between RISC and CISC implementations.

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Central Processing Unit

MAJOR COMPONENTS OF CPU


REGISTERS
GENERAL REGISTER ORGANIZATION
OPERATION OF CONTROL UNIT
ALU CONTROL
ALU CONTROL
REGISTER STACK ORGANIZATION
MEMORY STACK ORGANIZATION
REVERSE POLISH NOTATION
PROCESSOR ORGANIZATION
INSTRUCTION FORMAT
THREE, AND TWO-ADDRESS INSTRUCTIONS
ONE, AND ZERO-ADDRESS INSTRUCTIONS
ADDRESSING MODES
TYPES OF ADDRESSING MODES
TYPES OF ADDRESSING MODES
TYPES OF ADDRESSING MODES
TYPES OF ADDRESSING MODES
ADDRESSING MODES - EXAMPLES
DATA TRANSFER INSTRUCTIONS
DATA MANIPULATION INSTRUCTIONS
FLAG, PROCESSOR STATUS WORD
PROGRAM CONTROL INSTRUCTIONS
CONDITIONAL BRANCH INSTRUCTIONS
SUBROUTINE CALL AND RETURN
INTERRUPT PROCEDURE
PROGRAM INTERRUPT
RISC: Historical Background
ARGUMENTS ADVANCED AT THAT TIME
ARCHITECTURE DESIGN PRINCIPLES - IN 70’s -
COMPLEX INSTRUCTION SET COMPUTER
VARIABLE LENGTH INSTRUCTIONS
VARIABLE LENGTH INSTRUCTIONS
COMPLEX INSTRUCTION SET COMPUTER
REDUCED INSTRUCTION SET COMPUTERS
REDUCED INSTRUCTION SET COMPUTERS
REGISTERS
REGISTERS
Modern Day Advancement
CISC and RISC implementations are becoming more and more alike.
Many of today’s RISC chips support as many instructions as yesterday's
CISC chips. And today's CISC chips use many techniques formerly
associated with RISC chips.
To some extent, the argument is becoming moot because CISC and
RISC implementations are becoming more and more alike. Many of
today's RISC chips support as many instructions as yesterday's CISC
chips. And today's CISC chips use many techniques formerly associated
with RISC chips.

CISC and RISC Convergence


State of the art processor technology has changed significantly since
RISC chips were first introduced in the early '80s. Because a number
of advancements are used by both RISC and CISC processors, the
lines between the two architectures have begun to blur. In fact, the
two architectures almost seem to have adopted the strategies of the
other. Because processor speeds have increased, CISC chips are now
able to execute more than one instruction within a single clock. This
also allows CISC chips to make use of pipelining. With other
technological improvements, it is now possible to fit many more
transistors on a single chip.
Modern Day Advancement (cont.)
This gives RISC processors enough space to incorporate more
complicated, CISC-like commands.

RISC chips also make use of more complicated hardware, making


use of extra function units for superscalar execution. All of these
factors have led some groups to argue that we are now in a "post-
RISC”, in which the two styles have become so similar that
distinguishing between them is no longer relevant.

However, it should be noted that RISC chips still retain some


important traits. RISC chips stricly utilize uniform, single-cycle
instructions.

They also retain the register-to-register, load/store architecture.


And despite their extended instruction sets, RISC chips still have a
large number of general purpose registers.
CIRCULAR OVERLAPPED REGISTER WINDOWS
OVERLAPPED REGISTER WINDOWS
OVERLAPPED REGISTER WINDOWS
OVERLAPPED REGISTER WINDOWS
OVERLAPPED REGISTER WINDOWS
CHARACTERISTICS OF RISC
ADVANTAGES OF RISC
ADVANTAGES OF RISC

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