ARCHITECTURE
• The MSP430 CPU has a 16-bit RISC
architecture. The architecture of MSP430 Can
be understood from the following diagram.
• The controller‟s performance is directly
related to the 16-bit data bus, the 7 addressing
modes and the reduced instructions set ,
which allows a shorter, denser programming
code for fast execution.
Contd…
• These MSP controller families share a 16-bit
CPU core, RISC type, intelligent peripherals,
and flexible clock system that interconnects
using a Von Neumann common memory
address bus (MAB) and memory data bus
(MDB) architecture.
Architecture-MSP430
MSP430 CPU
• The CPU of MSP 430 includes a 16-bit ALU
and a set of 16 Registers R0 –R15.In these
registers Four are special Purpose and 12 are
general purpose registers . All the registers
can be addressed in the same way.
• The special Purpose Registers are
PC (Program Counter), SP (Stack Pointer) ,
SR (Status Register) and CGx (Constant
Generator).
Memory Space
• All memory including RAM, ROM/FLASH,
information memory, Special Function
Registers (SFRs) and peripheral registers are
mapped into a single, contiguous address
space.
• The CPU is capable of addressing data values
either as bytes (8 bits) or words (16 bits).
Words are always addressed at an even
address , which contain the least significant
byte, followed by the next odd address, which
contains the most significant byte.
• The interrupt vector table is mapped at the very
end of memory space (upper 16 words of
Flash/ROM), in locations 0FFE0h through to
0FFFEh (see the device-specific datasheets).
The priority of the interrupt vector increases
with the word address .
• The start address of Flash/ROM depends on
the amount of Flash/ROM present on the
device. The start address varies
between01100h (60k devices) to 0F800h (2k
devices) and always runs to the end of the
address space at location 0FFFFh.
• Flash can be used for both code and data.
Word or byte tables can also be stored
andread by the program from Flash/ROM. All
code, tables, and hard-coded constants reside
in this memory Space.
• The MSP430 flash devices contain an address
space for information memory. It is like an
onboard EEPROM, where variables needed
fort he next power up can be stored during
power down. It can also be used as code
memory.
Contd…
• The MSP430 flash devices contain an address
space for boot memory, located between
addresses 0C00h through to 0FFFh. The“
bootstrap loader” is located in this memory
space, which is an External interface that can
be used to program the flash memory in
addition to the JTAG. This memory region is
not accessible by other applications, so it
cannot be overwritten accidentally.
• RAM always starts at address 0200h. The end
address of RAM depends on the amount of RAM
present on the device. RAM is used for both code
and data.
• Peripheral modules consist of all on-chip
peripheral registers that are mapped into the
address space. These modules can be accessed
with byte or word instructions, depending if the
peripheral module is 8-bit or 16-bit respectively.
The 16-bit peripheral modules are located in the
address space from addresses 0100 through to
01FFh and the 8-bit peripheral modules are
mapped into memory from addresses 0010h
through to 00FFh.
