MSP 430
Architecture of MSP 430
• Figure 2.2 shows a block diagram of the F2013.
• These are its main features:
• On the left is the CPU and its supporting hardware, including the clock
generator. The emulation, JTAG interface and Spy-Bi-Wire are used to
communicate with a desktop computer when downloading a program and for
debugging
• The main blocks are linked by the memory address bus (MAB) and memory data
bus (MDB).
•These devices have flash memory, 2 KB in the F2013, and 128 bytes of RAM.
• Six blocks are shown for peripheral functions (there are many more in larger
devices). All MSP430s include input/output ports, Timer_A, and a watchdog timer,
although the details differ. The universal serial interface (USI) and sigma–delta
analog-to-digital converter (SD16_A) are particular features of this device.
• The brownout protection comes into action if the supply voltage drops to a
dangerous level. Most devices include this but not some of the MSP430x1xx
family.
• There are ground and power supply connections. Ground is labeled VSS and is
taken to define 0 V. The supply connection is VCC. For many years, the standard
for logic was VCC = +5 V but most devices now work from lower voltages and a
range of 1.8–3.6 V is specified for the F2013. The performance of the device
depends on VCC. For example, it is unable to program the flash memory if VCC <
2.2 V and the maximum clock frequency of 16 MHz is available only if VCC ≥ 3.3 V
Addressing Modes
The MSP430 architecture has seven possibilities to address its operands. Four of
them are implemented in the CPU, two of them result from the use of the
program counter (PC) as a register, and a further one is claimed by indexing a
register that always contains a zero (status register). The single operand
instructions can use all of the seven addressing modes, the double operand
instructions can use all of them for the source operand, and four of them for the
destination operand. Figure 8–3 shows this context:
• Register Addressing
The operand is contained in one of the registers R0 to R15. This is the fastest
addressing mode and the one that needs the least memory.
Example:
• Indirect Register Addressing with Autoincrement
The register used contains the address of the operand. The operand can be located
anywhere in the entire memory space (64K).
Example:
Indirect Register Addressing
The register used contains the address of the operand. This operand can be located
anywhere in the entire memory space (64K). After the access to the operand the
used register is incremented by two (word instruction) respective one (byte
instruction). The increment occurs immediately after the reading of the source
operand.
Example:
Indexed Addressing
The address of the operand is the sum of the index and the contents of the register
used. The index is contained in an additional word located after the instruction
word. Example:
If the register in use is the program counter then two additional, important
addressing modes result:
Immediate Addressing
Any 16-bit or 8-bit constant can be used with an instruction. The PC points to the
following word after reading the instruction word. By the use of the register
indirect autoincrement addressing mode, this word (the immediate value) can be
read and the PC is incremented by two afterwards. The word after the instruction
word is treated this way as an 8-bit or a 16-bit immediate value. Example:
Symbolic Addressing
This is the normal addressing mode for the random access to the entire 64K
memory space. The word located after the instruction word contains the difference
in bytes to the destination address relative to the PC. This difference can be seen as
an index to the PC. Any address in the 64K memory map is addressable this way,
both as a source and as a destination. Example: $ = address the PC points to
Absolute Addressing
Addresses that are fixed (e.g., the hardware addresses of the peripherals like
ADC, UART) can be addressed absolutely. The absolute addressing mode is a
special case of the indexed addressing mode. The register used (SR) always
contains a zero in this case (without loosing its former information!). Example:
Low Power Features of MSP 430
• From the beginning, the design objective of the MSP430 team was to focus
on the ultra-low power consumption of the complete system.
• The goal was to create a microcontroller which consumes very little
current in the sleep modes and performs the given tasks in the active mode
as fast as possible.
• To reduce the current consumption of a system, the MSP430 allows
designers the ability to influence the active current consumption and active
time as well as sleep mode current consumption and sleep time.
• The active mode current consumption of the MSP430 is 400 µA in a
typical 3-V system.
• The time to wake-up from the sleep mode to a total functional system
takes a maximum of 6 µs.
• This allows the MSP430 to be in sleep modes longer and eliminates
unnecessary energy use in the active mode.
• The powerful 16-bit CPU core ensures a fast execution of the tasks and
therefore reduces the active time.
• This means that the higher the performance of the CPU core, the lower
the system power consumption.
• All MSP430 peripheral modules are specially designed to support these
ultralow power features.
• The sleep modes offer a reduced current consumption even when some
peripherals are still active.
• For example, in a simple real time clock (RTC), it is not necessary to keep
the device in active mode. Another example, the system can operate from
the 32-kHz (ACLK) clock instead of 1-4 MHz (MCLK) with the timers and
LCD still active.
• These examples are benefits of the most often used low-power mode 3
(LPM3) which consumes 1.3 µA typically.
• The current consumption can be reduced down to 0.1 µA in LPM4 where
the MSP430 is still capable of processing external interrupts, for example
from a connected keyboard.
• The sleep time can be maximized due to the fast wakeup from the low-
power modes.
