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DIGITAL LOGIC:
CHAPTER 3

Logic Gates
 Chapter Outline
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 The Inverter
 The AND Gate
 The OR Gate
 The NAND Gate
 The NOR Gate
 The Exclusive-OR and Exclusive-NOR
Gates
 Fixed-Function Logic: IC Gates
The Inverter
 Performs inversion or complementation
 Changes a logic level to the opposite

 0(LOW)  1(HIGH) ; 1  0;

 Symbols used:
1

(a) Distinctive shape symbols (b) Rectangular outline symbols

with negation indicators with polarity indicators
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 Inverter operation:
HIGH (1) HIGH (1)
LOW (0) LOW (0)
t1 t2 t1 t2
Input Output
Pulse Pulse

 Logic expression for an Inverter:

A X
0 1
A X=A
1 0

X is the complement of A
A X is the inverse of A
X is NOT A
"A bar"
"not A"
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The AND Gate
 Performs ‘logical multiplication’
 If all of the input are HIGH, then the output is
HIGH.
 If any of the input are LOW, then the output is
LOW.

&
 Symbols used:
A
X
A
X
B B

(a) Distinctive shape (b) Rectangular outline with

the AND (&) qualifying symbol

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 AND gate operation:

LOW (0)
LOW (0) A
LOW (0) X=A B
B
HIGH (1) AND
LOW (0)
LOW (0)
A
B X=A B C
LOW (0) C
LOW (0)
HIGH (1)
A
HIGH (1) B
C X = ABCD
HIGH (1)
HIGH (1) D
 A INPUTS OUTPUT
X=A B
A B X
B or
AND 0 0 0
X = AB
0 1 0
1 0 0
1 1 1

1 0 1 1 0

1 1 1 0 0

1 0 1 0 0

t1 t2 t3 t4 t5

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 Logic expressions for AND gate:
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 AND gate performs Boolean

multiplication
 Boolean multiplication follows the same
basic rule as binary multiplication:
0.0=0
0.1=0
1.0=0
1.1=1
The OR Gate
 Performs ‘logical addition’
 If any of the input are HIGH, then the output is HIGH.
 If all of the input are LOW, then the output is LOW

 Symbols used:
1
A A
X X
B B

(a) Distinctive shape (b) Rectangular outline with

the OR ( 1) qualifying symbol

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 The OR gate operation:
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LOW (0) A
LOW (0) X=A+B
LOW (0)
B

HIGH (1)
HIGH (1) A
LOW (0) B X=A+B+C
C
LOW (0)
HIGH (1)
HIGH (1) A
B X=A+B+C+D
C
HIGH (1) D
HIGH (1)
HIGH (1)
 INPUTS OUTPUT
A
X=A+B A B X
B
0 0 0
0 1 1
1 0 1
1 1 1

1 0 0 1 0

1 1 1 0 0

1 1 1 1 0

t1 t2 t3 t4 t5

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 Logic expressions for OR gate:
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 OR gate performs Boolean addition

 Boolean addition follows the basic rules
as follows:
0+0=0
0+1=1
1+0=1
1+1=1
The NAND Gate
 NAND  NOT-AND combines the AND
gate and an inverter
 Used as a universal gate
 Combinations of NAND gates can be used to perform AND,
OR and inverter operations
 If all or any of the input are LOW, then the output is HIGH.
 If all of the input are HIGH, then the output is LOW
 Symbol used: A
&
X
B
A A (b) Rectangular outline: 2 input
X X NAND gate with polarity indicator
B B

(a) Distinctive shape: 2 input NAND

gate and its NOT/AND equivalent

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 The NAND gate operation:
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A
X
LOW (0)
B
HIGH (1)
LOW (0)

HIGH (1)

LOW (0)
HIGH (1) A
LOW (0)
B X
HIGH (1)
HIGH (1)
C
HIGH (1)
LOW (0)
HIGH (1)
 INPUTS OUTPUT
A
X = AB A B X
B
0 0 1
0 1 1
1 0 1
1 1 0

1 0 0 1 0

1 1 1 0 0

0 1 1 1 1

t1 t2 t3 t4 t5

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Logic expressions for NAND gate:

 Boolean expression for NAND is a

combination of AND and Inverter Boolean
expressions.
INPUTS OUTPUT
A B AB AB = X
0 0 0 0.0 = 0 = 1
0 1 0 0.1 = 0 = 1
1 0 0 1.0 = 0 = 1
1 1 1 1.1 = 1 = 0

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The NOR Gate
 NOR  NOT-OR combines the OR gate
and an inverter
 Used as a universal gate
 Combinations of NOR gates can be used to
perform AND, OR and inverter operations
 If all or any of the input are HIGH, then the
output is LOW.
 If all of the input are LOW, then the output is
HIGH
 Symbol
A
used:
A 1
X A
X X
B B B

(a) Distinctive shape: 2 input NOR (b) Rectangular outline with

gate and its NOT/OR equivalent the OR ( 1) qualifying symbol
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 The NOR gate operation:
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LOW (0)
HIGH (1)
LOW (0)
A
X
HIGH (1) B
LOW (0)
LOW (0)
A
LOW (0) B X
LOW (0) C
HIGH (1)

HIGH (1)
LOW (0)
HIGH (1)
 INPUTS OUTPUT
A
X=A+B A B X
B
0 0 1
0 1 0
1 0 0
1 1 0

1 0 0 1 0

1 0 1 0 0

0 1 0 0 1

t1 t2 t3 t4 t5
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Logic expressions for NOR gate:
 Boolean expression for NOR is a
combination of OR and Inverter Boolean
expressions.
INPUTS OUTPUT
A B A+B A+B=X
0 0 0 0+0 = 0 = 1
0 1 1 0+1 = 1 = 0
1 0 1 1+0 = 1 = 0
1 1 1 1+1 = 1 = 0

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The Exclusive-OR gate
(Litar Pembanding Nilai Tak Sama)

 Combines basic logic circuits of AND, OR

and Inverter. Has only 2 inputs
 Used as a universal gate
 Can be connected to form an adder that allows a
computer to do perform addition, subtraction,
multiplication and division in ALU (Arithmetic and Logic
Unit).
 If both of the input are at the same logic level, then the
output is LOW.
 If both of the input are at opposite logic levels, then the
output is HIGH A X A
=1
X
 Symbol used: B B

(a) Distinctive shape (b) Rectangular outline

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 The XOR gate operation:
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LOW (0)
LOW (0)
LOW (0)

HIGH (1) A
HIGH (1) X
LOW (0) B

LOW (0)
HIGH (1)
HIGH (1)

HIGH (1)
LOW (0)
HIGH (1)
 INPUTS OUTPUT
A
X = AB + BA A B X
B
=A B 0 0 0
0 1 1
1 0 1
1 1 0

1 0 0 1 0
Sama 0
A
Tak sama 1
1 0 1 0 0

0 0 1 1 0

t1 t2 t3 t4 t5

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The Exclusive-NOR gate
(Litar Pembanding Nilai Sama)

 Has only 2 inputs, but output of XNOR is

the opposite of XOR
 If both of the input are at the same logic level,
then the output is HIGH.
 If both of the input are at opposite logic levels,
then the output is LOW.
 Symbol used:
A =1
A
X X
B B

(a) Distinctive shape (b) Rectangular outline

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 The XNOR gate operation:
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LOW (0)
LOW (1)
LOW (0)

HIGH (1) A
HIGH (0) X
LOW (0) B

LOW (0)
HIGH (0)
HIGH (1)

HIGH (1)
LOW (1)
HIGH (1)
 INPUTS OUTPUT
A
X=A B A B X
B
0 0 1
0 1 0
1 0 0
1 1 1

1 0 0 1 0
Sama 1
A
Tak sama 0
1 0 1 0 0

1 1 0 0 1

t1 t2 t3 t4 t5
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 XOR vs XNOR
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1 0 0 1 0

1 0 1 0 0

0 0 1 1 0

XOR

1 1 0 0 1

XNOR
t1 t2 t3 t4 t5
 Fixed-function Logic : IC
28 Gates
 3 digital IC technologies used to
implement basic logic gates:
 CMOS (Complementary Metal-Oxide
Semiconductor)
 TTL (Transistor-Transistor Logic)
 ECL (Emitter-Coupled Logic)

 CMOS and TTL is widely used

 ECL is for more specialized applications
 CMOS vs TTL
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 The logic operations of all gates are the

same regardless of the IC technology
used
 CMOS and TTL differ only in the type of
circuit components and value
parameters; not in the basic logic
operations.
 CMOS AND gate = TTL AND gate.
 CMOS
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 Advantage:
 Lower power dissipation
 There are 2 categories:
 5V & 3.3V
 Prefix : 74 and 54
 74 : commercial grade for general use
 54 : military grade for more severe environments
  5V Series
 74HC and 74HCT – High-speed CMOS
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 74AC and 74ACT – Advanced CMOS
 74AHC and 74AHCT – Advanced High-speed CMOS
 3.3V Series
 74LV – Low-voltage CMOS
 74LVC – Low-voltage CMOS
 74ALVC – Advanced Low-voltage CMOS
 4000 Series
 Older, low-speed
 Combination of CMOS and TTL  BiCMOS
 74BCT - BiCMOS
 74ABT – Advanced BiCMOS
 74LVT – Low-voltage BiCMOS
 74ALB – Advanced Low-voltage BiCMOS
 TTL
32  Advantage:
 Faster switching speed – CMOS is catching up
 Greater selection of device types
 Not sensitive to electrostatic discharge
 All TTL operates on 5V and comes in 74 or
54 prefixes.
 TTL Series:
 74 – Standard TTL
 74S – Schottky TTL
 74AS – Advanced Schottky TTL
 74LS – Low-power Schottky TTL
 74ALS – Advanced Low-power Schottky TTL
 74F – Fast TTL
Types of Fixed-Function Logic
Gates
 All the basic logic Quad 2-input NAND
→ 00
Triple 3-input NAND
→ 10
configurations are Quad 2-input NOR Triple 3-input AND
available in some or → 02 → 11
Quad 2-input 0R → Triple 3-input NOR
all of the IC 32 → 27

technologies. Quad 2-input XOR

→ 86
Dual 4-input NAND
→ 20
 These are identified Quad 2-input AND Dual 2-input AND →
→ 08 21
by the last 2/3 digits Single 8-input Hex inverter → 04
in the series NAND → 30

designation
 Some examples:

74LS04 : Low-power 33
Schottky hex
 Quad 2-input AND
4 AND gates
Each AND gate has 2 inputs
8 pins for inputs & 4 pins for outputs 8 7 GND

9 6

10 5

11 4

12 3

13 2

VCC 14 1

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 All of the 74 series CMOS are pin-

compatible with the same types of
devices in TTL
 Typical IC gate packages:
 Dual in-line package (DIP)
 Small-outline integrated circuit (SOIC)
 DIP and SOIC packages
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  IC Package
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 A package of pins and gates integrated
together
 Single-gate Logic
 1 gate to a package, 5-pin package
 For last minute modifications
 Logic Symbols
 Logic symbols for fixed-function IC use the
standard gate symbols
 Regardless of the logic family, all devices with
the same suffix are pin-compatible  they will
have the same arrangement of pin numbers.
 E.g. 7400, 74S00, 74LS00, 74ALS00, 74F00, 74HC00,
74AHC00  all pin-compatible quad 2-input NAND
gate packages
Performance Characteristics &
Parameters
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 Propagation Delay Time
Time interval between the application of an
input and the occurrence of the resulting output
pulse :
↓Propagation delay: ↑circuit speed, ↑operation
frequency
↑Propagation delay: ↓circuit speed, ↓operation
frequency

 DC Supply Voltage (VCC)

 The supply of voltage of CMOS can vary over a
wider range than TTL
 5V CMOS → 2V – 6V
 3.3V CMOS → 2V – 3.6V
  Power Dissipation (Pelesapan kuasa)
 ↓power dissipation means less current (arus
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elektrik) from the dc supply

 Input and Output Logic Levels

 Explanation

 Speed-Power Product (SPP)

 Can be used to measure performance of a logic
circuit taking into account the propagation delay
time and the power dissipation.
 SPP = (propagation delay time)*(power
dissipation)

 Fan-Out and Loading

 explanation
 Link
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www.kpsec.freeuk.com/gates.htm
isweb.redwoods.edu/INSTRUCT/CalderwoodD/diglogic/index.htm
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END OF CHAPTER 3