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Datasheet IRFP 9240

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322 views7 pages

Datasheet IRFP 9240

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AguilaSolitaria
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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IRFP9240

Data Sheet July 1999 File Number 2294.3

12A, 200V, 0.500 Ohm, P-Channel Power Features


MOSFET • 12A, 200V
This P-Channel enhancement mode silicon gate power field
• rDS(ON) = 0.500Ω
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of • Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of • SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers, • Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching • Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
• High Input Impedance
These types can be operated directly from integrated
circuits. Symbol
Formerly developmental type TA17522. D

Ordering Information
G
PART NUMBER PACKAGE BRAND

IRFP9240 TO-247 IRFP9240


S
NOTE: When ordering, use the entire part number.

Packaging
JEDEC STYLE TO-247

SOURCE
DRAIN
GATE

DRAIN
(TAB)

4-71 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
IRFP9240

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified


IRFP9240 UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS -200 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -200 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -12 A
TC = 125oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -7.5 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM -48 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 150 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 790 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS


Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V (Figure 10) -200 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2.0 - -4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = -10V -12 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = -6.3A, VGS = -10V (Figures 8, 9) - 0.380 0.500 Ω
Forward Transconductance (Note 2) gfs VDS ≤ -50V, ID = -6.3A (Figure 12) 3.8 5.7 - S
Turn-On Delay Time td(ON) VDD = -100V, ID ≈ -12A, RG = 9.1Ω, - 18 22 ns
VGS = -10V, RL = 7.6Ω, (Figures 17, 18)
Rise Time tr - 45 68 ns
MOSFET Switching Times are Essentially Indepen-
Turn-Off Delay Time td(OFF) dent of Operating Temperature - 75 90 ns
Fall Time tf - 29 44 ns
Total Gate Charge Qg(TOT) VGS = -10V, ID = -12A, VDS = 0.8 x Rated BVDSS - 38 57 nC
(Gate to Source + Gate to Drain) Ig(REF) = -1.5mA (Figures 14, 19, 20)
Gate Charge is Essentially Independent of Operat-
Gate to Source Charge Qgs - 8 - nC
ing Temperature
Gate to Drain “Miller” Charge Qgd - 21 - nC
Input Capacitance CISS VDS = -25V, VGS = 0V, f = 1MHz - 1400 - pF
(Figure 11)
Output Capacitance COSS - 350 - pF
Reverse Transfer Capacitance CRSS - 140 - pF
Internal Drain Inductance LD Measured From the Con- Modified MOSFET - 5.0 - nH
tact Screw on Header Symbol Showing the
Closer to Source and Gate Internal Devices
Pins to Center of Die Inductances
D
Internal Source Inductance LS Measured From the - 12.5 - nH
Source Pin, 6mm (0.25in) LD
From Header to Source
Bonding Pad G
LS

S
Thermal Resistance Junction to Case RθJC - - 0.83 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W

4-72
IRFP9240

Source to Drain Diode Specifications


PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET Symbol - - -12 A
Showing the Integral Re- D
Pulse Source to Drain Current ISDM - - -48 A
verse P-N Junction Rectifier
(Note 3)

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = -12A, VGS = 0V, (Figure 13) - - -1.5 V
Reverse Recovery Time trr TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 210 - ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = -11A, dISD/dt = 100A/µs - 2.0 - µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 8.2mH, RG = 50Ω, peak IAS = 12A (Figures 15, 16).

Typical Performance Curves Unless Otherwise Specified

1.2 15
POWER DISSIPATION MULTIPLIER

1.0
12
ID, DRAIN CURRENT (A)

0.8
9

0.6
6
0.4

3
0.2

0.0 0
0 25 50 75 100 125 150 25 50 75 100 125 150
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

2
1
0.5
THERMAL IMPEDANCE

0.2
ZθJC, NORMALIZED

0.1 0.1
0.05 PDM
0.02
0.01
t1
10-2 SINGLE PULSE t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
10-3
10-5 10-4 10-3 10-2 0.1 1 10
t1, RECTANGULAR PULSE DURATION (S)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

4-73
IRFP9240

Typical Performance Curves Unless Otherwise Specified (Continued)

-103 20
PULSE DURATION = 80µs
VGS = -10V
VGS = -8V DUTY CYCLE = 0.5% MAX
10µs
16 VGS = -7V

ID, DRAIN CURRENT (A)


ID, DRAIN CURRENT (A)

-102 100µs

12
1ms
-10 VGS = -6V
10ms 8
OPERATION IN THIS
AREA IS LIMITED
BY rDS(ON)
DC
-1 4 VGS = -5V

TJ = MAX RATED VGS = -4V


SINGLE PULSE
-0.1 0
-1 -10 -102 -103 0 20 40 60 80 100
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

20 -102
PULSE DURATION = 80µs VGS = -10V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
16 VDS ≤ -50V
VGS = -8V
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

-10
12 VGS = -7V

8 TJ = 150oC TJ = 25oC
VGS = -6V -1.0

4 VGS = -5V

VGS = -4V
0 -0.1
0 2 4 6 8 10 0 -2 -4 -6 -8 -10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

5 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE

DUTY CYCLE = 0.5% MAX


VGS = -10V, ID = -6.3A
rDS(ON), DRAIN TO SOURCE

4 2.4
ON RESISTANCE (Ω)

ON RESISTANCE

3 1.8

VGS = -10V

2 1.2

1 0.6

VGS = - 20V
0 0
0 -10 -20 -30 -40 -50 -40 0 40 80 120 160
ID, DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)

NOTE: Heating effect of 2µs pulse is minimal.


FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

4-74
IRFP9240

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 3000
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD


1.15 2400 CRSS = CGD
BREAKDOWN VOLTAGE

COSS ≈ CDS + CGD

C, CAPACITANCE (nF)
1.05 1800
CISS

0.95 1200

COSS
0.85
600
CRSS
0.75
-40 0 40 80 120 160 0
-1 -2 -5 -10 -2 -5 -102
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

10 -100
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≤ -50V
gfs, TRANSCONDUCTANCE (S)

8
TJ = 150oC
ISD, DRAIN CURRENT (A)

TJ = 25oC
-10
TJ = 25oC
6

TJ = 150oC
4
-1.0

0 -0.1
0 -4 -8 -12 -16 -20 -0.4 -0.6 -0.8 -1.0 -1.2 -1.4 -1.6 -1.8
I D , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = -12A

VDS = -160V
16
VGS, GATE TO SOURCE (V)

VDS = -100V
VDS = -40V
12

0
0 12 24 36 48 60
Qg(TOT), TOTAL GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

4-75
IRFP9240
so

Test Circuits and Waveforms

VDS
tAV

L 0

VARY tP TO OBTAIN
RG
-
REQUIRED PEAK IAS
VDD
+

0V DUT VDD
tP IAS
VGS
VDS
IAS tP
0.01Ω
BVDSS

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
0
RL 10% 10%

DUT - VDS
VDD 90% 90%
RG
VGS + VGS
0
10%

50% 50%
PULSE WIDTH
90%

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

-VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
0

VDS
DUT
12V
0.2µF 50kΩ
BATTERY
0.3µF
Qgs VGS
D Qgd

Qg(TOT)
G DUT
VDD
0
Ig(REF) S 0
+VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR Ig(REF)

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

4-76
IRFP9240

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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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4-77

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