IGNS IRFP140

E W DES
T
OR N DUC
N D ED F TE PRO
MME BSTITU
R ECOSheet
Data SU 0N January 2002
NOT
S S IBLE IRFP14
PO

31A, 100V, 0.077 Ohm, N-Channel Power Features

MOSFET • 31A, 100V
This N-Channel enhancement mode silicon gate power field
• rDS(ON) = 0.077Ω
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of • Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of • SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers, • Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching • Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
• High Input Impedance
These types can be operated directly from integrated
circuits. • Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Formerly developmental type TA17421.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND
D
IRFP140 TO-247 IRFP140

NOTE: When ordering, include the entire part number.

G

Packaging
JEDEC STYLE TO-247

SOURCE
DRAIN
GATE

DRAIN
(FLANGE)

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

 IRFP140

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRFP140 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS 100 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 31 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 22 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 120 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD 180 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 100 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA (Figure 10) 100 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V 31 - - A
Gate to Source Leakage IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 19A (Figures 8, 9) - 0.055 0.077 Ω
Forward Transconductance (Note 2) gfs VDS ≥ 50V, ID = 19A (Figure 12) 9.3 14 - S
Turn-On Delay Time td(ON) VDD = 50V, ID ≈ 28A, RGS = 9.1Ω, RL = 1.7Ω, - 15 23 ns
VGS = 10V
Rise Time tr - 72 110 ns
MOSFET Switching Times are Essentially
Turn-Off Delay Time td(OFF) Independent of Operating Temperature - 40 60 ns
Fall Time tf - 50 75 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID ≈ 27A, VDS = 0.8 x Rated BVDSS, - 38 59 nC
(Gate to Source + Gate to Drain) IG(REF) = 1.5mA (Figure 14)
Gate Charge is Essentially Independent of Operating
Gate to Source Charge Qgs - 10 - nC
Temperature
Gate to Drain “Miller” Charge Qgd - 21 - nC
Input Capacitance CISS VGS = 0V, VDS ≈ 25V, f = 1.0MHz (Figure 11) - 1275 - pF
Output Capacitance COSS - 550 - pF
Reverse Transfer Capacitance CRSS - 160 - pF
Internal Drain Inductance LD Measured between the Modified MOSFET - 5.0 - nH
Contact Screw on Header Symbol Showing the
that is Closer to Source Internal Devices
and Gate Pins and Center Inductances
of Die D

Internal Source Inductance LS Measured from the LD - 12.5 - nH

Source Lead, 6mm
(0.25in) From Header to
G
Source Bonding Pad LS

Thermal Resistance Junction to Case RθJC - - 0.83 oC/W

Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 30 oC/W

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

 IRFP140

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET - - 31 A
D
Symbol Showing the
Pulse Source to Drain Current (Note 3) ISDM - - 120 A
Integral Reverse P-N
Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 31A, VGS = 0V (Figure 13) - - 2.5 V
Reverse Recovery Time trr TJ = 25oC, ISD = 28A, dISD/dt = 100A/µs 70 150 300 ns
Reverse Recovered Charge QRR TJ = 25oC, ISD = 28A, dISD/dt = 100A/µs 0.44 0.91 1.9 µC
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 160µH, RG = 50Ω, peak IAS = 31A.

Typical Performance Curves Unless Otherwise Specified

1.2 40
POWER DISSIPATION MULTIPLIER

1.0
32
ID , DRAIN CURRENT (A)

0.8
24
0.6

16
0.4

8
0.2

0 0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175
TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10
ZθJC , TRANSIENT THERMAL IMPEDANCE

1
0.5

0.2
0.1 PDM
0.1
0.05
0.02
0.01 t1
10-2 t2 t2
SINGLE PULSE NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-3
10-5 10-4 10-3 10-2 0.1 1 10
t1 , RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

 IRFP140

Typical Performance Curves Unless Otherwise Specified (Continued)

103 50
OPERATION IN THIS
REGION IS LIMITED VGS = 7V
VGS = 10V
BY rDS(ON)
40 VGS = 8V
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

PULSE DURATION = 80µs
10µs
102 DUTY CYCLE = 0.5% MAX
100µs 30
VGS = 6V

1ms 20
10

10ms VGS = 5V
TC = 25oC 10
DC
TJ = MAX RATED
SINGLE PULSE VGS = 4V
1 0
1 10 102 103 0 10 20 30 40 50
VDS , DRAIN TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

50
PULSE DURATION = 80µs 102
VGS = 7.0V PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
40 VGS = 10V
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

VGS = 8V
10
30
VGS = 6V

TJ = 175oC TJ = 25oC
20
1
VGS = 5V
10

VGS = 4V
0 0.1
0 1 2 3 4 5 0 2 4 6 8 10
VDS , DRAIN TO SOURCE VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.0 3.0
PULSE DURATION = 80µs PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE

ID = 19A, VGS = 10V

rDS(ON), DRAIN TO SOURCE

0.8 2.4
ON RESISTANCE VOLTAGE
ON RESISTANCE (Ω)

0.6 1.8

VGS = 10V
0.4 1.2

0.2 0.6

VGS = 20V
0 0
0 25 50 75 100 125 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
ID , DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)

NOTE: Heating effect of 2µs pulse is minimal. FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE RESISTANCE vs JUNCTION TEMPERATURE
VOLTAGE AND DRAIN CURRENT

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

 IRFP140

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 3000
ID = 250µA VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE

1.15 CRSS = CGD

2400
COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 1800 CISS

0.95 1200
COSS

0.85 600
CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180 0 2 5 10 20 50 100
TJ , JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

20
PULSE DURATION = 80µs 103
PULSE DURATION = 80µs
ISD, SOURCE TO DRAIN CURRENT (A)
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS ≥ 50V
gfs, TRANSCONDUCTANCE (S)

16
TJ = 25oC

102
12

TJ = 175oC

8 TJ = 175oC
10

4
TJ = 25oC

0 1
0 10 20 30 40 50 0 0.6 1.2 1.8 2.4 3.0
ID , DRAIN CURRENT (A) VSD , SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 34A
VGS, GATE TO SOURCE VOLTAGE (V)

16

VDS = 20V
12
VDS = 50V

VDS = 80V
8

0
0 12 24 36 48 60
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

 IRFP140

Test Circuits and Waveforms

VDS
BVDSS

tP
L VDS
IAS
VARY tP TO OBTAIN VDD
+
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS 0
0.01Ω
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
VDS
RL 90% 90%

+
10% 10%
VDD 0
RG
-
90%
DUT
VGS 50% 50%
PULSE WIDTH
10%
0
VGS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
REGULATOR SUPPLY) VDD

Qg(TOT)
SAME TYPE VGS
12V AS DUT Qgd
0.2µF 50kΩ
BATTERY Qgs
0.3µF

D VDS

G DUT 0

IG(REF) S
0 IG(REF)
VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING 0
RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

©2002 Fairchild Semiconductor Corporation IRFP140 Rev. B

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST  OPTOLOGIC™ SMART START™ VCX™
Bottomless™ FASTr™ OPTOPLANAR™ STAR*POWER™
CoolFET™ FRFET™ PACMAN™ Stealth™
CROSSVOLT™ GlobalOptoisolator™ POP™ SuperSOT™-3
DenseTrench™ GTO™ Power247™ SuperSOT™-6
DOME™ HiSeC™ PowerTrench  SuperSOT™-8
EcoSPARK™ ISOPLANAR™ QFET™ SyncFET™
E2CMOSTM LittleFET™ QS™ TinyLogic™
EnSignaTM MicroFET™ QT Optoelectronics™ TruTranslation™
FACT™ MicroPak™ Quiet Series™ UHC™
FACT Quiet Series™ MICROWIRE™ SILENT SWITCHER  UltraFET 
STAR*POWER is used under license
DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4