IP5328P

Fully-Integrated Bi-directional PD3.0 and Fast Charge Power Bank SOC

with Multiple Input and Output Ports
 Output overcurrent, overvoltage and short circuit
protection
Features  Battery overcharge, over discharge and overcurrent
protection
 Support multiple ports simultaneously  Over temperature protection
 2 USB A output ports  Battery NTC protection
 1 USB B input port  4KV ESD, input voltage up to 25V (including CC pins)
 1 USB C input/output port  Simplified BOM
 Fast charge  Integrated switch power MOSFET
 Every port support fast charge  Single inductor for charging and discharging
 Support QC2.0/QC3.0 output  In-depth customization
 Qualcomm Certificate No.: 4788056908-2  I2C interface for flexible and low cost customized
 Support FCP input/output solution
 Support AFC input/output
 Support SFCP input/output  Package pin to pin with IP5328
 Support MTK PE1.1&2.0 output  Package size: 6mm*6mm, 0.5mm pitch, QFN40
 Support USB C DRP input/output
 Support BC1.2, Apple, Samsung Applications
 Integrated USB Power Delivery (PD2.0/PD2.0)
protocol  Power Bank, Portable Charger
 Support PD2.0 bi-directional input/output protocol  Smart Phones, Tablets and Portable devices
 Support PD3.0 input/output and PPS output
protocol Description
 Support 5V, 9V, 12V voltage input/output
 PPS support 5~12V adjustable voltage with IP5328P is a fast charge power management SOC for total
20mV/step solution on fast charge Power Bank. IP5328P support
 Integrate hardware biphase mark coding (BMC) QC2.0/QC3.0 output, FCP/AFC/SFCP input/output, MTK PE+
module 1.1&2.0 output, USB C/PD2.0/PD3.0 input/output, USBC PPS
 Integrate physical (PHY) layer for TX/RX across the output, BC1.2/Apple/Samsung; it integrate Li-battery charging
CC wire and discharging management, support battery level display, etc.
 Integrate hardware CRC calculation module Four USB ports can work simultaneously, 2*USB A, USB B and
 Support hard reset USB C, each port support fast charge when working alone, 5V
 Charger mode for two or more ports working state.
 Up to 5.0A charging current at battery port IP5328P are highly integrated with abundant function,
 Adaptive charging current adjustment support Buck and Boost with one single inductor, along with
 Support 4.20V, 4.35V, 4.40V, 4.50V batteries few peripheral devices make the total solution size minimized
and BOM cost down.
 Discharger
IP5328P supply up to 18W output ability using
 Current output capacity:
synchronized switch boost system, efficiency is higher than 90%
 5V: 3.1A 9V: 2.0A 12V: 1.5A
for 18W output even when the battery voltage is low. If no load
 Up to 95% @ 5V/2A discharge efficiency of
detected, the system enters standby mode automatically.
Synchronous switching
IP5328P synchronized switch charging system supply up to
 Support line compensate
5.0A charging current. In control of IC and battery temperature
 Battery level display and input voltage loop, intelligently adjust charging current.
 Integrated 14-bit ADC and coulometer IP5328P integrate USB C standard, support USB C, PD2.0
 Support 1/2/3/4 LED battery indicator and PD3.0 protocol.
 Auto recognition of LED number IP5328P integrate 14-bit ADC, ADC data can be accessed
 Adjustable battery level curve, uniform brightness through I2C interface. Together with internal coulometer and
 Others algorithm for accurate battery voltage and current
 Integrated torch-light driver measurement. Battery level curve can be customized for
 Support auto detect of plug in and out precise battery level display.
 Fast charge status indicator IP5328P support battery level display on 1/2/3/4 LED,
 Support key control auto-detect display mode; support torch light; support key
 Enter standby mode automatically in light load function.
 Multiple protection, high reliability Customized functions: charging battery and phones at the
 Input overvoltage and under voltage protection same time, PD15V output, charging for wearable devices.

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 IP5328P
Typical Application
VBUS
AGND EPAD KEY
CC1
CC2
TYPE-C DMC OTP
VBUSG
DPC
VBUS
GND
CC1
Bandgap
CC2 LIGHT
DMC
VIN
DPC RSET
DMB
Micro-B DPB RSET
GND SYSTEM VSET
VING
VIN CONTROL
DMB
VOUT1
DPB
DMA1
TYPE-A DPA1
GND
VOUT1G IP5328P
VOUT1
VIN
DMA1
VOUT2 VBUS
DPA1
DMA2 VOUT1
TYPE-A DPA2 VOUT2
GND
VOUT2G
VSN ADC
VSP L3
VOUT2
BAT
DMA2 L2
RSET
DPA2
L1
BOOST & CHARGE
driver VIN
VBUS VREG
VREG
VSN BAT
10mOhm
NTC
VSP
VSYS LX BST BAT

2.2uH

Figure 1 Simplified Application Diagram (4 LED for Battery Level Display)

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 IP5328P
1. Pin Definition

AGND

VREG

VSYS

RSET
VSYS
VSN
BAT

VSP
KEY
VIN
30 29 28 27 26 25 24 23 22 21
VING 31 20 LIGHT
VBUS 32 19 BST
VBUSG 33 18 LX
VOUT2 34 17 LX
VOUT2G 35 IP5328P 16 LX
VOUT1G 36 15 LX
QFN40
VOUT1 37 14 LX
DMA1 38 13 L3
41 EPAD
DPA1 39 12 L2
DMA2 40 11 L1
1 2 3 4 5 6 7 8 9 10
DPA2
CC1
CC2
DMC
DPC
DMB
DPB
VSYS
VSYS
NTC

Figure 2 IP5328P Pin Assignments

Pin Num Pin Name Description

1 DPA2 DP data line on VOUT2 USB port

2 CC1 CC1 line on USB C port

3 CC2 CC2 line on USB C port

4 DMC DM data line on USB C port

5 DPC DP data line on USB C port

6 DMB DM data line on Micro USB port, reused as I2C2 SCK

7 DPB DP data line on Micro USB port, reused as I2C2 SDA

8/9/22/23 VSYS Public Node of system input and output
10 NTC NTC Resistor input for battery temperature sense
11 L1 Battery level display drive pin L1, reused as I2C1 SCK

12 L2 Battery level display drive pin L2, reused as I2C1SDA

Battery level display drive pin L3, reused as VSET, used for MCU wake up
13 L3 output pin during I2C1 mode
14/15/16/17/18 LX DCDC switch node, connect to inductor

19 BST Internal high voltage drive, serial capacitor to LX

20 LIGHT Fast charge mode indicator

Battery internal resistance compensate, trimming the battery level curve,
21 RSET used as MCU wake up pin during I2C2 mode
24 VSP Positive sample node of VSYS current, separate layout with VSYS

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 IP5328P
25 VSN Negative sample node of VYSY current
26 KEY Key detect pin, reused as WLED torch light function.
27 VREG 3.1V Voltage output
28 BAT Battery supply pin
29 AGND Analog ground
30 VIN VIN charge detect pin
31 VING VIN charge input PMOS control pin
32 VBUS VBUS charge detect pin
33 VBUSG VBUS charge input PMOS control pin
34 VOUT2 VOUT2 discharge load detect pin
35 VOUT2G VOUT2 discharge NMOS control pin
36 VOUT1G VOUT1 discharge NMOS control pin
37 VOUT1 VOUT1 discharge load detect pin
38 DMA1 DM data line on VOUT1 USB port

39 DPA1 DP data line on VOUT1 USB port

40 DMA2 DM data line on VOUT2 USB port
41(EPAD) GND Power and dissipation ground

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 IP5328P
2. IP Series Products List
Power Bank IC
Charge
Features Package
/Discharge
IC
QC
Part No. Dis- LED Lighti PD3.0/ Compa
Charge Keys I2C DCP USB C Certifi Package
charge Num ng PPS tibility
cate
IP5303 1.0A 1.2A 1,2 √ √ - - - - - eSOP8

PIN2PIN
IP5305 1.0A 1.2A 1,2,3,4 √ √ - - - - - eSOP8
IP5306 2.4A 2.1A 1,2,3,4 √ √ - - - - - eSOP8
IP5206 2A(Max) 1.5A 3,4,5 √ √ - - - - - eSOP16

PIN2PIN
IP5108E 2.0A 1.0A 3,4,5 √ √ - - - - - eSOP16
IP5108 2.0A 2.0A 3,4,5 √ √ √ - - - - eSOP16
IP5207 1.2A 1.2A 3,4,5 √ √ - - - - - QFN24

PIN2PIN
IP5207T 1.2A 1.2A 1,2,3,4 √ √ √ √ - - - QFN24
IP5109 2.1A 2.1A 3,4,5 √ √ √ - - - - QFN24
IP5209 2.4A 2.1A 3,4,5 √ √ √ √ - - - QFN24
IP5219 2.4A 2.1A 1,2,3,4 √ √ √ √ √ - - QFN24
IP5310 3.1A 3.0A 1,2,3,4 √ √ √ √ √ - - QFN32
IP5312 15W 3.6A 2,3,4,5 √ √ √ √ - - - QFN32
IP5318Q 18W 4.0A 2,3,4,5 √ √ √ √ - √ - QFN40

PIN2
PIN
IP5318 18W 4.0A 2,3,4,5 √ √ √ √ √ √ - QFN40
IP5322 18W 4.0A 1,2,3,4 √ √ √ √ - √ - QFN32
IP5328 18W 4.0A 1,2,3,4 √ √ √ √ √ √ - QFN40
PIN2
PIN
IP5328P 18W 4.0A 1,2,3,4 √ √ √ √ √ √ √ QFN40

USB Charging Port Control IC

Standards Supported
IC
BC1.2 QC3.0 QC
Part Channel MTK PE+ Package
& & FCP SCP AFC SFCP USB C NTC Certi- PD3.0
No. 2.0&1.1
APPLE QC2.0 ficate

IP2110 1 √ - - - - - - - - - - SOT23-5
IP2111 1 √ - - - - - - - - - - SOT23-6
IP2112 2 √ - - - - - - - - - - SOT23-6
IP2161 1 √ √ √ - √ √ - - - √ - SOT23-6

IP2163 1 √ √ √ - √ √ √ - √ √ - SOP8

IP2701 1 √ √ √ - √ √ - √ - - - SOP8
IP2703 1 √ √ √ - √ √ √ √ √ - - DFN10
IP2705 1 √ √ √ - √ √ √ √ √ - - DFN12

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 IP5328P
IP2707 2 √ √ √ - √ √ √ √ √ - - QFN16
IP2716 1 √ √ √ √ √ - 1.1 √ - √ √ QFN32

3. Absolute Maximum Ratings

Parameters Symbol Value Unit
Input Voltage Range VIN, VBUS -0.3 ~ 16 V
Junction Temperature Range TJ -40 ~ 150 ℃
Storage Temperature Range Tstg -60 ~ 150 ℃
Thermal Resistance
θJA 26 ℃/W
(Junction to Ambient)
ESD (Human Body Model) ESD 4 KV
*Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
Exposure to Absolute Maximum Rated conditions for extended periods may affect device reliability.
*Voltages are referenced to GND unless otherwise noted.

4. Recommended Operating Conditions

Parameter Symbol Min. Typ. Max. Unit

Input Voltage VIN, VBUS 4.5 5 14 V

Battery Voltage Vbat 3.0 3.7 4.5 V

*Devices’ performance cannot be guaranteed when working beyond those Recommended Operating
Conditions.

5. Electrical Characteristics
Unless otherwise specified, TA=25℃，L=2.2uH
Parameter Symbol Test Conditions Min. Typ. Max. Unit

Charging System
VIN
Input voltage 4.5 5/7/9/12 13 V
VBUS
VIN
Input Over Voltage 13 14 15 V
VBUS
RVSET = NC 4.16 4.2 4.24 V

Constant Charge RVSET = 120k 4.31 4.35 4.39 V

VTRGT
Voltage RVSET = 68k 4.36 4.4 4.44 V

RVSET = 10k 4.46 4.5 4.54 V

Charge Current ICHRG VIN =5V, input current 2.0 A

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 IP5328P
VBUS =5V, input current 2.8 A

VIN or VBUS >=7V, input power 18 W

VIN=5V，BAT<1.5V 50 100 150 mA

Trickle Charge Current ITRKL
VIN=5V，1.5V<=BAT<3.0V 100 250 400 mA
Trickle Charge Stop
VTRKL 2.9 3 3.1 V
Voltage
Charge Stop Current ISTOP 200 300 400 mA
Recharge Voltage
VRCH 4.08 4.1 4.13 V
Threshold
Charge Safety Time TEND 20 24 27 Hour

Boost System
Battery operation
VBAT 3.0 4.5 V
voltage
Battery input current IBAT VBAT=3.7V，VOUT=5.1V，fs=375KHz 3 5 mA

VOUT=5V@1A 4.95 5.12 5.23 V

QC2.0 VOUT=9V@1A 8.75 9 9.25 V
VOUT
VOUT=12V@1A 11.75 12 12.25 V
DC output voltage
QC3.0
@1A 4.95 12.25 V
VOUT
QC3.0
200 mV
Step
Output voltage ripple ΔVOUT VBAT=3.7V，VOUT=5.0V，fs=375KHz 100 mV

VOUT=5V 3.1 A

Boost output current Iout VOUT=9V 2.0 A

VOUT=12V 1.5 A

VBAT=3V，VOUT=5V，IOUT=2A 95 %

Boost efficiency ηout VBAT=3V，VOUT=9V，IOUT=2A 92 %

VBAT=3V，VOUT=12V，IOUT=1.5A 90.8 %
Boost overcurrent shut VBAT=3.7V, 10mohm sample resistor
Ishut 3.5 3.8 4.0 A
down threshold at output
Load overcurrent Duration of output voltage under
TUVD 30 ms
detect time 4.2V
Load short circuit Duration of output current above
TOCD 150 200 us
detect time 4.2A
Control System

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 IP5328P
Discharge switch frequency 325 375 425 KHz
Switch frequency fs
Charge switch frequency 450 500 550 KHz

NMOS on resistance Upper NMOS 9 11 mΩ

rDSON
NMOS on resistance Lower NMOS 9 11 mΩ

VREG output voltage VREG VBAT=3.7V 3.0 3.1 3.2 V

Battery port standby
ISTB VIN=0V, VBAT=3.7V, average current 100 uA
current
LDO output current ILDO 20 30 40 mA
LED light driving
IWLED 10 15 20 mA
current
IL1
LED display driving
IL2 Voltage decrease 10% 5 7 9 mA
current
IL3
Light load shut down
T1load Total load power lower than 300mW 25 32 44 s
detect time
Duration of voltage drop from VSN to
Output port light load
T2load VOUT2 (or VOUT2, or VBUS) less T1load/2 s
shut down detect time
than 1.8mV
Short press on key
TOnDebounce 60 500 ms
wake up time
Time of WLED turn on TKeylight 1.2 2 3 s
Thermal shut down
TOTP Rising temperature 130 140 150 ℃
temperature
Thermal shut down
ΔTOTP 40 ℃
hysteresis

6. Function Description

Low power lock out and activation

The first time IP5328P access to the battery, whatever the battery voltage, IC is in lock out state, battery level
indicator LED will flash four times; Under non-charging state, if the battery voltage is too low to trigger the low
power shutdown, IP5328P will enter lock out state too.
Under the lock out state, to decrease the quiescent power, IP5328P do not support plug in detect function or
key press activation function. During which, key press action will not trigger boost output, and battery level
indicator LED will flash four times.
Under the lock out state, only by entering charging status can activate IP5328P’s full function.

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 IP5328P
Charge

IP5328P integrated a constant current and constant voltage Li battery charging management system with
synchronous switch, adaptive to various charging voltage.
When the battery voltage is lower than 3V, trickle charging less than 250mA charging current is applied;
when the battery voltage is higher than 3V, enters constant current charging stage, the maximum charging current
at battery port is 5.0A; when the battery voltage is near the preset battery voltage, enters constant voltage
charging stage; when the charging current is less than 300mA and battery voltage is near the constant voltage
charging stage, the charging process is stopped. When the charging stage is accomplished, once the battery
voltage falls under 4.1V, battery charging stage will be restarted.
IP5328P adopted switch charging technology, switch frequency is 500kHz. During 5V input voltage, maximum
input power is 10W; During the fast charging state, maximum input power is 18W. The highest charging current is
up to 5.0A, charging efficiency can be up to 94%, such can reduce 3/4 charging time.
IP5328P will adjust charge current automatically applicable to adaptors with different load capacity.
IP5328P do not support charging the battery and phone at the same time, the output discharge port will be
close while charging the battery, in case the input high voltage will take damage on the device under charge.

Boost

IP5328P Integrated a synchronized switch converter which supports high voltage output, providing 5V~12V
output voltage output, load capacity can be: 5V/3.1A, 7V/2.4A, 9V/2.0A and 12V/1.5A. 375kHz switching frequency.
Internal soft start function. In avoid of large rush current causing device failure at start up stage, built-in
overcurrent, short circuit, overvoltage and over temperature protection function, make insurance of the stability
and reliability of power system.
Boost system output current can be auto-modulated according to the temperature, ensuring the IC is under
the preset temperature.

USB C

IP5328P integrated USB C DRP port, auto-switching the internal pull-up and pull-down circuit on CC1 and CC2
by distinguishing the role of the attached device. Support Try.SRC function, when the attached device is also DRP
device, IP5328P will supply power for the opposite device.
When worked as DFP, the output current can be set as three levels; when worked as UFP, the current
capability from the opposite device can be detected.

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 IP5328P
VREG

Ip_3P0
VREF1

VREF2 CC1/CC2

Rd

VREF3

Pull-up and pull-down ability:

Name Value
Ip_3P0 330uA
Rd 5.1K

Comparator Threshold of pull-up Ip:

Comparator Threshold of Pull-down Resistor Rd:

USB C detects cycle:

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 IP5328P

USB C detects state transition:

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 IP5328P

USB C PD

IP5328P integrated USB C Power Delivery PD2.0/PD3.0/PPS (Programmable Power Supply) protocol, integrate
physical (PHY) layer for data transmitting/receiving across the cc wire, hardware biphase mark coding (BMC)
module and hardware CRC protect the data integrity.
Support PD2.0/PD3.0 bi-directional input/output and PPS output protocol. Input and output voltage support
5V/9V/12V. PPS 5~12V output voltage adjustable with 20mV/step. Support up to 18W power level.

Fast Charge

IP5328P support several fast charge standards: QC2.0/QC3.0, FCP, AFC, SFCP, MTK, Apple, Samsung.
Input QC standard is not support for charging the power bank, if input QC standard is needful, the Qualcomm
QC charging IC (SMB1351) is recommended.
Input fast charge standard of FCP, AFC, SFCP are supported for charging the power bank, because of the fast
charging request is send on the DP/DM line, if other fast charge IC is applied, the FCP, AFC and SFCP fast charge
cannot be supported at the same time.

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 IP5328P
If the power bank is to charge for the phone, when IP5328P enter discharge mode, it will detect the fast
charge type and request on DP, DM, which support fast charge for devices of QC2.0/QC3.0, FCP, AFC, SFCP, MTK,
and Apple 2.4A mode, Samsung 2.0A mode and BC1.2 1.0A mode.
For Apple 2.4A mode: DP=DM=2.7V
For Samsung 2.0A mode: DP=DM=1.2V
For BC1.2 1.0A mode: DP short to DM
Under BC1.2 mode, when the DP voltage is detected in the range of 2V~0.325V for 1.25s, fast charge will be
initially determined, then the short status between DP and DM will be disconnected, and DM pull-down 20kOhm
to GND at the same time. After which, if in the following 2ms the DP voltage is in range of 2V~0.325V and DM
lower than 0.325V, fast charge handshake is accomplished successfully. Then QC2.0/QC3.0 device can request for
desired voltage according to the QC standards. Any time DP lower than 0.325V will force to exit the fast charge
mode, the ouput voltage will fall back to default 5V.
QC2.0/QC3.0 output voltage request rule:
DP DM Result
0.6V GND 5V
3.3V 0.6V 9V
0.6V 0.6V 12V
0.6V 3.3V Continuous Mode
3.3V 3.3V sustain
Continuous mode is supported by QC3.0, voltage can be adjusted by 0.2V/step according to QC3.0 request
under the continues mode.

Charge and Discharge Path Management

Standby:
If VIN or VBUS is attached to charge will start the charging process directly.
If USB C UFP device is attached on VBUS or sink device is attached on VOUT port, will start discharge function
automatically.
If key is pressed, whether or not load is on VOUT1 port, VOUT1 port output will be force to open; but the
VOUT2 and USB C port will open only when load is detected on the according port, or the output on these port
will be closed. So VOUT1 must be retained if only one VOUT port is needed, if VOUT2 or VBUS is not needed,
MOSFET can be eliminated, but the 10uF capacitor should be retained.
Discharge:
If key not pressed, only when sink device attached will the output port open, non-attached output port will
not open. If the opened output port current is less than 180mA @ 10mOhm, it will wait for a period of time before
close the port automatically. The output current is detected by the voltage drop between VSN to output, 180mA
current is equivalent to 1.8mV on 10mOhm, when the resistance (including MOSFET internal resistance) between
VSN and ouput is larger than 10mOhm, the current threshold will be decreased proportionally.
When only VOUT1 port opened, single short press on key do not take any effect; when VOUT2 or USB C is
opened and in non-fast charge mode, single short press on key will force to open VOUT1 port; when VOUT2 or
USB C is opened and in fast charge mode, the first single short press on key will force to close the fast charge on
VOUT2 or USB C port, the second short press on key will force to open VOUT1 port, the time interval between the
first and second short press should be longer than 1 second, otherwise will force to shut down the system.

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 IP5328P
Any one of the VOUT1, VOUT2 or USB C port support all the fast charge standards separately, but due to the
single inductor design, only one output are support, only under single port opened situation fast charge is allowed.
Two or more output port open at the same time, fast charge will be disabled automatically.
According to ‘Typical Application Diagram’, when one port is already in fast charge mode, if sink device is
attached on another port (key press action is equal to VOUT1 load attached), all the output port together with the
fast charge mode will be disabled firstly, then open the ports with sink device attached, after which all the ports
only support Apple, Samsung and BC1.2 mode. If the sink device decreased from multiple to one and keep this
situation for 16s, all the output ports will be closed firstly (pay special attention to PCB layout routing for this case,
otherwise will lead to failure on restore of fast charge function, please refer to ‘PCB Layout’), and then the high
voltage fast charge function are enabled, then the output port of the only one sink device attached will be opened,
such that will re-activate the sink device to send fast charge request . when only one port is opened, if the total
power is lower than 300mW for about 32s, the output port and discharge will be closed and the system enters low
standby mode.
Charging：
When power are applied on either VIN or VBUS port can activate the IP5328P enter charging process, if both
ports are applied at the same time, USB C port power will be used for charging in priority.
if additional input fast charge IC are needed, 2 back-to-back PMOS should be applied on the added input port
for power partition control, in case current flow from high voltage port to low voltage port when two ports
attached at the same time.
In single port charging mode, the fast charge mode can be distinguished automatically, appropriate voltage
and current will be auto matched.
Standard solution do not support charging the sink device and battery at the same time, during charging
mode, even if sink devices are attached on the output port, the output port will not be opened. But if battery is
fully charged and the charging power supply is not detached, IP5328P will open the output port for the sink device
on the premise of 5V voltage on the charging port.
Charging and discharging at the Same Time (Customized Solution)：
In this customized solution, RSET function is not available; the RSET is redefined as an indicator of this
customized mode. If IP5328P are in charging the battery and sink device at the same time, RSET will output high
voltage, otherwise RSET will output low voltage.
When the charging power supply and sink device are attached at the same time, IP5328P will charge the
battery and sink device at the same time. Under this mode, IP5328P will disable the input fast charge function ( if
the additional fast charge IC is applied , RSET pin is used to control the enable pin of the additional fast charge IC),
when VSYS is only 5V, the discharge path will be enabled for the sink device. If the VSYS voltage is higher than 5.8V,
for safety consideration, the discharge path will be disabled. To make insurance of the normal charging and high
priority of charging the sink device, IP5328P will increase the charging under voltage threshold to 4.9V.
During the process of charging and discharging at the same time, if the input charging power supply is
unplugged, IP5328P will disable the input charging function and restart the discharge function for the sink device.
For safety consideration and to re-activate the sink device to send fast charge request, the voltage will fall to 0
during this conversion process.
During the process of charging and discharging at the same time, if the discharging sink device is unplugged or the
sink device stop to sink current for 16s, the discharge path will be closed automatically. When all the discharge
paths are disabled and return to single port charge state, the under voltage threshold will be decreased, fast
charge for the power bank will be auto re-activated.

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 IP5328P
Auto detection on sink device/phone attachment

IP5328P support auto detection on sink device/phone attachment/ plug in, once the attachment is detected,
the boost will be turned on charging the sink device/phone, so non-key solution are supported.

Auto detection on sink device/phone fully charged

IP5328P detect the current output current through off-chip 10mOhm resistor, when the total power is lower
than 300mW for 32s, IP5328P will consider all the output port is plug out, the output voltage will be closed then.

Key

KEY

WLED

Figure 3 Key circuit

Key circuit is illustrated in Figure 3, which can recognize short press or long press operation.
 Short press (pressed time in range of 60ms~2s): turn on the battery level display LED and BOOST
output
 Long press (pressed time longer than 2s): turn on or turn off the torch light WLED
 No response on press time less than 30ms
 Two short press in 1s: turn off boost output, battery level display LED and torch light WLED
 Long 10s press will reset the whole system

Fast Charge state indication

Light is used for indication for the present fast charge mode, either in fast charging or discharging mode,
when the system enters fast charge mode and in non-5V mode, the light LED will turn on.

Light

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 IP5328P
Coulombmeter and battery level display

Built-in coulombmeter support battery capacity calculation without measuring the current on the
BAT pin.
IP5328P support 1/2/3/4 LED display solution, by internal intelligent algorithm, the LED applied
outside can be distinguished by IP5328P.
RSET
RSET
L3
VSET

L2

D1 D2 D3 D4
L1

4 LED mode
RSET
RSET
RSET
RSET
L3 L3
VSET VSET
L2
10k
L2
10k 10k

D1 D2 D3
L1 L1

3 LED mode 1 LED mode 1

RSET RSET
RSET RSET

L3 L3
VSET VSET
10k
L2 VREG L2
D1 D2
D1 D2
L1 L1 VREG
10k

2 LED mode 1 2 LED mode 2

Figure 4 1/2/3/4 LED circuit
4 LED display:
During charging:
Battery capacity (C) (%) D1 D2 D3 D4

Fully charged ON ON ON ON

75%≤C ON ON ON 1.5Hz Flash

50%≤C＜75% ON ON 1.5Hz Flash OFF

25%≤C＜50% ON 1.5Hz Flash OFF OFF

C＜25% 1.5Hz Flash OFF OFF OFF

During discharging:
Battery capacity (C) (%) D1 D2 D3 D4

C≥75% ON ON ON ON

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 IP5328P
50%≤C＜75% ON ON ON OFF

25%≤C＜50% ON ON OFF OFF

3%≤C＜25% ON OFF OFF OFF

0%＜C＜3% 1.0Hz Flash OFF OFF OFF

C=0% OFF OFF OFF OFF

3 LED display:
During charging:
Battery capacity (C) (%) D1 D2 D3

Fully charged ON ON ON

66%≤C ON ON 1.5Hz Flash

33%≤C＜66% ON 1.5Hz Flash OFF

C＜25% 1.5Hz Flash OFF OFF

During discharging:
Battery capacity (C) (%) D1 D2 D3

C≥66% ON ON ON

33%≤C＜66% ON ON OFF

3%≤C＜33% ON OFF OFF

0%＜C＜3% 1.0Hz Flash OFF OFF

C=0% OFF OFF OFF

2 LED display mode 1 is bi-color LED:

During charging:
Battery capacity (C) (%) D1 D2

Fully charged OFF ON

66%≤C＜100% OFF 1.5Hz Flash

33%≤C＜66% 1.5Hz Flash 1.5Hz Flash

C＜33% 1.5Hz Flash OFF

During discharging:
Battery capacity (C) (%) D1 D2

66%≤C＜100% OFF ON

33%≤C＜66% ON ON

C＜33% ON OFF

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 IP5328P
C＜3% 1.0Hz Flash OFF

2 LED mode 2 display：

During charging: D1 LED flash on cycle of 2s (1s on and 1s off), when fully charged, constantly on;
During discharging: D2 LED is constantly on, when voltage lower than 3.2V, flash on cycle of 1s (0.5s on and 0.5s
off), when voltage is lower than 3.0V, system is power down.

1 LED mode 1 display:

During charging: LED flash on cycle of 2s (1s on and 1s off), when fully charged, constantly on;
During discharging: LED is constantly on, when voltage lower than 3.2V, flash on cycle of 1s (0.5s on and 0.5s off),
when voltage is lower than 3.0V, system is power down.

RSET (Battery internal resistor set)

The internal resistor of the battery can be set by RSET pin, the charging and discharging threshold voltage on
LED will be changed at the same time, accordingly the uniformity of the LED display on the battery level are
adjusted at the same time.
RSET resistor (Kohm) Battery internal resistance set(mOhm)
>179 93.75
169~179 87.5
159~169 81.25
149~159 75
139~149 68.75
129~139 62.5
119~129 56.25
109~119 50
99~109 43.75
89~99 37.5
79~89 31.25
69~79 25
59~69 18.75
49~59 12.5
39~49 6.25
0~39 0

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 IP5328P
VSET (battery type set)

Battery type can be set by the VSET pin, accordingly, the battery level display threshold voltage and Constant
Voltage charging threshold voltage are changed at the same time. VSET resistor and battery type are listed below:
VSET resistor (Kohm) Battery type
NC 4.2V
120 4.35V
68 4.4V
10 4.5V

NTC

IP5328P support NTC function used for battery temperature detection. NTC pin output 20uA
current then detect the voltage on NTC pin to determine the present battery temperature.

HT VH=0.43V/0.49V
V=20uA*(R1//RNTC) NTC
MT
COMP VL=0.56V
LT VL=1.32V/1.44V
R1=82K RNTC=100K
B=4100

Figure 5 Battery NTC comparator

Under charging state:
Voltage on NTC pin is 1.32V meaning the battery temperature is low 0 centigrade, stop charging the battery;
Voltage on NTC pin is 0.56V meaning the battery temperature is medium 45 centigrade, charging current half
down;
Voltage on NTC pin is 0.49V meaning the battery temperature is medium 50 centigrade, stop charging the
battery;
Under discharging state:
Voltage on NTC pin is 1.44V meaning the battery temperature is low -15 centigrade, stop discharging;
Voltage on NTC pin is 0.43V meaning the battery temperature is high 55 centigrade, stop discharging;
If NTC is not needed, NTC should serial a 51kOhm resistor to ground, do not float NTC or tie it to ground directly.

VREG

VREG is a normally opened 3.1V LDO, load capacity is 30mA.

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 IP5328P
I2C

I2C connection:
RSET
RSET INT RSET
INT
VSET
L3

3.3k 3.3k
SDA SDA
DPB VREG L2 VREG

3.3k 3.3k
SCLK SCLK
DMB VREG L1 VREG

I2C2 I2C1
IP5328P support to connect with I2C1 or I2C2 at a time, when I2C circuit is deployed, the two pins will work
as I2C_SDA and I2C_SCLK and the reused function will be disabled. Under I2C mode, INT signal is high-z at standby
and high level at working state, which is used for waking up the MCU.
I2C support up to 400Kbps transfer rate, 8-bit address and 8-bit data, MSB on rending and receiving. Device
address is 0xEA for write, 0xEB for read.
For example:
Writing data into 0x05 register:

SCLK

SDA

Slave address 0xEA Register address 0x05 Data 0x5A

Start sACK sACK sACK
Stop

I2C WRITE

Reading data from 0x05 register:

SCLK

SDA

Slave address 0xEA Register address 0x05 Slave address 0xEB Data 0x5A
Start sACK sACK sACK
mNACK Stop
Restart

I2C Read

Under I2C mode, RSET is low level when IP5328P is power down and high level when IP5328P is power up,
thus RSET can be used for MCU wake up.

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 IP5328P
7. PCB Layout
Here below lists essential precautions that may affect the function and performance on PCB layout, more
details will be attached in another document if any.

Location of VSYS capacitor

Both power and current is large under normal operating, location of capacitor on VSYS net affects the
stability of DCDC. VSYS capacitor should be placed as close to VSYS pin and EPAD as possible, deploy large copper
pour and add more vias, decrease the area of current loop between capacitor and IC and reduce the parasitic
parameter.
VSYS pin distribute at two sides of the IC, capacitor should be placed on each side and connect the two pins
with wide (wider than 100mil) copper on PCB board.

10mOhm sample resistor

IP5328P sample the current on 10mOhm between VSN and VSP pin to take control of input charging current,
output overcurrent protection, output light load power down. VSN and VSP tracks should keep away from signals
that may generate large interference, lay to the 10mOhm resistor separately, do not overlay with other current
track or VSYS track. Though VSP and VSYS are same net on PCB, layout of those two pins should be separated.
To enhance the immunity of interference of sample signal, 100nF filter capacitor are needed on VSN and VSP
pins and place as close as possible.
The layout is illustrated below:

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 IP5328P
Layout from 10mOhm sample resistor to input/output MOSFET

Application example: non-fast charge phone is attached VOUT1, fast charge phone is attached on VOUT2, this
is multiple output ports case, IP5328P will output 5V for both phones. When VOUT1 is plug out or power
consumption is lower than the preset value, IP5328P will disable VOUT1 output and maintain VOUT2 output, fast
charge output will be re-activated and supplied on VOUT2.
To realize the self-recovery of fast charge, output current on VOUT1 port should be detected accurately. This
current is detected by measuring the voltage drop between VSN and VOUT1 pin, the precondition of closing the
VOUT1 port is voltage drop lower than 1.8mV. So no other current tack is allowed to flow through VSN and VOUT1,
or false current will form voltage drop and lead to erroneous judgment on current. Similarly, pay special attention
on the other output ports.
Above all, lay separately on 10mOhm to VOUT1, 10mOhm to VOUT2 and 10mOhm to VIN on PCB
independently, any two current tracks should not overlay, if not, self-recovery of fast charge function in the
application example above may fail now and then.
The layout example is demonstrated below:

If improper layout lead to 1mOhm overlayed track on VOUT1 and VOUT2 output current, 2A current on
VOUT2 output will bring in 2mV voltage drop on the 1mOhm overlayed track. In this case, IP5328P cannot judge if
VOUT1 still has device attached even though device is plug out, thus lead to a failure on recovery of fast charge
function on VOUT2. Only when the output current on VOUT2 port is lower than 1.8A, and the corresponding
voltage drop on 1mOhm overlayed track is lower than 1.8V, can VOUT2 fast charge function be re-activated.

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 IP5328P
8. Typical Application Diagram
Total solution of fast charge power bank is merely realized by passive devices of MOSFET, inductor, capacitor
and resistor.

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 IP5328P
BOM List

No. Part Name Type Location Num Note

1 SMT IC QFN40 IP5328P U1 1
2 SMT capacitor 0603 100nF 10% 25V C3 C4 3
3 SMT capacitor 0603 2.2uF 10% 16V C1 C2 2
CP1 CP2 CP3
4 SMT capacitor 0805 22uF 10% 16V 4
CP14
CP4 CP5 CP6
5 SMT capacitor 0805 22uF 10% 25V 4
CP8
CP7 CP9 CP10
6 SMT capacitor 0805 10uF 10% 25V 4
CP13
electrolytic
7 220uF 25V 10% CP12 1
capacitor
8 SMT resistor 1206R 0.01R 1% R1 1
9 SMT resistor 0603R 20R 5% R4 1 Adjust brightness of the light
10 SMT resistor 0603R 100R 5% R2 R5 R7 3
11 SMT resistor 0603R 1K 5% R6 1
12 SMT resistor 0603R 10K 5% R8 R9 2
13 SMT resistor 0603R 110K 1% R10 1
14 SMT resistor 0603R 82K 1% R12 1 For NTC only
NTC thermal
15 100K@25℃ B=4200 RNTC 1 For NTC only
resistor
16 SMT LED 0603 blue LED D1 D2 D3 D4 4
17 SMT LED 0603 green LED D8 1
18 LED light 5MM LED D5 1
19 SMT inductor 2.2uH 10*10 L1 1
20 SMT NMOS SOT23-3 RU207C Q1 Q3 2 Rds(on)<20m ohm I>=4A
21 SMT PMOS SOT23-3 RU20P7C Q2 Q4 2 Rds(on)<20m ohm I>=4A
22 USB C port USB C port J1 1
23 key SMT 3*6 key SW1 1
24 Output USB AF10 8 pin USB USB1 USB3 2
25 Input USB MICRO-7-DIP-5.9 USB2 1
Recommended inductor type:
DC Heat Rating Saturation
Thickness Inductance Resistance Current Current Measuring
DARFON PIN Tolerance
(mm) (uH) (mΩ) DC Amp. DC Amps. Condition
Typ. Max. Idc(A)Max. Isat(A)Max.
SPM70702R2MESQ 5 2.2 ±20% 9 10.2 10.5 13.5 100kHz/1.0V
SPM10102R2MESN 4 2.2 ±20% 6 7 12 18 100kHz/1.0V
SHC1004-2R2M 4 2.2 ±20% 7 9 12 24

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 IP5328P
9. Package

MILLIMETER
SYMBOL
MIN NOM MAX
A 0.70 0.75 0.80
A1 - 0.035 0.05
A2 - 0.65 0.67
A3 - 0.125 -
b 0.2 0.25 0.30
e 0.5 BSC
D 6 BSC
E 6 BSC
J 4.52 4.62 4.72
K 4.52 4.62 4.72
L 0.35 0.40 0.45
aaa 0.1
bbb 0.1
ccc 0.08
ddd 0.1
eee 0.1

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 IP5328P
10. Certificate Information

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 IP5328P
IMPORTANT NOTICE
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improvements and other changes to its semiconductor products and services. Buyers should obtain the latest
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Buyers are responsible for their products and applications using INJOINIC TECHNOLOGY's components. To
minimize the risks associated with Buyers' products and applications, Buyers should provide adequate design and
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Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and
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applications, notwithstanding any applications-related information or support that may be provided by INJOINIC
TECHNOLOGY. Buyer represents and agrees that it has all the necessary expertise to create and implement
safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen
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INJOINIC TECHNOLOGY will update this document from time to time. The actual parameters of the product
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Resale of INJOINIC TECHNOLOGY's components or services with statements different from or beyond the
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