TPS76615, TPS76618, TPS76625, TPS76627

TPS76628, TPS76630, TPS76633, TPS76650, TPS76601

ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

D 250-mA Low-Dropout Voltage Regulator D PACKAGE

(TOP VIEW)
D Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and NC/FB 1 8 OUT
Adjustable Versions PG 2 7 OUT
D Dropout Voltage to 140 mV (Typ) at 250 mA GND 3 6 IN
(TPS76650) EN 4 5 IN
D Ultra-Low 35-µA Typical Quiescent Current
D 3% Tolerance Over Specified Conditions for
Fixed-Output Versions
D Open Drain Power Good
D 8-Pin SOIC Package
D Thermal Shutdown Protection

description
This device is designed to have an ultra-low quiescent current and be stable with a 4.7-µF capacitor. This
combination provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV
at an output current of 250 mA for the TPS76650) and is directly proportional to the output current. Additionally,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 35 µA over the full range of output current, 0 mA to 250 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems. This LDO family
also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the
quiescent current to less than 1 µA (typ).
TPS76633 TPS76633
DROPOUT VOLTAGE GROUND CURRENT
vs vs
FREE-AIR TEMPERATURE LOAD CURRENT
100 35.0
VI = 3.2 V
34.9 VO = 3.3 V
IO = 250 mA
34.8 TA = 25°C
I GND – Ground Current – µ A
V DO – Output Voltage – V

IO = 150 mA 34.7
10–1
34.6
IO = 50 mA
34.5

IO = 10 mA 34.4
10–2
34.3

34.2

34.1

10–3 34
–50 –25 0 25 50 75 100 125 150 0 25 50 75 100 125 150 175 200 225 250
TA – Free-Air Temperature – °C IL – Load Current – mA

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright  1999, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

description (continued)
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery
indicator.
The TPS766xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.25 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 3% over line, load, and temperature ranges. The TPS766xx family is available in 8 pin SOIC
package.
AVAILABLE OPTIONS
OUTPUT VOLTAGE
PACKAGED DEVICES
(V)
TJ
SOIC
TYP
(D)
5.0 TPS76650D
3.3 TPS76633D
3.0 TPS76630D
2.8 TPS76628D
2.7 TPS76627D
– 40°C
40 C to 125
125°C
C
2.5 TPS76625D
1.8 TPS76618D
1.5 TPS76615D
Adjustable
TPS76601D
1.25 V to 5.5 V
The TPS76601 is programmable using an external resistor divider (see application
information). The D package is available taped and reeled. Add an R suffix to the
device type (e.g., TPS76601DR).
TPS766xx
5 2
VI IN PG PG
6 1
IN NC/FB
7
OUT VO
0.1 µF 4 8
EN OUT CO †
+
4.7 µF
GND
3
300 mΩ

† See application information section for capacitor selection details.

Figure 1. Typical Application Configuration for Fixed Output Options

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

functional block diagram—adjustable version

IN

EN

PG
_

+ OUT

+
R1
_
Vref = 1.224 V FB/NC

R2

GND
External to the device

functional block diagram—fixed-voltage version

IN

EN

PG
_

+
OUT

+
_ R1
Vref = 1.224 V

R2

GND

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

Terminal Functions – SOIC Package

TERMINAL
I/O DESCRIPTION
NAME NO.
EN 4 I Enable input
FB/NC 1 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
IN 5 I Input voltage
IN 6 I Input voltage
OUT 7 O Regulated output voltage
OUT 8 O Regulated output voltage
PG 2 O PG output

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Ĕ

Input voltage range‡, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 13.5 V

Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 16.5 V
Maximum PG voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating tables
Output voltage, VO (OUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltage values are with respect to network terminal ground.

DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES

AIR FLOW TA < 25°C DERATING FACTOR TA = 70°C TA = 85°C
PACKAGE
(CFM) POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING
0 568 mW 5.68 mW/°C 312 mW 227 mW
D
250 904 mW 9.04 mW/°C 497 mW 361 mW

recommended operating conditions

MIN MAX UNIT
Input voltage, VIk 2.7 10 V
Output voltage range, VO 1.2 5.5 V
Output current, IO (Note 1) 0 250 mA
Operating virtual junction temperature, TJ (Note 1) – 40 125 °C
k To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load).
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

electrical characteristics over recommended operating free-air temperature range,

Vi = VO(typ) + 1 V, IO = 10 µA, EN = 0 V, CO = 4.7 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5.5 V ≥ VO ≥ 1.25 V, TJ = 25°C VO
TPS76601
5.5 V ≥ VO ≥ 1.25 V, TJ = –40°C to 125°C 0.97VO 1.03VO
TJ = 25°C, 2.7 V < VIN < 10 V 1.5
TPS76615
TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.455 1.545
TJ = 25°C, 2.8 V < VIN < 10 V 1.8
TPS76618
TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.746 1.854
TJ = 25°C, 3.5 V < VIN < 10 V 2.5
TPS76625
TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.425 2.575
Output voltage TJ = 25°C, 3.7 V < VIN < 10 V 2.7
(10 µA to 250 mA load) TPS76627 V
(see Note 2) TJ = –40°C to 125°C, 3.7 V < VIN < 10 V 2.619 2.781
TJ = 25°C, 3.8 V < VIN < 10 V 2.8
TPS76628
TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.716 2.884
TJ = 25°C, 4.0 V < VIN < 10 V 3.0
TPS76630
TJ = –40°C to 125°C, 4.0 V < VIN < 10 V 2.910 3.090
TJ = 25°C, 4.3 V < VIN < 10 V 3.3
TPS76633
TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.201 3.399
TJ = 25°C, 6.0 V < VIN < 10 V 5.0
TPS76650
TJ = –40°C to 125°C, 6.0 V < VIN < 10 V 4.850 5.150
Quiescent current ((GND current)) 10 µA < IO < 250 mA, TJ = 25°C 35
µA
EN = 0V, (see Note 2) IO = 250 mA, TJ = –40°C to 125°C 50
Output voltage line regulation (∆VO/VO)
VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V
(see Notes 2 and 3)
Load regulation IO = 10 µA to 250 mA 0.5%
BW = 300 Hz to 50 kHz,
Output noise voltage 200 µVrms
CO = 4.7 µF, TJ = 25°C
Output current Limit VO = 0 V 0.8 1.2 A
Thermal shutdown junction temperature 150 °C
EN = VI, TJ = 25°C,
1 µA
2.7 V < VI < 10 V
Standby current
EN = VI, TJ = –40°C to 125°C
10 µA
2.7 V < VI < 10 V
FB input current TPS76601 FB = 1.5 V 2 nA
High level enable input voltage 2.0 V
Low level enable input voltage 0.8 V
f = 1 kHz, CO = 4.7 µF,
Power supply ripple rejection (see Note 2) 63 dB
IO = 10 µA, TJ = 25°C
Minimum input voltage for valid PG IO(PG) = 300µA 1.1 V
Trip threshold voltage VO decreasing 92 98 %VO
PG Hysteresis voltage Measured at VO 0.5 %VO
Output low voltage VI = 2.7 V, IO(PG) = 1mA 0.15 0.4 V
Leakage current V(PG) = 5 V 1 µA
EN = 0 V –1 0 1
Input current (EN) µA
EN = VI –1 1
NOTE: 2. Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

electrical characteristics over recommended operating free-air temperature range,

Vi = VO(typ) + 1 V, IO = 10 µA, EN = 0 V, CO = 4.7 µF (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO = 250 mA, TJ = 25°C 310
TPS76628
IO = 250 mA, TJ = –40°C to 125°C 540
IO = 250 mA, TJ = 25°C 270
TPS76630
Dropout voltage
g IO = 250 mA, TJ = –40°C to 125°C 470
mV
(See Note 4) IO = 250 mA, TJ = 25°C 230
TPS76633
IO = 250 mA, TJ = –40°C to 125°C 400
IO = 250 mA, TJ = 25°C 140
TPS76650
IO = 250 mA, TJ = –40°C to 125°C 250
NOTES: 3. If VO ≤ 1.8 V then Vimin = 2.7 V, Vimax = 10 V:

Line Reg. (mV) + ǒ%ńVǓ

V
O
ǒ
V
imax
* 2.7 V Ǔ 1000
100

If VO ≥ 2.5 V then Vimin = VO + 1 V, Vimax = 10 V:

Line Reg. (mV) + ǒ%ńVǓ

V
O
ǒ V
imax
* ǒ
V
O
)1 V ǓǓ 1000
100
4. IN voltage equals VO(Typ) – 100 mV; TPS76601 output voltage set to 3.3 V nominal with external resistor divider. TPS76615,
TPS76618, TPS76625, and TPS76627 dropout voltage limited by input voltage range limitations (i.e., TPS76630 input voltage
needs to drop to 2.9 V for purpose of this test).

Table of Graphs
FIGURE
vs Load current 2, 3
Output voltage
vs Free-air temperature 4, 5
vs Load current 6, 7
Ground current
vs Free-air temperature 8, 9
Power supply ripple rejection vs Frequency 10
Output spectral noise density vs Frequency 11
Output impedance vs Frequency 12
Dropout voltage vs Free-air temperature 13, 14
Line transient response 15, 17
Load transient response 16, 18
Output voltage vs Time 19
Dropout voltage vs Input voltage 20
Equivalent series resistance (ESR) vs Output current 21 – 24
Equivalent series resistance (ESR) vs Added ceramic capacitance 25, 26

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TPS76633 TPS76615
OUTPUT VOLTAGE OUTPUT VOLTAGE
vs vs
LOAD CURRENT LOAD CURRENT
3.304 1.494
VI = 4.3 V VI = 2.7 V
TA = 25°C TA = 25°C
3.302 1.493

3.300 1.492

VO – Output Voltage – V
VO – Output Voltage – V

3.298 1.491

3.296 1.490

3.294 1.489

3.292 1.488

3.29 1.487
0 50 100 150 200 250 0 50 100 150 200 250

IL – Load Current – mA IL – Load Current – mA

Figure 2 Figure 3

TPS76633 TPS76615
OUTPUT VOLTAGE OUTPUT VOLTAGE
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
3.310 1.505
VI = 4.3 V IO = 10 µA VI = 2.7 V
3.305
1.500
3.300 IO = 10 µA
VO – Output Voltage – V

VO – Output Voltage – V

3.295 1.495

3.290 IO = 250 mA IO = 250 mA

1.490
3.285

3.280 1.485

3.275
1.480
3.270

3.265 1.475
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 4 Figure 5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TPS76633 TPS76615
GROUND CURRENT GROUND CURRENT
vs vs
LOAD CURRENT LOAD CURRENT
35.0 34.0
VO = 3.3 V VO = 1.5 V
34.9 TA = 25°C 33.9 TA = 25°C

34.8 33.8
I GND – Ground Current – µ A

I GND – Ground Current – µ A

34.7 33.7

34.6 33.6

34.5 33.5

34.4 33.4

34.3 33.3

34.2 33.2

34.1 33.1

34.0 33.0
0 25 50 75 100 125 150 175 200 225 250 0 25 50 75 100 125 150 175 200 225 250
IL – Load Current – mA IL – Load Current – mA
Figure 6 Figure 7

TPS76633 TPS76615
GROUND CURRENT GROUND CURRENT
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
55 55

50 50

45
I GND – Ground Current – µ A

I GND – Ground Current – µ A

45
40
40
35
35
30
30
25
25
20

VO = 3.3 V 20 VO = 1.5 V
15
IO = 250 mA IO = 250 mA
10 15
–50 0 50 100 150 –50 0 50 100 150
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 8 Figure 9

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TPS76633 TPS76633
POWER SUPPLY RIPPLE REJECTION OUTPUT SPECTRAL NOISE DENSITY
vs vs
FREQUENCY FREQUENCY
70 101
PSRR – Power Supply Ripple Rejection – dB

VI = 4.3 V

Output Spectral Noise Density – µV Hz

IO = 150 mA
CO = 10 µF
60
IO = 250 mA
TA = 25°C
IO = 1 mA
50 100

40

30 10–1

20 VI = 4.3 V
CO = 10 µF
TA = 25°C
10 10–2
10.00
10 100.00
100 1000.0010000.00
1k 10k 100000.00
100k 1000000.00
1M 10000000.0
10M 100 1k 10k 100k
f – Frequency – Hz f – Frequency – Hz
Figure 10 Figure 11

TPS76633
OUTPUT IMPEDANCE
vs
FREQUENCY
101
VI = 4.3 V
CO = 10 µF
TA = 25°C
Zo – Output Impedance – Ω

100

IO = 1 mA

10–1

IO = 250 mA
10–2
10 100 1k 10k 100k 1M
f – Frequency – Hz

Figure 12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TPS76650 TPS76633
DROPOUT VOLTAGE DROPOUT VOLTAGE
vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
100 100
VI = 4.9 V VI = 3.2 V
IO = 250 mA
IO = 250 mA
V DO – Output Voltage – V

V DO – Output Voltage – V
10–1 10–1 IO = 150 mA
IO = 150 mA
IO = 50 mA
IO = 50 mA

IO = 10 mA
10–2 IO = 10 mA 10–2

10–3 10–3
–50 –25 0 25 50 75 100 125 150 –50 –25 0 25 50 75 100 125 150
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 13 Figure 14

TPS76615 TPS76615
LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
400
Output Voltage – mV

Output Voltage – mV

CL = 4.7 µF
∆ VO – Change in

∆ VO – Change in

100 200
TA = 25°C

50 0

CL = 4.7 µF
0 –200 TA = 25°C

–50 –400
I O – Output Current – mA
VI – Input Voltage – V

250

3.7

2.7 0

0 100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000
t – Time – µs t – Time – µs
Figure 15 Figure 16

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TPS76633 TPS76633
LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
400
CL = 4.7 µF
Output Voltage – mV

Output Voltage – mV
CL = 4.7 µF
∆ VO – Change in

∆ VO – Change in
100 200 TA = 25°C
TA = 25°C

50 0

0 –200

–50

I O – Output Current – mA
VI – Input Voltage – V

–100 250

5.3

4.3 0

0 100 200 300 400 500 600 700 800 900 1000 0 100 200 300 400 500 600 700 800 900 1000
t – Time – µs t – Time – µs
Figure 17 Figure 18

TPS76633
TPS76601
OUTPUT VOLTAGE
DROPOUT VOLTAGE
vs
vs
TIME (AT STARTUP)
INPUT VOLTAGE
4
0.60
VO– Output Voltage – V

IO = 250 mA
3
0.50
2
V DO – Output Voltage – V

0.40
1

TA = 125°C
0 0.30
TA = 25°C
Enable Pulse – V

0.20
4.3
TA = –40°C
0.10
0

0.00
0 100 200 300 400 500 600 700 800 900 1000 2.50 3.00 3.50 4.00 4.50 5.00
t – Time – µs VI – Input Voltage – V
Figure 19 Figure 20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE† EQUIVALENT SERIES RESISTANCE†
vs vs
OUTPUT CURRENT OUTPUT CURRENT
102
100.00 102
100.00

Maximum ESR
ESR – Equivalent Series Resistance – Ω

ESR – Equivalent Series Resistance – Ω

Maximum ESR
Region of Instability Region of Instability

101
10.00 101
10.00

Region of Stability
VI = 4.3 V Region of Stability
100
1.00 CO = 4.7 µF 0
1.00
10
VO = 3.3 V
TA = 25°C VI = 4.3 V
CO = 4.7 µF
Minimum ESR Minimum ESR
–1 –1 VO = 3.3 V
0.10
10 0.10
10
TA = 125°C

Region of Instability
Region of Instability
10–2
0.01 –2
0.01
10
0 50 100 150 200 250 0 50 100 150 200 250
IO – Output Current – mA IO – Output Current – mA

Figure 21 Figure 22

TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE† EQUIVALENT SERIES RESISTANCE†
vs vs
OUTPUT CURRENT OUTPUT CURRENT
102
100.00 102
Maximum ESR Maximum ESR
ESR – Equivalent Series Resistance – Ω

ESR – Equivalent Series Resistance – Ω

Region of Instability Region of Instability

101
10.00 101

Region of Stability
0
1.00
10 100
VI = 4.3 V Region of Stability VI = 4.3 V
CO = 10 µF CO = 10 µF
VO = 3.3 V VO = 3.3 V
TA = 25°C TA = 125°C
–1
0.10
10 10–1 Minimum ESR
Minimum ESR

Region of Instability Region of Instability

–2
0.01
10 10–2
0 50 100 150 200 250 0 50 100 150 200 250
IO – Output Current – mA IO – Output Current – mA

Figure 23 Figure 24
† Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

TYPICAL CHARACTERISTICS

TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE† EQUIVALENT SERIES RESISTANCE†
vs vs
ADDED CERAMIC CAPACITANCE ADDED CERAMIC CAPACITANCE
101
10.00 101
10.00
VI = 4.3 V VI = 4.3 V
CO = 4.7 µF CO = 10 µF
ESR – Equivalent Series Resistance – Ω

ESR – Equivalent Series Resistance – Ω

VO = 3.3 V VO = 3.3 V
IO = 250 mA IO = 250 mA
TA = 25°C TA = 25°C
100
1.00 0
1.00
10

Region of Stability Region of Stability

–1
100.10 –1
100.10
Minimum ESR

Minimum ESR
Region of Instability
Region of Instability
–2
100.01 –2
100.01
0 0.2 0.4 0.6 0.8 1.0 0 0.2 0.4 0.6 0.8 1.0
Added Ceramic Capacitance – µF Added Ceramic Capacitance – µF
Figure 25 Figure 26

IN To Load
VI
OUT

+
CO
EN RL
GND
ESR

Figure 27. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)

† Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

APPLICATION INFORMATION

The TPS766xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and an adjustable regulator, the TPS76601 (adjustable from 1.25 V to 5.5 V).

device operation
The TPS766xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (IB = IC/β). The TPS766xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS766xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS766xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 1 µA (typ). If the
shutdown feature is not used, EN should be tied to ground. Response to an enable transition is quick; regulated
output voltage is reestablished in typically 160 µs.

minimum load requirements

The TPS766xx family is stable even at zero load; no minimum load is required for operation.

FB - pin connection (adjustable version only)

The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 29. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.

external capacitor requirements

An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS766xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS766xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 4.7 µF and the ESR
(equivalent series resistance) must be between 300-mΩ and 20-Ω. Capacitor values 4.7 µF or larger are
acceptable, provided the ESR is less than 20 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described previously.

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

APPLICATION INFORMATION

external capacitor requirements (continued)

TPS766xx
5 2
VI IN PG PG
6 1
IN NC/FB 250 kΩ
7
OUT VO
0.1 µF 4 8
EN OUT CO
+
4.7 µF
GND
3
300 mΩ

Figure 28. Typical Application Circuit (Fixed Versions)

programming the TPS76601 adjustable LDO regulator

The output voltage of the TPS76601 adjustable regulator is programmed using an external resistor divider as

ǒ) Ǔ
shown in Figure 29. The output voltage is calculated using:

V
O
+ Vref 1 R1
R2
(1)

Where
Vref = 1.224 V typ (the internal reference voltage)

Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage

ǒ Ǔ
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using:

R1 + V
V
O *1 R2 (2)
ref
OUTPUT VOLTAGE
TPS76601 PROGRAMMING GUIDE
OUTPUT
R1 R2 UNIT
VI IN PG VOLTAGE
PG
0.1 µF 2.5 V 174 169 kΩ
≥ 2.0 V 250 kΩ
3.3 V 287 169 kΩ
EN OUT VO
≤ 0.8 V 3.6 V 324 169 kΩ
R1 CO 4.0 V 383 169 kΩ
FB / NC 5.0 V 523 169 kΩ
GND 300 mΩ
R2

Figure 29. TPS76601 Adjustable LDO Regulator Programming

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15

TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

APPLICATION INFORMATION

power-good indicator
The TPS766xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator.

regulator protection
The TPS766xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS766xx also features internal current limiting and thermal protection. During normal operation, the
TPS766xx limits output current to approximately 0.8 µA (typ). When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the
temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has
cooled below 130°C(typ), regulator operation resumes.

power dissipation and junction temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than
or equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
T max * T
P
D(max)
+ J
R
A
qJA
Where
TJmax is the maximum allowable junction temperature
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 176°C/W for the 8-terminal
SOIC.
TA is the ambient temperature.

ǒ Ǔ
The regulator dissipation is calculated using:

P
D
+ VI * VO I
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999

MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN

PINS **
0.050 (1,27) 8 14 16
DIM
0.020 (0,51)
0.010 (0,25) M 0.197 0.344 0.394
0.014 (0,35) A MAX
(5,00) (8,75) (10,00)
14 8
0.189 0.337 0.386
A MIN
(4,80) (8,55) (9,80)

0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)

Gage Plane
1 7

A 0.010 (0,25)

0°– 8°
0.044 (1,12)
0.016 (0,40)

Seating Plane

0.010 (0,25) 0.004 (0,10)

0.069 (1,75) MAX
0.004 (0,10)
4040047 / B 03/95

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17

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