TPS60500, TPS60501

TPS60502, TPS60503

SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

HIGH EFFICIENCY, 250-mA

STEP-DOWN CHARGE PUMP

FEATURES D DSP Core Supply

D Regulated 3.3-V, 1.8-V, 1.5-V, or Adjustable D Cellular Phones
Output Voltage D Portable Instruments
D Up to 250-mA Output Current D Internet Audio Player
D 1.8-V to 6.5-V Input Voltage D PC Peripherals
D Up to 90% Efficiency D USB Powered Applications
D Output Voltage Tolerance 3% Over Line, Load, DESCRIPTION
and Temperature Variation
D Device Quiescent Current Less Than 40 µA The TPS6050x devices are a family of step-down
D Output Voltage Supervisor Included charge pumps that generate a regulated, fixed 3.3-V,
(Power Good) 1.8-V, 1.5-V, or adjustable output voltage. Only four
small ceramic capacitors are required to build a
D Internal Soft Start
complete high efficiency dc/dc charge pump converter.
D Load Isolated From Battery During Shutdown To achieve the high efficiency over a wide input voltage
D Overtemperature and Overcurrent Protected range, the charge pump automatically selects between
D Micro-Small 10-Pin MSOP Package three different conversion modes. The output can
D EVM Available, TPS60500EVM-193 deliver a maximum of 250-mA output current. The
power good function supervises the output voltage and
APPLICATIONS goes high when the output voltage rises to 97% of its
D Personal Digital Assistants nominal value.

Typical Application Circuit

TPS60503
C1F C2F EFFICIENCY
1 µF 1 µF vs
INPUT VOLTAGE
100
100 mA
8 6 3 4 90 50 mA
C1F– C1F+ C2F– C2F+ 1.8 V 80
7 150 mA
70
INPUT OUT
Efficiency – %

Li-ion cell 5 + C 60
VIN o 150 mA
10 µF 50
Ci LDO
40
2.2 µF TPS60502 10
FB 30

20
1 R
EN 10

OFF/ON 2 0
PG 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
GND VI – Input Voltage – V
9

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright  2002, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

pin assignments

DGS PACKAGES
(TOP VIEW)

EN 1 10 FB
PG 2 9 GND
C2F– 3 8 C1F–
C2F+ 4 7 OUT
VIN 5 6 C1F+

ACTUAL SIZE
3,05 mm x 4,98 mm

AVAILABLE OPTIONS
MARKING DGS OUTPUT VOLTAGE MINIMUM INPUT VOLTAGE
PART NUMBER†
PACKAGE [V] FOR IO = 150 mA
Adjustable
TPS60500DGS AVB VI > VO + 1
(0.8 V to 3.3 V)
TPS60501DGS AVC 3.3 VI > 4.3 V
TPS60502DGS AVD 1.8 VI > 2.8 V
TPS60503DGS AVE 1.5 VI > 2.5 V
† The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS60500DGSR) to order
quantities of 2500 devices per reel.

Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
C1F+ 6 Positive terminal of the flying capacitor C1F
C1F– 8 Negative terminal of the flying capacitor C1F
C2F+ 4 Positive terminal of the flying capacitor C2F
C2F– 3 Negative terminal of the flying capacitor C2F
EN 1 I Device-enable Input.
– EN = High disables the device. Output and input are isolated in shutdown mode.
– EN = Low enables the device.
GND 9 Ground
FB 10 O TPS60500: connect via voltage divider to VO
TPS60501 to TPS60503: connect directly to VO
OUT 7 O Regulated 3.3 V, 1.8 V, 1.5 V, or adjustable power output
Bypass OUT to GND with the output filter capacitor Co.
PG 2 O Open drain power good detector output. As soon as the voltage on OUT reaches about 97% of its nominal value this
pin goes high.
VIN 5 I Supply Input. Connect to an input supply in the 1.8-V to 6.5-V range.

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Voltage range at VIN, EN, PG to GND (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Voltage range at OUT, FB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 3.6 V
Voltage range at C1F+, C1F–, C2F+, C2F– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Output current at OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 150°C
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The voltage at EN, and PG can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these
mode select inputs.

DISSIPATION RATING TABLE

TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING
DGS 555 mW 5.56 mW/°C 305 mW 221 mW
NOTE: The thermal resistance junction to ambient of the DGS package when soldered on a PCB is RθJA ≈ 180°C/W.

recommended operating conditions

MIN NOM MAX UNIT
Input voltage range at VIN, VI 1.8 6.5 V
Output current range at OUT, IO 250 mA
Input capacitor, Ci 2.2 µF
Flying capacitors, C1F, C2F 1 µF
Output capacitor, Co for IO ≤ 150 mA 4.7 µF
Output capacitor, Co for 150 mA < IO < 250 mA 22 µF
Operating junction temperature, TJ –40 125 °C

RECOMMENDED CAPACITOR VALUES

IO, max Ci C(xF) Co
[mA] [µF] [µF] [µF]
50 2.2 0.22 4.7
150 4.7 1 10
250 4.7 1 22

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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

electrical characteristics at Ci = 4.7 µF, C1F = C2F = 1 µF, Co = 10 µF, TA = –40°C to 85°C,
VI = 5 V, V(EN) = GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI Supply voltage range 1.8 6.5 V
VI = 1.8 V to 2.7 V, VI–VO > 1 V 50
VI ≥ 2.7 V, VI–VO > 1 V 150
IO output
Maximum out ut current VO = 1.5 V, VI ≥ 3.1 V 250 mA
VI ≥ 3.7 V, 1.8 V ≤ VO ≤ 2.5 V 250
VO > 2.5 V, VI > VO + 1.2 V 250
TPS60500 0.8 3.3
TPS60501 2.7V VI–VO > 1 V at IOUT ≤ 150 mA
VI > 2.7V; 3.30
VO Output voltage V
TPS60502 VI > 1.8 V; VI–VO > 1 V at IOUT ≤ 50mA 1.80
TPS60503 1.50
V(FB) Feedback voltage TPS60500 0.8 V
TPS60501 IO = 0 mA to 150 mA, Co = 47 µF –4% 3%
IO = 0 mA to 150 mA, Co = 47 µF 3%
Tolerance of output voltage TPS60500
TPS60502 IO = 0 mA to 150 mA, Co = 10 µF 4%
TPS60 03
TPS60503
IO = 0 mA to 250 mA, Co = 47 µF 4%
Vpp Output voltage ripple at OUT IO = 150 mA, VO = 1.5 V 30 mVPP
IQ Quiescent current (no-load input current) IO = 0 mA 40 75 µA
T(SD) Thermal shutdown temperature 150 °C
IO(SD) Shutdown supply current V(EN) = VI 0.05 0.5 µA
f(OSC) Internal switching frequency 600 800 1200 kHz
VIL EN input low voltage 0.3 x VI V
VIH EN input high voltage 0.7 x VI V
Ilkg(SD) EN input leakage current V(EN) = 0 V or VI 0.01 0.1 µA
Ilkg(FB) FB input leakage current TPS60500 0.1 µA
Maximum resistance of the
R(max) TPS60500 R1 + R2 at FB pin 1 MΩ
external voltage divider
Short circuit current (start-up current) VI = 6.5V, VO = 0 V 100 300 mA
Output current limit VO > 0.6 V 500 mA
No load start-up time 80 µs

electrical characteristics for power good comparator of devices TPS6050x at TA = –40°C to 85°C,
VI = 5 V and V(EN) = GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(PG) Power good trip voltage See Note 2 Vml – 2% V
td,r VO ramping positive 100 200 µs
Power good delay time
td,f VO ramping negative 50 100 µs
VOL Power good output voltage low VO = 0 V, I(PG) = 1 mA 0.3 V
Ilkg Power good leakage current VO = 3.3 V, V(PG) = 3.3 V 0.01 0.1 µA
NOTE 2: Vml is the output voltage at the maximum load current. Vml is not a JEDEC symbol.

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

functional block diagram TPS6050x

VIN
VIN

2/3 Skip

Gear 800 KHz

1/2 EN
Logic CLK
Driver
1/3
C1F C2F
EN

OUT ON/OFF
Thermal and
EN Start–up
Short-Circuit OUT
Current Limit
FB

Skip

Regulator V_REG PG
Amplifier
PG
Bandgap
0.8 V
EN

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
VI Minimum input voltage vs Output current 1–4
Efficiency vs Input voltage 5–8
VO Output voltage vs Output current 9–12
Quiescent current vs Input voltage 13
Efficiency vs Output current 14–17
VO Output voltage (ripple) vs Time 18
Line transient response 19
Load transient response 20

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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
TPS60503 TPS60502 TPS60501
MINIMUM INPUT VOLTAGE MINIMUM INPUT VOLTAGE MINIMUM INPUT VOLTAGE
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
3.40 3.6 4.3
VO Threshold: VO Threshold:
VO Threshold:
3.20 VO nom –3% = 1.455 V 3.4 4.2
VO nom –3% = 1.746 V VO nom –3% = 3.201 V
V I(min) – Input Voltage – V

VI(min) – Input Voltage – V

3 4.1

V I(min) – Input Voltage – V

3.2 –40°C
TA = 85°C
2.80 4 25°C
3
TA = 25°C 3.9
2.60
2.8 –40°C
25°C 3.8
2.40
2.6 85°C
3.7
2.20 2.4
3.6
2 TA = –40°C
2.2 85°C 3.5
1.80
2 3.4
1.60
1.8 3.3
0 50 100 150 200 250 0 50 100 150 200 250 0 50 100 150 200 250
IO – Output Current – mA IO – Output Current – mA
IO – Output Current – mA

Figure 1 Figure 2 Figure 3

TPS60500 TPS60503 TPS60502

MINIMUM INPUT VOLTAGE EFFICIENCY EFFICIENCY
vs vs vs
OUTPUT CURRENT INPUT VOLTAGE INPUT VOLTAGE
2.6 100 100
VO Threshold: 100 mA 10 mA
2.5 90 150 mA 90
VO nom –3% = 0.776 V
2.4
VI(min) – Input Voltage – V

80 80
2.3
70 70
2.2 85°C Efficiency – %
Efficiency – %

2.1 60 200 mA 60 200 mA

10 mA
2 25°C 50 150 mA
50
1.9 250 mA 100 mA 250 mA
40 40
1.8
30 30
1.7
–40°C 20 20
1.6
1.5 10 10
1.4 0 0
0 50 100 150 200 250 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5
IO – Output Current – mA VI – Input Voltage – V VI – Input Voltage – V

Figure 4 Figure 5 Figure 6

TPS60501 TPS60500 TPS60503

EFFICIENCY EFFICIENCY OUTPUT VOLTAGE
vs vs vs
INPUT VOLTAGE INPUT VOLTAGE OUTPUT CURRENT
100 1.55
100 Co = 10 µF,
10 mA
90 1.54
90 10 mA
80 200 mA 1.53
80
VO – Output Voltage – V

70 250 mA 1.52
70 150 mA VI = 3.6 V
Efficiency – %
Efficiency – %

200 mA 60 1.51
60 100 mA VI = 5 V
50 1.5
50 150 mA
250 mA 40 1.49
40 100 mA
30 1.48 VI = 3.3 V
30 50 mA
20 VO Adjusted to 0.8 V, 1.47
20
10 Co = 47 µF,
1.46
10
0 1.45
0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 0.1 1 10 100 1000
3.5 4 4.5 5 5.5 6 6.5
VI – Input Voltage – V IO – Output Current – mA
VI – Input Voltage – V
Figure 7 Figure 8 Figure 9

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS
TPS60502 TPS60500 TPS60501
OUTPUT VOLTAGE OUTPUT VOLTAGE OUTPUT VOLTAGE
vs vs vs
1.84
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
0.86 3.36
Co = 10 µF, VI = 5 V
1.83 VO Adjusted to 0.8 V
VI = 5 V 0.85 Co = 10 µF 3.34
1.82
0.84
VO – Output Voltage – V

3.32

VO – Output Voltage – V
VI = 3.6 V

VO– Output Voltage – V

1.81 VI = 3.6 V
0.83
1.80 3.30
0.82 VI = 5 V
1.79 3.28
0.81
VI = 3.3 V
1.78
0.80 VI = 2.4 V 3.26
1.77
0.79 VI = 3.3 V 3.24
1.76
0.78
1.75 3.22
0.77
1.74 3.20
0.1 1 10 100 1000 0.76
0.1 1 10 100 1000 0.1 1 10 100 1000
IO – Output Current – mA IO – Output Current – mA IO – Output Current – mA

Figure 10 Figure 11 Figure 12

TPS60503 TPS60502
QUIESCENT CURRENT EFFICIENCY EFFICIENCY
vs vs vs
INPUT VOLTAGE OUTPUT CURRENT
45
OUTPUT CURRENT
90 90
VI = 3.3 V
VI = 3.6 V
VI = 3.3 V
80
40 80
VI = 5 V
Quiescent Current – µ A

TA = 85°C
70
TA = 25°C 70

Efficiency – %
Efficiency – %

35 VI = 5 V
60 VI = 3.6 V
60
30 50
TA = –40°C
50
40
25
30 40

20 20 30
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.8 6.3 0.1 1 10 100 1000 0.1 1 10 100 1000
VI – Input Voltage – V IO – Output Current – mA IO – Output Current – mA

Figure 13 Figure 14 Figure 15

TPS60501 TPS60500
EFFICIENCY EFFICIENCY
vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 80
VI = 5 V VI = 3.3 V
90 VI = 2.4 V
70
80
60
Efficiency – %

Efficiency – %

70
VI = 3.6 V
60 50
VI = 5 V
50
40
40
30
30
VO Adjusted to 0.8 V
20 20
0.1 1 10 100 1000 0.1 1 10 100 1000
IO – Output Current – mA IO – Output Current – mA

Figure 16 Figure 17

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TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

TYPICAL CHARACTERISTICS

OUTPUT VOLTAGE (RIPPLE)

vs
TIME LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Co = 10 µF, IO = 50 mA Co = 10 µF, VI = 3.3 V Co = 10 µF,
VO – OUTPUT VOLTAGE (RIPPLE) – V

VI = 3.3 V
VO = 1.5 V VO = 1.5 V VO = 1.5 V
IO = 100 mA TA = 25°C TA = 25°C
TA = 25°C VO 50 mV/division 50 mV/division
VO

VI = 2.5 V to 3.5 V to 2.5 V IO = 15 mA to 135 mA to 15 mA

10 mV/division

1 V/division 100 mA/division

1 µs / division 10 µs / division 10 µs / division

Figure 18 Figure 19 Figure 20

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

PRINCIPLES OF OPERATION

The TPS6050x charge pumps provide a regulated output voltage in the range of 0.8 V to 3.3 V from an input
voltage of 1.8 V to 6.5 V. The devices use switched capacitor fractional conversion to achieve high efficiency
over the entire input and output voltage range. Regulation is achieved by sensing the output voltage and
enabling the internal switches as needed to maintain the selected output voltage. This skip-mode regulation is
used over a load range from 0 mA to 150 mA. At a higher output current, the device works in a linear regulation
mode.
The TPS6050x circuits consist of an oscillator, a voltage reference, an internal resistive feedback circuit (fixed
voltage version only), an error amplifier, two charge pump stages with MOSFET switches, a shutdown/start-up
circuit, and a control circuit.
short-circuit current limit and thermal protection
When the output voltage is lower than 0.6 V, the output current is limited to 300 mA typically. The device also
has a thermal protection which reduces the output current when the temperature of the chip exceeds 150°C.
The output current declines to 0 mA when the chip temperature rises to 160°C.
enable
Driving EN high disables the converter. This disables all internal circuits, reducing input current to only 0.05µA.
Leakage current drawn from the output pin OUT is a maximum of 1 µA. The device exits shutdown once EN
is set low (see start up procedure described below). The typical no-load start-up time is 80 µs. When the device
is disabled, the load is isolated from the input, an important feature in battery-operated products because it
extends the battery shelf life.
start-up procedure
The device is enabled when EN is set from logic high to logic low. The charge pump stages immediately start
switching to transfer energy to the output. In start-up until the output voltage has reached 0.6 V, the input current
is limited to 300 mA typically.
power good detector
The power good (PG) output is an open-drain output on all TPS6050x devices. The PG output pulls low when
the output is out of regulation. When the output rises to within 97% of regulation, the power good output goes
high. In shutdown, power good is pulled low. In normal operation, an external pullup resistor is typically used
to connect the PG pin to VO or VI. If the PG output is not used, it should remain unconnected.

VO
V(NOM)
VIT

td,r t
PG td,r td,f
1

0
t

EN
1

0
t

Figure 21. Power Good Timing Diagram

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

PRINCIPLES OF OPERATION

The TPS6050x devices use fractional conversion to achieve high efficiency over a wide input and output voltage
range. Depending on the input to output voltage ratio and output current, internal circuitry switches between an
LDO mode, a 2/3x mode, a 0.5x mode, and a 1/3x mode.

LDO conversion mode

In the LDO mode, the flying capacitors are no longer used for transferring energy. The switches 1, 2, 5, and 6
are closed and connect the input directly with the output. This mode is automatically selected if the input to output
voltage ratio does not allow the use of another conversion mode with higher efficiency. In LDO mode, the
regulation is done by switching off MOSFET 2 and 6 until the output current reaches the linear-skip current (150
mA typ). At a higher output current, the output voltage is regulated by controlling the resistance of the switch.
The minimum input to output voltage difference required for regulation is 1 V.

VIN
SW1 SW3 SW5 SW7
C1F SW9 C2F
+ +

SW2 SW4 SW6 SW8

OUT

+
Co

Figure 22. LDO Conversion Mode

2/3x conversion mode

In the first cycle, the two flying capacitors are connected in parallel and are charged up in series with the output
capacitor. In the second cycle, the flying capacitors are connected in series. This mode provides higher
efficiency than the LDO mode because the current into VIN is only 2/3 of the output current. The mode is
automatically selected if the input voltage is higher than 3/2 of the selected output voltage.

VIN VIN
SW1 SW3 SW5 SW7 SW1 SW3 SW5 SW7
C1F SW9 C2F C1F SW9 C2F
+ + + +

SW2 SW4 SW6 SW8 SW2 SW4 SW6 SW8

OUT OUT

+ +
Co Co
Phase 1: Charging of Flying Caps Phase 2: Discharging of Flying Caps

Figure 23. 2/3x Conversion Mode

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

PRINCIPLES OF OPERATION

0.5x conversion mode

This conversion mode is internally selected if the input to output voltage ratio is greater than two (e.g. 3.6 V to
1.5 V conversion). In the 0.5x mode, the flying capacitors and the switches always work in parallel, which
reduces the resistance of the circuit compared to the other modes. In the first cycle, the flying capacitors are
charged in series with the output capacitors. In the second cycle, the flying capacitors are connected in parallel
with the output capacitor, which discharges the flying capacitors.

VIN VIN
SW1 SW3 SW5 SW7 SW1 SW3 SW5 SW7
C1F SW9 C2F C1F SW9 C2F
+ + + +

SW2 SW4 SW6 SW8 SW2 SW4 SW6 SW8

OUT OUT

+ +
Co Co
Phase 1: Charging of Flying Caps Phase 2: Discharging of Flying Caps

Figure 24. 0.5x Conversion Mode

1/3x conversion mode

This mode was implemented to provide high efficiency even with an input to output voltage ratio greater than
three (e.g. 5 V to 1.5 V conversion). In the first cycle, the two flying capacitors are charged in series with the
output capacitor. In the next step, the flying capacitors which are charged to VIN/3, are connected in parallel
to the output capacitor.

VIN VIN
SW1 SW3 SW5 SW7 SW1 SW3 SW5 SW7
C1F SW9 C2F C1F SW9 C2F
+ + + +

SW2 SW4 SW6 SW8 SW2 SW4 SW6 SW8

OUT OUT

+ +
Co Co
Phase 1: Charging of Flying Caps Phase 2: Discharging of Flying Caps

Figure 25. 1/3x Conversion Mode

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

DESIGN PROCEDURE

capacitor selection
Designed specifically for space-critical battery-powered applications, the complete converter requires only four
external capacitors. The capacitor values are closely linked to the required output current, output noise, and
ripple requirements. The input capacitor improves system efficiency by reducing the input impedance, and it
also stabilizes the input current. The value of the output capacitor, Co, influences the stability of the voltage
regulator. The minimum required capacitance for Co is 4.7 µF. Depending on the maximum allowed output ripple
voltage and load current, larger values can be chosen. For an output current greater than 150 mA, a minimum
output capacitor of 22 µF is required. Table 1 shows ceramic capacitor values recommended for low output
voltage ripple.

Table 1. Recommended Capacitors

MANUFACTURER PART NUMBER SIZE CAPACITANCE TYPE
LMK212BJ105KG 0805 1 µF Ceramic
LMK212BJ225MG 0805 2.2 µF Ceramic
Taiyo Yuden EMK316BJ225KL 1206 2.2 µF Ceramic
LMK316BJ475KL 1206 4.7 µF Ceramic
JMK316BJ106KL 1206 10 µF Ceramic
C2012X5R1C105M 0805 1 µF Ceramic
TDK C2012X5R1A225M 0805 2.2 µF Ceramic
C2012X5R0J106M 0805 10 µF/6.3 V Ceramic

Table 2 contains a list of manufacturers of ceramic capacitors. Ceramic capacitors provide the lowest output
voltage ripple because they typically have the lowest ESR-rating.

Table 2. Recommended Capacitor Manufacturers

MANUFACTURER CAPACITOR TYPE INTERNET
Taiyo Yuden X7R/X5R ceramic www.t–yuden.com
TDK X7R/X5R ceramic www.component.tdk.com
Vishay X7R/X5R ceramic www.vishay.com
Kemet X7R/X5R ceramic www.kemet.com

APPLICATION INFORMATION

typical application circuit for fixed voltage and adjustable voltage versions
Figure 26 shows the typical operation circuit. The TPS60501 to TPS60503 devices use an internal resistor
divider for sensing the output voltage. The FB pin must be connected externally with the output. For maximum
output current and best performance, 4 ceramic capacitors are recommended. For lower currents or higher
allowed output voltage ripple, other capacitors can also be used. It is recommended that the output capacitor
has a minimum value of 4.7 µF. This value is necessary to maintain a stable operation of the system. Flying
capacitors lower than 1 µF can be used, but this decreases the maximum output power. This means that the
device works in linear mode with lower output currents. The device works in the linear mode for an output current
of greater than 150 mA. With an output current greater than 150 mA, an output capacitor of ≥22 µF must be used.
Figure 26 shows that two 10-µF capacitors can also be used in parallel.

12 www.ti.com
 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

C1F C2F C1F C2F

1 µF 1 µF 1 µF 1 µF

8 6 3 4 8 6 3 4
C1F– C1F+ C2F– C2F+ C1F– C1F+ C2F–C2F+
max 150 mA max 150 mA
7 7
INPUT OUT INPUT OUT
VO
1.8 V to 6.5 V 5 + Co 2.5 V to 6.5 V 5 +C
o
1.5 V
VIN 10 µF Cc VIN
Ci TPS60503 10 µF
Ci TPS60500 10 pF
2.2 µF 10 R1 2.2 µF 10
FB FB

1 R R2 1 R
EN EN
OFF/ON 2 OFF/ON 2
PG PG
GND GND
9 9

R1 + R2 ǒ Ǔ
V
V
O
FB
–R2

(R1 ) R2) Nominal Output Voltage Equation Possible E24 Resistor Combination
V + VFB
O R2 1.2 V R1 = 0.5R2 R1 = 100 kΩ, R2 = 200 kΩ (1.20 V)
1.5 V R1 = 0.875R2 R1 = 160 kΩ, R2 = 180 kΩ (1.51 V)
VFB = 0.8 V 1.6 V R1 = R2 Any
1.8 V R1 = 1.25R2 R1 = 150 kΩ, R2 = 120 kΩ (1.80 V)
2.5 V R1 = 2.125R2 R1 = 510 kΩ, R2 = 240 kΩ (2.50 V)
R1 = 470 kΩ, R2 = 220 kΩ (2.51 V)

C1F C2F
1 µF 1 µF

8 6 3 4
C1F– C1F+ C2F– C2F+
7 max 250 mA
INPUT OUT
3.15 V to 6.5 V 5 + C + C
VIN out1 out2 1.5 V
Ci TPS60503 10 µF 10 µF
4.7 µF 10
FB

1 R
EN
OFF/ON 2
PG
GND
9

Power supply with 1,4 mm maximum height for 250-mA output current

Figure 26. Typical Operating Circuit

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

DSP supply with sequencing

This application shows a power supply for a typical DSP. DSPs usually have core voltages in the 1-V to 2.5-V
range, whereas the voltage at the I/O-pins (I/O voltage) is typically 3.3 V to interface with external logic and
converters. Therefore, a power supply with two output voltages is required. The application works with an input
voltage in the range of 3.5 V to 6.5 V. The maximum output current is 150 mA on each output.
The supply is enabled by pulling the enable pin (EN of the TPS60503) to GND. The step-down charge pump
starts and its power good (PG) output goes high. This enables the LDO which powers the I/O lines and generates
a reset signal for the DSP. Figure 27 shows the timing diagram of the start-up/shutdown procedure.

VI/O
V(NOM)
TPS77133 VIT

VI VIN OUT
t
VIN OUT V(CORE)
10 MΩ 1 MΩ 47 kΩ V(NOM)
FB
VIT
EN RESET
GND 3.3 V
VI/O t
10 µF† RS‡
1
TPS60503 RESET
0
VIN PG td t
PG td td
47 µF FB 1
1 MΩ 1.5 V
OUT V(CORE)
C1F+ 10 µF† 0
ENABLE EN t
C1F– 1 µF
EN
C2F+ 1
GND
C2F– 1 µF
GND 0
t
† Recommended value for stability, DSP may require higher capacitance.
‡ RS is the RESET output of the TPS77133.

Figure 27. DSP Supply With Sequencing

14 www.ti.com
 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

LC-post filter
If the output voltage ripple of the stepdown charge pump is to high, an LC post filter can be used.

C1F C2F
1 µF 1 µF

8 6 3 4
C1F– C1F+ C2F– C2F+
L(P) max 150 mA
7
INPUT OUT
2.5 V to 6.5 V 5 + C
VIN o VP(out)
10 µF C(P)
Ci
TPS60503
2.2 µF 10
FB

1 R
EN
OFF/ON 2
PG
GND
9

Figure 28. LC-Post Filter

Table 3. Measurement Results on Different C(fly), C(P), L(P) Combinations; BW = 500 MHz
CI C(XF) CO C(P) TYPICAL TYPICAL
VI IO [µF] [µF] [µF] L(P)
( ) [µF] VO
VP(Out) VO(RMS)
[V] [mA] [µH] [V]
CERAMIC CERAMIC CERAMIC CERAMIC VPP[mV] [mV]
5 50 2.2 0.22 4.7 — 0.1 (X7R) 3.3 50 8
5 50 2.2 0.22 4.7 — 0.1 (X7R) 1.5 30 9
5 150 4.7 1 10 — 0.1 (X7R) 1.5 50 6
5 250 4.7 1 2 x 10 — 0.1 (X7R) 1.5 45 8
5 100 4.7 1 10 0.1 0.1 (X7R) 1.5 20 4

power supply with dynamic voltage scaling

Dynamic voltage scaling of the core can be used to reduce power consumption of a digital signal processor
(DSP). During the periods, in which the maximum DSP performance is not required, the core voltage can be
reduced when the DSP operates at a lower clock-rate. This idea is called runtime power control (RPC) and is
supported by modern DSPs. RPC extends battery-life time in handheld applications, like MP3 players, digital
cameras, PDA.
The supply of DSPs is separated into I/O interface and core supply. Interface is mostly powered by a 3.3-V
system supply, whereas core supply achieves voltages far below 1.5 V. The TPS60500 is powered by the 3.3-V
system supply. The DSP itself selects the applied core voltage.
The core voltage is switched between 1.5 V and 1.1 V by changing the feedback resistor network. A MOSFET
modifies the voltage divider at the feedback (FB) pin by switching a resistor. In this application, a general
purpose MOSFET BSS138 is used with a VGS(th) of 1.6 V. A DSP 3.3-V I/O port drives the gate. The feedback
resistor network consists of R2, R3 and R4. C(ff) is the fast forward capacitor for improved line regulation.

www.ti.com 15
 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

power supply with dynamic voltage scaling (continued)

General requirements for the application:
D Output voltage1 (DSP core): 1.5 V ±0.08 V
D Output voltage 2 (DSP core): 1.1 V +0.1 V –0.05 V
D Input voltage: 3 V to 3.3 V
D Output current: 150 mA (10R load)

C1F C2F
1 µF 1 µF

8 6 3 4
C1F– C1F+ C2F– C2F+

Input 7 1.5 V / 1.1 V

OUT
3.3 V 150 mA
5 Co C(ff)
VIN R2
10 µF 150 pF
Ci
2.2 µF TPS60500 10
FB R3 R4

1 R1 T1
EN
DVS in
OFF/ON
R5 BSS138
2
GND PG
330 kΩ C6
9
470 pF

Figure 29. Dynamic Voltage Scaling Application

To keep current through the adjustment resistor network as low as possible, the resistors are calculated to:
Vout1 adjusted by R2 and R3 (1)
V FB Vout1 = 1.1 V,
R3 + R2 = 180 kΩ,
V out1*V FB
Vref = 0.80 V,
R2
→R3 = 470 kΩ
Vout2 adjusted by R2 and Rx = R3||R4 (2)
V FB R2 Vout2 = 1.5 V,
Rx + →Rx = 206 kΩ
ǒVout2 * VFBǓ
1 + 1 ) 1
³ R4 + 1 →R4 = 360 kΩ (3)
Rx R3 R4 1 * 1
Rx R3

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

internet audio power supply

The input voltage from a single or dual NiCd, NiMH or alkaline cell is boosted to 3.3 V. This voltage is used as
system supply for the application and as an input voltage for the step-down charge pump which is used to
provide the core voltage for a DSP.

L1
10 µH

Ci
10 µF 7
SW
6 5 VO = 3.3 V
VBAT VOUT
IO ≥ 100 mA
Co
R1 22 µF R5 R3
9
LBI 10 Low Battery
LBO
R2 Output
TPS61010
FB
1
EN

Single or dual
NiCd, R(C) R4
NiMH or 8 2
ADEN COMP
Alkaline Cell GND Cc1 100 kΩ Cc2
9 10 pF 10 nF

C1F C2F
1 µF 1 µF

8 6 3 4
C1F– C1F+ C2F– C2F+
7
OUT VO = 1.5 V
5 Co IO ≤ 150 mA
VIN
10 µF
Ci
2.2 µF TPS60503 10
FB

1 R
EN

OFF/ON 2 Power Good

PG
GND Output
9

Figure 30. Internet Audio Power Supply

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 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

APPLICATION INFORMATION

layout and board space

All capacitors should be soldered as close as possible to the IC. A PCB layout proposal for a two-layer board
is shown in Figure 31. Care has been taken to connect all capacitors as close as possible to the circuit to achieve
optimized output voltage ripple performance.
C2F

C1F

Figure 31. Recommended PCB Layout for TPS6050x (top layer)

Figure 32. Recommended PCB Layout for TPS6050x (bottom layer)

18 www.ti.com
 TPS60500, TPS60501
TPS60502, TPS60503
SLVS391B – OCTOBER 2001 – REVISED FEBRUARY 2002

MECHANICAL DATA
DGS (S-PDSO-G10) PLASTIC SMALL-OUTLINE PACKAGE

0,27
0,50 0,08 M
0,17
10 6

0,15 NOM
3,05 4,98
2,95 4,78

Gage Plane

0,25

1 5 0°–ā6°
0,69
3,05 0,41
2,95

Seating Plane

0,15
1,07 MAX 0,10
0,05

4073272/B 08/01

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187

www.ti.com 19
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