TLV3501

TLV3502
SBOS321D − MARCH 2005 − REVISED JULY 2005

4.5ns Rail-to-Rail, High-Speed Comparator

in Microsize Packages
FEATURES DESCRIPTION
D HIGH SPEED: 4.5ns The TLV350x family of push-pull output comparators
D RAIL-TO-RAIL I/O feature a fast 4.5ns propagation delay and operation from
D SUPPLY VOLTAGE: +2.7V to +5.5V +2.7V to +5.5V. Beyond-the-rails input common-mode
range makes it an ideal choice for low-voltage applica-
D PUSH-PULL CMOS OUTPUT STAGE
tions. The rail-to-rail output directly drives either CMOS or
D SHUTDOWN (TLV3501 only) TTL logic.
D MICRO PACKAGES:
Microsize packages provide options for portable and
SOT23-6 (single)
space-restricted applications. The single (TLV3501) is
SOT23-8 (dual)
available in SOT23-6 and SO-8 packages. The dual
D LOW SUPPLY CURRENT: 3.2mA (TLV3502) comes in the SOT23-8 and SO-8 packages.

APPLICATIONS PROPAGATION DELAY vs OVERDRIVE VOLTAGE

D AUTOMATIC TEST EQUIPMENT 9
VCM = 1V
D WIRELESS BASE STATIONS 8
VS = 5V
CLOAD = 17pF
D Rise
Propagation Delay (ns)

THRESHOLD DETECTOR
D ZERO-CROSSING DETECTOR 7

D WINDOW COMPARATOR 6
Fall

5
TLV350x RELATED PRODUCTS
4
FEATURES PRODUCT
Precision Ultra-Fast, Low-Power Comparator TLC3016
3
Differential Output Comparator TL712 0 20 40 60 80 100
High-Speed Op Amp, 16-Bit Accurate, 150MHz OPA300
Overdrive Voltage (mV)
High-Speed Op Amp, Rail-to-Rail, 38MHz OPA350
High-Speed Op Amp with Shutdown, 250MHz OPA357

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.

 

       
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This integrated circuit can be damaged by ESD. Texas

ABSOLUTE MAXIMUM RATINGS(1) Instruments recommends that all integrated circuits be
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V handled with appropriate precautions. Failure to observe
Signal Input Terminals, Voltage(2) . . . . . (V−) − 0.3V to (V+) + 0.3V proper handling and installation procedures can cause damage.
Signal Input Terminals, Current(2) . . . . . . . . . . . . . . . . . . . . . 10mA
ESD damage can range from subtle performance degradation to
Output Short Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74mA complete device failure. Precision integrated circuits may be more
Operating Temperature . . . . . . . . . . . . . . . . . . . . . −40°C to +125°C susceptible to damage because very small parametric changes could
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C cause the device not to meet its published specifications.
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C
ESD Rating (Human Body Model) . . . . . . . . . . . . . . . . . . . . 3000V
Charged-Device Model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . 500V
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.3V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one comparator per package.

ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
TLV3501 SOT23-6 DBV NXA
TLV3501 SO-8 D TLV3501A
TLV3502 SOT23-8 DCN NXC
TLV3502 SO-8 D TLV3502A
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.

PIN CONFIGURATIONS

TLV3501 TLV3502
TLV3501
NXA

NC(2) 1 8 SHDN +IN A 1 8 V+

−IN 1 6 SHDN A
−IN 2 7 V+ −IN A 2 7 OUT A
V− 2 5 OUT
+IN 3 6 OUT +IN B 3 6 OUT B
+IN 3 4 V+ B
V− 4 5 NC(2) −IN B 4 5 V−
SOT23−6(1)
SO−8 SOT23−8, SO−8

(1) Pin 1 of the SOT23-6 is determined by orienting the package marking as indicated on the diagram.
(2) NC indicates no internal connection.

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ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C and VS = +2.7V to +5.5V, unless otherwise noted.
TLV3501, TLV3502
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage(1) VOS VCM = 0V, IO = 0mA ±1 ±6.5 mV
vs Temperature dVOS/dT TA = −40°C to +125°C ±5 µV/°C
vs Power Supply PSRR VS = 2.7V to 5.5V 100 400 µV/V
Input Hysteresis 6 mV
INPUT BIAS CURRENT
Input Bias Current IB VCM = VCC/2 ±2 ±10 pA
Input Offset Current(2) IOS VCM = VCC/2 ±2 ±10 pA
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (V−) − 0.2V (V+) + 0.2V V
Common-Mode Rejection CMRR VCM = −0.2V to (V+) + 0.2V 57 70 dB
VCM = −0.2V to (V+) + 0.2V 55 dB
INPUT IMPEDANCE
Common-Mode 1013 2 Ω  pF
Differential 1013 4 Ω  pF
SWITCHING CHARACTERISTICS
Propagation Delay Time(3) T(pd) ∆VIN = 100mV, Overdrive = 20mV 4.5 6.4 ns
∆VIN = 100mV, Overdrive = 20mV 7 ns
∆VIN = 100mV, Overdrive = 5mV 7.5 10 ns
∆VIN = 100mV, Overdrive = 5mV 12 ns
Propagation Delay Skew(4) ∆t(SKEW) ∆VIN = 100mV, Overdrive = 20mV 0.5 ns
Maximum Toggle Frequency fMAX Overdrive = 50mV, VS = 5V 80 MHz
Rise Time(5) tR 1.5 ns
Fall Time(5) tF 1.5 ns
OUTPUT
Voltage Output from Rail VOH,VOL IOUT = ±1mA 30 50 mV
SHUTDOWN
tOFF 30 ns
tON 100 ns
VL (comparator is enabled)(6) (V+) − 1.7V V
VH (comparator is disabled)(6) (V+) − 0.9V V
Input Bias Current of Shutdown Pin 2 pA
IQSD (quiescent current in shutdown) 2 µA
POWER SUPPLY
Specified Voltage VS +2.7 +5.5 V
Operating Voltage Range 2.2 to 5.5 V
Quiescent Current IQ VS = 5V, VO = High 3.2 5 mA
TEMPERATURE RANGE
Specified Range −40 +125 °C
Operating Range −40 +125 °C
Storage Range −65 +150 °C
Thermal Resistance qJA
SOT23-5 200 °C/W
SOT23-8 200 °C/W
SO-8 150 °C/W
(1) VOS is defined as the average of the positive and the negative switching thresholds.
(2) The difference between IB+ and IB−.
(3) Propagation delay cannot be accurately measured with low overdrive on automatic test equipment. This parameter is ensured by
characterization and testing at 100mV overdrive.
(4) The difference between the propagation delay going high and the propagation delay going low.
(5) Measured between 10% of VS and 90% of VS.
(6) When the shutdown pin is within 0.9V of the most positive supply, the part is disabled. When it is more than 1.7V below the most positive supply,
the part is enabled.

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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +5V, and Input Overdrive = 100mV, unless otherwise noted.

OUTPUT RESPONSE FOR VARIOUS OUTPUT RESPONSE FOR VARIOUS

OVERDRIVE VOLTAGES (rising) OVERDRIVE VOLTAGES (falling)

Input
VIN (V)

VIN (V)
Input
0

5 VOD = 50mV
5
4
VOD = 100mV VOD = 50mV 4
3 VOD = 100mV VOD = 20mV
VOUT (V)

VOD = 20mV 3

VOUT (V)
2 VOD = 5mV
VOD = 5mV 2
1 1
0 0
−1 −1
−10 0 10 20 30 40 −10 0 10 20 30 40
Time (ns) Time (ns)

PROPAGATION DELAY vs TEMPERATURE PROPAGATION DELAY vs TEMPERATURE

(VOD = 20mV) (VOD = 50mV)
5.0 5.0
Fall
Propagation Delay (ns)

Propagation Delay (ns)

4.5 4.5
Rise

4.0 4.0
Fall

3.5 3.5
Rise

3.0 3.0
−40 −25 0 25 50 75 100 125 −40 −25 0 25 50 75 100 125
Temperature (_ C) Temperature (_ C)

PROPAGATION DELAY vs CAPACITIVE LOAD PROPAGATION DELAY vs CAPACITIVE LOAD

(VOD = 20mV) (VOD = 50mV)
9 9

8 8
Propagation Delay (ns)

Propagation Delay (ns)

7 7

6 6
Fall
5 5
Rise Fall
4 4
Rise
3 3
0 20 40 60 80 100 0 20 40 60 80 100
Capacitive Load (pF) Capacitive Load (pF)

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TYPICAL CHARACTERISTICS (continued)

At TA = +25°C, VS = +5V, and Input Overdrive = 100mV, unless otherwise noted.

PROPAGATION DELAY vs SUPPLY VOLTAGE

(VCM = 1V, VOD = 20mV) WAKE−UP DELAY vs TEMPERATURE
9 110

8
Propagation Delay (ns)

Wake−Up Delay (ns)

7 90

5 70
Fall
4
Rise
3 50
2 3 4 5 6 −40 −25 0 25 50 75 100 125
Supply Voltage (V) Temperature (_ C)

RESPONSE TO 50MHz SINE WAVE RESPONSE TO 100MHz SINE WAVE

(VDD = 5V, VIN = 20mVPP) (±2.5V dual supply into 50Ω oscilloscope input)

10
VIN (mV)

500
VIN (mV)

0
0
−10
5 −500

4 2
3
VOUT (V)

1
VOUT (V)

2
0
1
0 −1

−1 −2
0 20 40 60 80 100 0 2 4 6 8 10 12 14 16 18 20
Time (ns) Time (ns)

QUIESCENT CURRENT vs SUPPLY VOLTAGE QUIESCENT CURRENT vs TEMPERATURE

4.0 4.0
3.8 3.8
3.6 3.6
Quiescent Current (mA)

Quiescent Current (mA)

3.4 3.4
3.2 3.2
3.0 3.0
2.8 2.8
2.6 2.6
2.4 2.4
2.2 2.2
2.0 2.0
2 3 4 5 6 −40 −25 0 25 50 75 100 125
Supply Voltage (V) Temperature (_ C)

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TYPICAL CHARACTERISTICS (continued)

At TA = +25°C, VS = +5V, and Input Overdrive = 100mV, unless otherwise noted.

QUIESCENT CURRENT vs SHUTDOWN VOLTAGE QUIESCENT CURRENT vs FREQUENCY

3.5 25
CLOAD = 50pF
3.0
20
Quiescent Current (mA)

Quiescent Current (mA)

2.5
CLOAD = 20pF
2.0 15
5V
1.5 2.7V (from off to on)
(from off to on) 10
5V
CLOAD = 10pF
1.0 (from on to off)
2.7V 5
0.5
(from on to off) CLOAD = 0.5pF
0 0
0 1 2 3 4 5 0 20 40 60 80 100
Shutdown Voltage (V) Frequency (MHz)

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input. Figure 2 shows a typical topology used to introduce

APPLICATIONS INFORMATION 25mV of additional hysteresis, for a total of 31mV
The TLV3501 and TLV3502 both feature high-speed hysteresis when operating from a single 5V supply. Total
response and includes 6mV of internal hysteresis for hysteresis is approximated by Equation 1:
improved noise immunity with an input common-mode
( V)) R 1
range that extends 0.2V beyond the power-supply rails. V HYST + ) 6mV
R1 ) R 2 (1)
SHUTDOWN VHYST sets the value of the transition voltage required to
A shutdown pin allows the device to go into idle when it is switch the comparator output by enlarging the threshold
not in use. When the shutdown pin is high, the device region, thereby reducing sensitivity to noise.
draws about 2µA and the output goes to high impedance.
When the shutdown pin is low, the TLV3501 is active.
When the TLV3501 shutdown feature is not used, simply
connect the shutdown pin to the most negative supply, as VS = 5V
shown in Figure 1. It takes about 100ns to come out of
shutdown mode. The TLV3502 does not have the
0.1µF 2.2µF
shutdown feature.
VIN
TLV3501 VOUT
VS

R1 = 51Ω R 2 = 10kΩ
0.1µF 2.2µF
VREF
VIN
TLV3501 VOUT
VREF
Figure 2. Adding Hysteresis to the TLV350x

Figure 1. Basic Connections for the TLV3501

INPUT OVER-VOLTAGE PROTECTION
Device inputs are protected by ESD diodes that will
OPERATING VOLTAGE conduct if the input voltages exceed the power supplies by
TLV3501 comparators are specified for use on a single more than approximately 300mV. Momentary voltages
supply from +2.7V to +5.5V (or a dual supply from ±1.35V greater than 300mV beyond the power supply can be
to ±2.75V) over a temperature range of −40°C to +125°C. tolerated if the input current is limited to 10mA. This limiting
The device continues to function below this range, but is easily accomplished with a small input resistor in series
performance is not specified. with the comparator, as shown in Figure 3.

ADDING EXTERNAL HYSTERESIS

VS
The TLV350x has a robust performance when used with a
good layout. However, comparator inputs have little noise
immunity within the range of specified offset voltage 0.1µF 2.2µF
R
(±5mV). For slow moving or noisy input signals, the VIN
comparator output may display multiple switching as input TLV3501 VOUT
signals move through the switching threshold. In such VREF

applications, the 6mV of internal hysteresis of the TLV350x

might not be sufficient. In cases where greater noise
immunity is desired, external hysteresis may be added by Figure 3. Input Current Protection for Voltages
connecting a small amount of feedback to the positive Exceeding the Supply Voltage

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RELAXATION OSCILLATOR
The TLV350x can easily be configured as a simple and VHI
inexpensive relaxation oscillator. In Figure 4, the R2 TLV3502a
network sets the trip threshold at 1/3 and 2/3 of the supply.
Since this is a high-speed circuit, the resistor values are
rather low in order to minimize the effect of parasitic VIN VOUT
capacitance. The positive input alternates between 1/3 of
V+ and 2/3 of V+ depending on whether the output is low SN74LVC1G02
or high. The time to charge (or discharge) is 0.69R1C. TLV3502b
Therefore, the period is 1.38R1C. For 62pF and 1kΩ as VLO
shown in Figure 4, the output is calculated to be 10.9MHz.
An implementation of this circuit oscillated at 9.6MHz.
V
Parasitic capacitance and component tolerances explain
the difference between theory and actual performance. VOUT

VIN

VHI

VLO
VC

2/3 (V+)

1/3 (V+) t
Time

V+ 1.38R1C
C VS = 5V R
62pF
1 Figure 5. Window Comparator—Active High
1kΩ
VOUT

VLO

t TLV3502a
R2 R2
5kΩ 5kΩ f = 10MHz
V+
R2 VIN VOUT
5kΩ
SN74AHC00

TLV3502b
VHI

VOUT
Figure 4. Relaxation Oscillator
VIN

HIGH-SPEED WINDOW COMPARATOR VHI

A window comparator circuit is used to determine when a
signal is between two voltages. The TLV3502 can readily
be used to create a high-speed window comparator. VHI
VLO
is the upper voltage threshold, and VLO is the lower voltage
threshold. When VIN is between these two thresholds, the
output in Figure 5 is high. Figure 6 shows a simple means
of obtaining an active low output. Note that the reference
levels are connected differently between Figure 5 and
Time
Figure 6. The operating voltage range of either circuit is
2.7V to 5.5V.
Figure 6. Window Comparator—Active Low
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PCB LAYOUT In a high-speed circuit, fast rising and falling switching

For any high-speed comparator or amplifier, proper design transients create voltage differences across lines that
and printed circuit board (PCB) layout are necessary for would be at the same potential at DC. To reduce this effect,
optimal performance. Excess stray capacitance on the a ground plane is often used to reduce difference in voltage
active input, or improper grounding, can limit the maximum potential within the circuit board. A ground plane has the
performance of high-speed circuitry. advantage of minimizing the effect of stray capacitances
on the circuit board by providing a more desirable path for
Minimizing resistance from the signal source to the
the current to flow. With a signal trace over a ground plane,
comparator input is necessary in order to minimize the
at high-frequency the return current (in the ground plane)
propagation delay of the complete circuit. The source
tends to flow right under the signal trace. Breaks in the
resistance along with input and stray capacitance creates
ground plane (as simple as through-hole leads and vias)
an RC filter that delays voltage transitions at the input, and
increase the inductance of the plane, making it less
reduces the amplitude of high-frequency signals. The
effective at higher frequencies. Breaks in the ground plane
input capacitance of the TLV350x along with stray
for necessary vias should be spaced randomly.
capacitance from an input pin to ground results in several
picofarads of capacitance. Figure 7 shows an evaluation layout for the TLV3501 SO-8
The location and type of capacitors used for power-supply package; Figure 8 is for the SOT23-5 package. They are
bypassing are critical to high-speed comparators. The shown with SMA connectors bringing signals on and off
suggested 2.2µF tantalum capacitor do not need to be as the board. RT1 and RT2 are termination resistors for +VIN
close to the device as the 0.1µF capacitor, and may be and −VIN, respectively. C1 and C2 are power-supply
shared with other devices. The 2.2µF capacitor buffers the bypass capacitors. Place the 0.1µF capacitor closest to
power-supply line against ripple, and the 0.1µF capacitor the comparator. The ground plane is not shown, but the
provides a charge for the comparator during high- pads that the resistors and capacitors connect to are
frequency switching. shown. Figure 9 shows a schematic of this circuit.

−VIN
SD

VOUT
C2
RT2 C1

RT1
DUT

+VIN GND +VS

Figure 7. TLV3501D (SO-8) Sample Layout

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−VIN
SD

VOUT

RT2

RT1
DUT

C1 C2
GND +VS
+VIN

Figure 8. TLV3501DBV (SOT23) Sample Layout

+VS

−VIN C1 C2
RT2 100nF 2.2µF
50Ω

TLV3501 VOUT
+VIN
RT1
50Ω

Shutdown

Figure 9. Schematic for Figure 7 and Figure 8

10
 PACKAGE OPTION ADDENDUM
www.ti.com 26-Jul-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TLV3501AID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3501AIDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3501AIDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3501AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3501AIDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3501AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3502AID ACTIVE SOIC D 8 75 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
TLV3502AIDCNR ACTIVE SOT23 DCN 8 3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3502AIDCNT ACTIVE SOT23 DCN 8 250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TLV3502AIDR ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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Addendum-Page 1
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