TPS79301, TPS79318

    
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475
www.ti.com SLVS348H – JULY 2001 – REVISED OCTOBER 2004

ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR

REGULATORS IN NanoStar™ WAFER CHIP SCALE AND SOT23

FEATURES DESCRIPTION
• 200-mA RF Low-Dropout Regulator The TPS793xx family of low-dropout (LDO)
With Enable low-power linear voltage regulators features high
• Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V, power-supply rejection ratio (PSRR), ultralow-noise,
3.3-V, 4.75-V, and Adjustable (1.22-V to 5.5-V) fast start-up, and excellent line and load transient
responses in NanoStar wafer chip scale and SOT23
• High PSRR (70 dB at 10 kHz) packages. NanoStar packaging gives an ultrasmall
• Ultralow-Noise (32 µVRMS, TPS79328) footprint as well as an ultralow profile and package
• Fast Start-Up Time (50 µs) weight, making it ideal for portable applications such
as handsets and PDAs. Each device in the family is
• Stable With a 2.2-µF Ceramic Capacitor
stable, with a small 2.2-µF ceramic capacitor on the
• Excellent Load/Line Transient Response output. The TPS793xx family uses an advanced,
• Very Low Dropout Voltage (112 mV at Full proprietary BiCMOS fabrication process to yield ex-
Load, TPS79330) tremely low dropout voltages (e.g., 112 mV at
200 mA, TPS79330). Each device achieves fast
• 5- and 6-Pin SOT23 (DBV) and NanoStar Wafer
start-up times (approximately 50 µs with a 0.001-µF
Chip Scale (YEQ) Packages bypass capacitor) while consuming very low quiesc-
ent current (170 µA typical). Moreover, when the
APPLICATIONS device is placed in standby mode, the supply current
• RF: VCOs, Receivers, ADCs is reduced to less than 1 µA. The TPS79328 exhibits
• Audio approximately 32 µVRMS of output voltage noise at
• Cellular and Cordless Telephones 2.8-V output with a 0.1-µF bypass capacitor. Appli-
cations with analog components that are
• Bluetooth™, Wireless LAN noise-sensitive, such as portable RF electronics,
• Handheld Organizers, PDAs benefit from the high PSRR and low-noise features
as well as the fast response time.
DBV PACKAGE
(TOP VIEW)
TPS79328 TPS79328
IN 1 5 OUT RIPPLE REJECTION
OUTPUT SPECTRAL NOISE DENSITY
2 vs vs
GND
FREQUENCY FREQUENCY
3 4 0.30 100
EN NR
Output Spectral Noise Density (µV/√Hz)

VIN = 3.8 V
Fixed Option 90 IOUT = 200 mA
COUT = 2.2 µF
0.25
CNR = 0.1 µF 80
DBV PACKAGE
Ripple Rejection (dB)

(TOP VIEW) 70
0.20
IN 1 6 OUT 60

GND 2 5 FB 0.15 50
IOUT = 1 mA
40 IOUT = 10 mA
EN 3 4 NR 0.10
30
Adjustable Option IOUT = 200 mA
YEQ 20 VIN = 3.8 V
0.05
PACKAGE 10 COUT = 10 µF
(TOP VIEW) CNR = 0.01 µF
0 0
IN OUT 100 1k 10 k 100 k 10 100 1k 10 k 100 k 1M 10 M
C3 C1
B2 NR Frequency (Hz) Frequency (Hz)
A3 A1
EN GND

Figure 1.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark of Bluetooth Sig, Inc.
NanoStar is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains PRO- Copyright © 2001–2004, Texas Instruments Incorporated
DUCTION DATA information current as of publication date. Prod-
ucts conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.

AVAILABLE OPTIONS (1) (2)

PRODUCT VOLTAGE PACKAGE TJ SYMBOL PART NUMBER
TPS79301 1.22 V to 5.5 V SOT23 (DBV) PGVI TPS79301DBVR
SOT23 (DBV) PHHI TPS79318DBVR
TPS79318 1.8 V
CSP (YEQ) E3 TPS79318YEQ
SOT23 (DBV) PGWI TPS79325DBVR
TPS79325 2.5 V
CSP (YEQ) E4 TPS79325YEQ
SOT23 (DBV) PGXI TPS79328DBVR
TPS79328 2.8 V
CSP (YEQ) -40°C to +125°C E2 TPS79328YEQ
SOT23 (DBV) PHII TPS793285DBVR
TPS793285 2.85 V
CSP (YEQ) E5 TPS793285YEQ
SOT23 (DBV) PGYI TPS79330DBVR
TPS79330 3V
CSP (YEQ) E6 TPS79330YEQ
TPS79333 3.3 V SOT23 (DBV) PHUI TPS79333DBVR
TPS793475 4.75 V SOT23 (DBV) PHJI TPS793475DBVR

(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
(2) DBVR indicates tape and reel of 3000 parts. YEQR indicates tape and reel of 3000 parts. YEQT indicates tape and reel of 250 parts.

ABSOLUTE MAXIMUM RATINGS

over operating temperature range (unless otherwise noted) (1)
UNIT
VIN range -0.3 V to 6 V
VEN range -0.3 V to VIN + 0.3 V
VOUT range -0.3 V to 6 V
Peak output current Internally limited
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
Continuous total power dissipation See Dissipation Ratings Table
Junction temperature range, DBV package -40°C to 150°C
Junction temperature range, YEQ package -40°C to 125°C
Storage temperature range, Tstg -65°C to 150°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2
 TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
www.ti.com
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

DISSIPATION RATINGS TABLE

TA ≤ 25°C TA = 70°C TA = 85°C
DERATING FACTOR POWER POWER POWER
BOARD PACKAGE RθJC RθJA ABOVE TA = 25°C RATING RATING RATING
Low-K (1) DBV 65°C/W 255°C/W 3.9 mW/°C 390 mW 215 mW 155 mW
High-K (2) DBV 65°C/W 180°C/W 5.6 mW/°C 560 mW 310 mW 225 mW
Low-K (1) YEQ 27°C/W 255°C/W 3.9 mW/°C 390 mW 215 mW 155 mW
High-K (2) YEQ 27°C/W 190°C/W 5.3 mW/°C 530 mW 296 mW 216 mW

(1) The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top
of the board.
(2) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.

ELECTRICAL CHARACTERISTICS
over recommended operating temperature range TJ = -40 to 125°C, VEN = VIN, VIN = VOUT(nom) + 1 V (1), IOUT = 1 mA,
COUT = 10 µF, CNR = 0.01 µF (unless otherwise noted). Typical values are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage (1) 2.7 5.5 V
IOUT Continuous output current 0 200 mA
VFB Internal reference (TPS79301) 1.201 1.225 1.250 V
Output voltage range (TPS79301) VFB 5.5 - VDO V
TPS79318 0 µA < IOUT < 200 mA, 2.8 V < VIN < 5.5 V 1.764 1.8 1.836 V
TPS79325 0 µA < IOUT < 200 mA, 3.5 V < VIN < 5.5 V 2.45 2.5 2.55 V
TPS79328 0 µA < IOUT < 200 mA, 3.8 V < VIN < 5.5 V 2.744 2.8 2.856 V
Output voltage TPS793285 0 µA < IOUT < 200 mA, 3.85 V < VIN < 5.5 V 2.793 2.85 2.907 V
TPS79330 0 µA < IOUT < 200 mA, 4 V < VIN < 5.5 V 2.94 3 3.06 V
TPS79333 0 µA ≤ IOUT < 200 mA, 4.3 V < VIN < 5.5 V 3.234 3.3 3.366 V
TPS793475 0 µA < IOUT < 200 mA, 5.25 V < VIN < 5.5 V 4.655 4.75 4.845 V
Line regulation (∆VOUT%/∆VIN) (1) VOUT + 1 V < VIN≤ 5.5 V 0.05 0.12 %/V
Load regulation (∆VOUT%/∆IOUT) 0 µA < IOUT < 200 mA, TJ = 25°C 5 mV
TPS79328 IOUT = 200 mA 120 200
TPS793285 IOUT = 200 mA 120 200
Dropout voltage (2)
TPS79330 IOUT = 200 mA 112 200 mV
(VIN = VOUT(nom) - 0.1V)
TPS79333 IOUT = 200 mA 102 180
TPS793475 IOUT = 200 mA 77 125
Output current limit VOUT = 0 V 285 600 mA
GND pin current 0 µA < IOUT < 200 mA 170 220 µA
Shutdown current (3) VEN = 0 V, 2.7 V < VIN < 5.5 V 0.07 1 µA
FB pin current VFB = 1.8 V 1 µA
f = 100 Hz, TJ = 25°C, IOUT = 10 mA 70
f = 100 Hz, TJ = 25°C, IOUT = 200 mA 68
Power-supply ripple rejection TPS79328 dB
f = 10 kHz, TJ = 25°C, IOUT = 200 mA 70
f = 100 kHz, TJ = 25°C, IOUT = 200 mA 43
CNR = 0.001 µF 55
BW = 200 Hz to 100 kHz, CNR = 0.0047 µF 36
Output noise voltage (TPS79328) µVRMS
IOUT = 200 mA CNR = 0.01 µF 33
CNR = 0.1 µF 32

(1) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater.

(2) Dropout is not measured for the TPS79318 and TPS79325 since minimum VIN = 2.7 V.
(3) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low.

3
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

ELECTRICAL CHARACTERISTICS (continued)

over recommended operating temperature range TJ = -40 to 125°C, VEN = VIN, VIN = VOUT(nom) + 1 V, IOUT = 1 mA,
COUT = 10 µF, CNR = 0.01 µF (unless otherwise noted). Typical values are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CNR = 0.001 µF 50
Time, start-up (TPS79328) RL = 14 Ω, COUT = 1 µF CNR = 0.0047 µF 70 µs
CNR = 0.01 µF 100
High level enable input voltage 2.7 V < VIN < 5.5 V 1.7 VIN V
Low level enable input voltage 2.7 V < VIN < 5.5 V 0 0.7 V
EN pin current VEN = 0 -1 1 µA
UVLO threshold VCC rising 2.25 2.65 V
UVLO hysteresis 100 mV

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 TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
www.ti.com
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

FUNCTIONAL BLOCK DIAGRAMS

ADJUSTABLE VERSION

IN OUT

UVLO 59 k
Current
2.45V Sense

ILIM SHUTDOWN R1
GND
_ + FB
EN
R2
UVLO

Thermal
Shutdown QuickStart External to
the Device
Bandgap 250 kΩ Vref
IN Reference NR
1.22V

FIXED VERSION

IN OUT
UVLO
2.45V Current
Sense
GND SHUTDOWN
ILIM
R1
_ +
EN

UVLO
R2
Thermal
Shutdown
QuickStart R2 = 40 kΩ

Bandgap 250 kΩ Vref

IN Reference NR
1.22V

Terminal Functions
TERMINAL
SOT23 SOT23 WCSP DESCRIPTION
NAME
ADJ FIXED FIXED
Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap.
NR 4 4 B2
This improves power-supply rejection and reduces output noise.
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into
EN 3 3 A3
shutdown mode. EN can be connected to IN if not used.
FB 5 N/A N/A This terminal is the feedback input voltage for the adjustable device.
GND 2 2 A1 Regulator ground
IN 1 1 C3 Unregulated input to the device.
OUT 6 5 C1 Output of the regulator.

5
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

TYPICAL CHARACTERISTICS (SOT23 PACKAGE)

TPS79328 TPS79328 TPS79328

OUTPUT VOLTAGE OUTPUT VOLTAGE GROUND CURRENT
vs vs vs
OUTPUT CURRENT JUNCTION TEMPERATURE JUNCTION TEMPERATURE
2.805 2.805 250
VIN = 3.8 V VIN = 3.8 V
2.804
COUT = 10 µF COUT = 10 µF IOUT = 1 mA
TJ = 25°C 2.800
2.803 200
IOUT = 1 mA
2.802
2.795 IOUT = 200 mA
2.801

IGND (µA)
150
VOUT (V)

VOUT (V)
2.800 2.790
2.799 IOUT = 200 mA 100
2.785
2.798
2.797 50
2.780
2.796 VIN = 3.8 V
COUT = 10 µF
2.795 2.775 0
0 50 100 150 200 −40 −25 −10 5 20 35 50 65 80 95 110 125 −40 −25 −10 5 20 35 50 65 80 95 110 125
IOUT (mA) TJ (°C) TJ (°C)

Figure 2. Figure 3. Figure 4.

TPS79328 OUTPUT SPECTRAL TPS79328 OUTPUT SPECTRAL TPS79328 OUTPUT SPECTRAL

NOISE DENSITY NOISE DENSITY NOISE DENSITY
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
0.30 0.30 1.6

Output Spectral Noise Density (µV/√Hz)

VIN = 3.8 V
Output Spectral Noise Density (µV/√Hz)

VIN = 3.8 V VIN = 3.8 V

Output Spectral Noise Density (µV/√Hz)

COUT = 2.2 µF COUT = 10 µF 1.4 IOUT = 200 mA

0.25 0.25 COUT = 10 µF
CNR = 0.1 µF CNR = 0.1 µF
1.2
CNR = 0.001 µF
0.20 0.20
1.0 CNR = 0.0047 µF
IOUT = 1 mA
0.15 0.15 0.8 CNR = 0.01 µF
IOUT = 1 mA
0.6 CNR = 0.1 µF
0.10 0.10
IOUT = 200 mA IOUT = 200 mA 0.4
0.05 0.05
0.2

0 0 0
100 1k 10 k 100 k 100 1k 10 k 100 k 100 1k 10 k 100 k
Frequency (Hz) Frequency (Hz) Frequency (Hz)

Figure 5. Figure 6. Figure 7.

ROOT MEAN SQUARE OUTPUT TPS79328

NOISE OUTPUT IMPEDANCE DROPOUT VOLTAGE
vs vs vs
CNR FREQUENCY JUNCTION TEMPERATURE
60 2.5 180
VOUT = 2.8 V VIN = 3.8 V VIN = 2.7 V
COUT = 10 µF 160 COUT = 10 µF
IOUT = 200 mA
50 TJ = 25° C
COUT = 10 µF 2.0
RMS, Output Noise (VRMS)

140

40 120
1.5 IOUT = 200 mA
VDO (mV)
ZO (Ω)

IOUT = 1 mA 100
30
80
1.0
20 IOUT = 100 mA
60

0.5 40
10
IOUT = 10 mA
20
BW = 100 Hz to 100 kHz
0 0 0
0.001 0.01 0.1 10 100 1k 10 k 100 k 1M 10 M −40 −25 −10 5 20 35 50 65 80 95 110 125
CNR (µF) Frequency (Hz) TJ (°C)

Figure 8. Figure 9. Figure 10.

6
 TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
www.ti.com
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)

TPS79328 TPS79328 TPS79328

RIPPLE REJECTION RIPPLE REJECTION RIPPLE REJECTION
vs vs vs
FREQUENCY FREQUENCY FREQUENCY
100 100 100
VIN = 3.8 V VIN = 3.8 V
90 90 COUT = 2.2 µF 90 COUT = 2.2 µF
IOUT = 200 mA
80 80 CNR = 0.01 µF CNR = 0.1 µF
80
IOUT = 200 mA IOUT = 200 mA

Ripple Rejection (dB)

Ripple Rejection (dB)

Ripple Rejection (dB)

70 70 70
60 60 60

50 50 50
IOUT = 10 mA IOUT = 10 mA
40 40 40
IOUT = 10 mA
30 30 30
20 VIN = 3.8 V 20 20
10 COUT = 10 µF
10 10
CNR = 0.01 µF
0 0 0
10 100 1k 10 k 100 k 1M 10 M 10 100 1k 10 k 100 k 1M 10 M 10 100 1k 10 k 100 k 1M 10 M
Frequency (Hz) Frequency (Hz) Frequency (Hz)

Figure 11. Figure 12. Figure 13.

TPS79328 OUTPUT VOLTAGE,

ENABLE VOLTAGE
vs TPS79328 TPS79328
TIME (START-UP) LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE

VIN = 3.8 V
4 4.8 20 COUT = 10 µF
VOUT (mV)

∆VOUT (mV)
VEN (V)

2 VIN = 3.8 V 0
VOUT = 2.8 V
0 IOUT = 200 mA 3.8 −20
COUT = 2.2 µF IOUT = 200 mA
TJ = 25°C COUT = 2.2 µF −40
CNR = 0.001 µF
CNR = 0.01 µF dv 0.4 V
3 20

µs 300 di 0.02A
dt

µs
VIN (mV)

dt
IOUT (mA)
VOUT (V)

2 0 200
CNR = 0.0047 µF
1mA
1 -20 100
CNR = 0.01 µF
0 0
0 20 40 60 80 100 120 140 160 180 200 0 10 20 30 40 50 60 70 80 90 100 0 50 100 150 200 250 300 350 400 450 500
Time (µs) Time (µs) Time (µs)

Figure 14. Figure 15. Figure 16.

TPS79301
DROPOUT VOLTAGE DROPOUT VOLTAGE
vs vs
POWER-UP / POWER-DOWN OUTPUT CURRENT INPUT VOLTAGE
250 200
VOUT = 3 V
RL = 15 Ω TJ = 125°C
200
150
TJ = 125°C
500 mV/div

VDO (mV)

150
VDO (mV)

TJ = 25°C
TJ = 25°C 100
100
VIN
VOUT
TJ = −55°C 50 TJ = −40°C
50

IOUT = 200 mA
0 0
1s/div 0 20 40 60 80 100 120 140 160 180 200 2.5 3.0 3.5 4.0 4.5 5.0
IOUT (mA) VIN (V)

Figure 17. Figure 18. Figure 19.

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TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

TYPICAL CHARACTERISTICS (SOT23 PACKAGE) (continued)

TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY

EQUIVALENT SERIES RESISTANCE EQUIVALENT SERIES RESISTANCE
(ESR) (ESR)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
100 100
COUT = 2.2 µF
COUT = 10 µF
ESR, Equivalent Series Resistance (Ω)

ESR, Equivalent Series Resistance (Ω)

VIN = 5.5 V, VOUT ≥ 1.5 V
VIN = 5.5 V
TJ = −40°C to 125°C
TJ = −40°C to 125°C
10 10
Region of Instability Region of Instability

1 1

0.1 0.1
Region of Stability
Region of Stability

0.01 0.01
0 0.02 0.04 0.06 0.08 0.20 0 0.02 0.04 0.06 0.08 0.20
IOUT (A) IOUT (A)

Figure 20. Figure 21.

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 TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
www.ti.com
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

APPLICATION INFORMATION

The TPS793xx family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive
battery-operated equipment. The device features extremely low dropout voltages, high PSRR, ultralow output
noise, low quiescent current (170 µA typically), and enable-input to reduce supply currents to less than 1 µA
when the regulator is turned off.
A typical application circuit is shown in Figure 22.
VIN
VIN IN OUT VOUT

TPS793xx
VOUT
0.1µF EN GND NR 2.2µF

0.01µF

Figure 22. Typical Application Circuit

External Capacitor Requirements

A 0.1-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the
TPS793xx, is required for stability and improves transient response, noise rejection, and ripple rejection. A
higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated or the device
is located several inches from the power source.
Like most low dropout regulators, the TPS793xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance is 2.2 µF. Any 2.2-µF or larger
ceramic capacitor is suitable, provided the capacitance does not vary significantly over temperature. If load
current is not expected to exceed 100 mA, a 1.0-µF ceramic capacitor can be used.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS793xx has an NR pin which
is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in
conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the
voltage reference noise and, therefore, the noise at the regulator output. In order for the regulator to operate
properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR
drop across the internal resistor thus creating an output error. Therefore, the bypass capacitor must have
minimal leakage current. The bypass capacitor should be no more than 0.1-µF to ensure that it is fully charged
during the quickstart time provided by the internal switch shown in the Functional Block Diagrams
As an example, the TPS79328 exhibits only 32 µVRMS of output voltage noise using a 0.1-µF ceramic bypass
capacitor and a 2.2-µF ceramic output capacitor. Note that the output starts up slower as the bypass capacitance
increases due to the RC time constant at the NR pin that is created by the internal 250-kΩ resistor and external
capacitor.

Board Layout Recommendation to Improve PSRR and Noise Performance

To improve ac measurements like PSRR, output noise, and transient response, it is recommended that the board
be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND
pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND
pin of the device.

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TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

APPLICATION INFORMATION (continued)

Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max).
The maximum power dissipation limit is determined using Equation 1:
T max
T A
P D(max)  J
R
JA (1)
Where:
• TJmax is the maximum allowable junction temperature.
• RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings Table).
• TA is the ambient temperature.
The regulator dissipation is calculated using Equation 2:
P D  VINV OUT
I OUT (2)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal
protection circuit.

Programming the TPS79301 Adjustable LDO Regulator

The output voltage of the TPS79301 adjustable regulator is programmed using an external resistor divider as
shown in Figure 23. The output voltage is calculated using Equation 3:

V OUT  VREF
1   R1
R2

(3)
Where:
• VREF = 1.2246 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used for improved noise performance, but the solution consumes more power. Higher resistor values should be
avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially in-
creases/decreases the feedback voltage and thus erroneously decreases/increases VOUT. The recommended
design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA, C1 = 15 pF for stability, and then
calculate R1 using Equation 4:

R1  
V OUT
Vref  1


R2
(4)
In order to improve the stability of the adjustable version, it is suggested that a small compensation capacitor be
placed between OUT and FB. For voltages <1.8 V, the value of this capacitor should be 100 pF. For voltages
>1.8 V, the approximate value of this capacitor can be calculated as shown in Equation 5:
(3 x 107) x (R 1
R 2)
C1 
(R 1 x R2) (5)
The suggested value of this capacitor for several resistor ratios is shown in the table below. If this capacitor is
not used (such as in a unity-gain configuration) or if an output voltage <1.8 V is chosen, then the minimum
recommended output capacitor is 4.7 µF instead of 2.2 µF.

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TPS79325, TPS79328, TPS793285
www.ti.com
TPS79330, TPS79333, TPS793475
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

APPLICATION INFORMATION (continued)

OUTPUT VOLTAGE
PROGRAMMING GUIDE
VIN IN OUT VOUT

1 µF
TPS793xx R1 C1 OUTPUT
EN R1 R2 C1
1 µF VOLTAGE
NR GND FB
1.22 V short open 0 pF
0.01 µF R2
2.5 V 31.6 k Ω 30.1 k Ω 22 pF
3.3 V 51 k Ω 30.1 k Ω 15 pF
3.6 V 59 k Ω 30.1 k Ω 15 pF

Figure 23. TPS79301 Adjustable LDO Regulator Programming

Regulator Protection
The TPS793xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input
voltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to the
input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be
appropriate.
The TPS793xx features internal current limiting and thermal protection. During normal operation, the TPS793xx
limits output current to approximately 400 mA. When current limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure,
care should be taken not to exceed the power dissipation ratings of the package or the absolute maximum
voltage ratings of the device. If the temperature of the device exceeds approximately 165°C, thermal-protection
circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation
resumes.

11
TPS79301, TPS79318
TPS79325, TPS79328, TPS793285
TPS79330, TPS79333, TPS793475 www.ti.com
SLVS348H – JULY 2001 – REVISED OCTOBER 2004

TPS793xxYEQ NanoStar™ Wafer Chip Scale Information

0,79
0,84

1,30
1,34

0.625 Max

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. NanoStar package configuration.
D. This package is tin-lead (SnPb); consult the factory for availability of lead-free material.
NanoStar is a trademark of Texas Instruments.

Figure 24. NanoStar™ Wafer Chip Scale Package

12
 PACKAGE OPTION ADDENDUM
www.ti.com 28-Feb-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
TPS79301DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79301DBVRG4 ACTIVE SOT-23 DBV 6 3000 None Call TI Call TI
TPS79318DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79318DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79318DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79318YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM
TPS79318YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM
TPS79325DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79325DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79325YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM
TPS79325YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM
TPS793285DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS793285DBVRG4 ACTIVE SOT-23 DBV 5 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS793285DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS793285YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM
TPS793285YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM
TPS79328DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79328DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79328YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM
TPS79328YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM
TPS79330DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79330DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79330YEQR ACTIVE DSBGA YEQ 5 3000 None Call TI Level-1-240C-UNLIM
TPS79330YEQT ACTIVE DSBGA YEQ 5 250 None Call TI Level-1-240C-UNLIM
TPS79333DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS79333DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS793475DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS793475DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM
www.ti.com 28-Feb-2005

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.

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Addendum-Page 2
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