Approval

TO : DELL
DATE : Feb. 26. 2010

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SAMSUNG
SAMSUNGTFT-LCD
TFT-LCD
MODEL
MODEL NO
NO :: LTN133AT17

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LTN133AT17
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NOTE : Extension code [ -1 ]
→ LTN133AT17-1
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Surface type [ Anti-Glare ]
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The information described in this SPEC is preliminary and can be changed without prior notice.
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APPROVED BY :

PREPARED BY : LCD Application Engineering Part I

SAMSUNG ELECTRONICS CO., LTD.

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 Approval
CONTENTS
Revision History -------------------( 3 )

General Description -------------------( 4 )

1. Absolute Maximum Ratings -------------------( 5 )

1.1 Absolute Ratings of environment

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1.2 Electrical Absolute Ratings

2. Optical Characteristics -------------------( 7 )

3. Electrical Characteristics - - - - - - - - - - - - - - - - - - - ( 10 )
3.1 TFT LCD Module

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3.2 Backlight Unit

4. Block Diagram - - - - - - - - - - - - - - - - - - - ( 13 )
4.1 TFT LCD Module
4.2 LED connection and placement

5. Input Terminal Pin Assignment

d .co - - - - - - - - - - - - - - - - - - - ( 14 )
5.1 Input Signal & Power
5.2 eDP Interface
5.3 Timing Diagrams of eDP For Transmitting
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5.4 Input Signals, Basic Display Colors and Gray Scale of Each Color.
5.5 Pixel format

6. Interface Timing - - - - - - - - - - - - - - - - - - - ( 19 )
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6.1 Timing Parameters

6.2 Timing Diagrams of interface Signal
6.3 Power ON/OFF Sequence
6.4 Input video tolerance of Vsync and Hsync
6.5 Falut / status read timing
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7. Outline Dimension - - - - - - - - - - - - - - - - - - - ( 24 )

8. Packing -- - - - - - - - - - - - - - - - - - ( 25 )

9. Markings & Others -- - - - - - - - - - - - - - - - - - ( 26 )

10. General Precaution - - - - - - - - - - - - - - - - - - - ( 28 )

11. EDID - - - - - - - - - - - - - - - - - - - ( 30 )

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 REVISION
REVISIONHISTORY
HISTORY Approval

Date Revision No. Page Summary

Feb. 26. 2010 A00 All LTN133AT17-1 model spec was issued first.

May. 20. 2010 A01 All NEC D-IC ECR

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 Approval
GENERAL DESCRIPTION
DESCRIPTION
LTN133AT17-1 is a color active matrix TFT (Thin Film Transistor) liquid crystal display
(LCD) that uses amorphous silicon TFT as switching devices. This model is composed of a
TFT LCD panel, a driver circuit and a backlight system. The resolution of a 13.3" contains
1366 x 768 pixels and can display up to 262,144 colors. 6 O'clock direction is the optimum
viewing angle.

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FEATURES
• High contrast ratio
• 1366 x 768 pixels resolution (16:9, HD)
• Fast Response Time

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• Low power consumption
• LED BLU Structure with embeded LED driver
• DE (Data enable) only mode
• eDP (Display Port) interface (1lane @ 2.7GHz)
• On board EDID chip
• RoHS compliance
• PVC free compliance
• BFR free compliance
• AS free compliance
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APPLICATIONS
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• Notebook PC
• If the usage of this product is not for PC application, but for others, please contact SEC
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GENERAL INFORMATION

Item Specification Unit Note

Display area 293.42(H) x 164.97(V) ( 13.3” diagonal ) mm

Driver element a-Si TFT active matrix

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Display colors 262,144

Number of pixel 1366 x 768 pixel 16 : 9

Pixel arrangement RGB vertical stripe

Pixel pitch 0.2148 (H) x 0.2148 (V) (typ) mm
Display Mode Normally white
Surface treatment Haze 17%, Hardness 3H Anti-Glare

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 Mechanical Information
Approval
Item Min. Typ. Max. Unit Note
Horizontal (H) 307.1 307.6 308.1 mm
Module
Vertical (V) 182.6 183.1 183.6 mm
size
Depth (D) 4.7 5.0 5.3 mm (1)
Weight - - 350 g

Note (1) Measurement condition of outline dimension

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. Equipment : Vernier Calipers
. Push Force : 500g ⋅f (minimum)

1. ABSOLUTE MAXIMUM RATINGS

1.1 ENVIRONMENTAL ABSOLUTE RATINGS

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Item Symbol Min. Max. Unit Note
Storage temperate TSTG -20 60 °C (1)
Operating temperate
(Temperature of glass surface)
Shock ( non-operating )
Vibration (non-operating)
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TOPR

Snop
Vnop
0

-
-
50

240
2.41
°C

G
G
(1)

(2),(4)
(3),(4)

Note (1) Temperature and relative humidity range are shown in the figure below.
95 % RH Max. (40 °C ≥ Ta)
Maximum wet - bulb temperature at 39 OC or less. (Ta > 40 °C ) No condensation
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Relative Humidity ( %RH)
100 90
( 40,90 )

80
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60
Operating Range
( 50,50.4 )
40
( 60,27.7 )
20
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5
Storage Range
0
-40 -20 0 20 40 60 80

Temperature (OC)
(2) 2ms, half sine wave, one time for ±X, ±Y, ± Z.
(3) 5 - 500 Hz, random vibration, 30min for X, Y, Z.
(4) At testing Vibration and Shock, the fixture in holding the Module to be tested have to be
hard and rigid enough so that the Module would not be twisted or bent by the fixture.

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 Approval
1.2 ELECTRICAL ABSOLUTE RATINGS

(1) TFT LCD MODULE

VDD =3.3V, VSS = GND = 0V

Item Symbol Min. Max. Unit Note

Power Supply Voltage VDD VDD – 0.3 VDD + 0.3 V (1)

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Logic Input Voltage VDD VDD – 0.3 VDD + 0.3 V (1)

Note (1) Within Ta (25 ± 2 °C )

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 Approval
2. OPTICAL CHARACTERISTICS

The following items are measured under stable conditions. The optical characteristics
should be measured in a dark room or equivalent state with the methods shown in Note (5).
Measuring equipment : TOPCON SR-3

* Ta = 25 ± 2 °C, VDD=3.3V, fv= 60Hz, fDCLK = 72.14 MHz, IF = 20 mA

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Item Symbol Condition Min. Typ. Max Unit Note

Contrast Ratio (1), (2),

CR 300 - - -
(5 Points) (5)

Response Time at Ta
TRT_B/W - 16 25 msec (1), (3)
( Rising + Falling )

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Average Luminance IL=19mA
YL,AVE 200 220 - cd/m2
of White (5 Points) (1), (4)

RX 0.560 0.590 0.620

Color
Chromaticity
Red

Green
d RY

GX

GY
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Normal
Viewing
Angle
0.320

0.290

0.505
0.350

0.320

0.535
0.380

0.350

0.565
- (1), (5)
( CIE ) BX φ=0 0.125 0.155 0.185
Blue θ=0 PR-650
BY 0.085 0.115 0.145
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WX 0.283 0.313 0.343
White
WY 0.299 0.329 0.359

Color Gamut - 45 - %
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θL 40 - -
Hor.
θR 40 - - Degrees
CR ≥ 10
Ver. φH 15 - -

Viewing φL 30 - - (1), (5)

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Angle θL 20 - - BM-5A
Hor.
θR CR ≥ 100 20 - - Degrees

Ver. φH 5 - -

φL 10 - -

13 Points
δL - - 1.54 - (6)
White Variation

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 Note 1) Definition of Viewing Angle : Viewing angle range(10 ≤ C/R) Approval
Normal Line
φ = 0o, θ = 0o

θL
θR
φH
φL 12 O’clock
θ L =90o x y direction
φ H = 90o

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6 O’clock y' x'
direction
θR =90o
φ L= 90o

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Note 2) Definition of Contrast Ratio (CR) : Ratio of gray max (Gmax) ,gray min (Gmin)
at 5 points (33, 55, 77, 37, 73)

CR

Points
=

: 33, 55, 77, 37, 73

Note 3) Definition of Response time :

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CR(33) + CR(55) + CR(77) + CR(37) + CR(73)
5

at the figure of Note (6).

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Display data White(TFT OFF) Black(TFT ON) White(TFT OFF)

TR TF
100%
90%
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Optical
Response
10%
0%
Time
Note 4) Definition of Average Luminance of White : measure the luminance of white at 5 points.
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(30%) (50%) (70%)

VIEW AREA

33 37
Average Luminance of White ( YL,AVE )
(30%)
55
YL33 + YL55 + YL77 + YL37 + YL73 (50%)
YL,AVE = 73 77
5 (70%)

: test point
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 Approval
Note 5) After stabilizing and leaving the panel alone at a given temperature for 30 min , the measurement
should be executed. Measurement should be executed in a stable, windless,and dark room.
30 min after lighting the backlight. This should be measured in the center of screen.
LED current : 20 mA
Environment condition : Ta = 25 ± 2 °C

Photo-detector
( TOPCON SR-3 )

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Field = 2°
50 cm

TFT-LCD module LCD panel

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Center of the screen
[ Optical characteristics measurement setup ]
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Note 6) Definition of 13 points white variation (δ L ), [ 11 ~ 99 ]

Maximum luminance of 13 points

δL =
Minimum luminance of 13 points
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: test point

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3. ELECTRICAL CHARACTERISTICS Approval
3.1 TFT LCD MODULE
Ta= 25 ± 2°C

Item Symbol Min. Typ. Max. Unit Note

Voltage of Power Supply VDD 3.0 3.3 3.6 V

Interface Type eDP eDP V1(D11) Va(Rx/Tx) (1)

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Vsync Frequency fv - 60 - Hz

Hsync Frequency fH - 47.40 - KHz

Main Frequency fDCLK - 72.14 - MHz

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Rush Current IRUSH - - 2 A (4)

White - 350 - mA (2),(3)*a

Current of Power IDD
Mosaic - 360 - mA (2),(3)*b
Supply
Black .co - 380 400 mA

Note (1) Display Port interface characteristics should be based on VESA standard (eDP V1 draft11)
d (2),(3)*c

(2) fV = 60Hz, fDCLK = 72.14 MHZ, VDD = 3.3V , DC Current.

(3) Power dissipation pattern
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*a) White Pattern *b) Mosaic Pattern

VIEW AREA
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Display Brightest Gray Level

Display Darkest Gray Level

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 Approval
*c) 1dot Vertical stripe pattern

RG B R G B R G B R G

RG B R G B R G B R G

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RG B R G B R G B R G

RG B R G B R G B R G

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4) Rush current measurement condition
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3.3V
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2SK1059
VDD ( LCD INPUT)
FUSE
R1 C1
47K 1uF
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R2
CONTROL SIGNAL M2
(HIGH to LOW) 2SK1399
1K

12V
R3 C2
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C3 47K
10000pF
1uF
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VDD rising time is 470us

3.3V
0.9VDD

0.1VDD
GND
470us

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 Approval

3.2 BACK-LIGHT UNIT

Ta= 25 ± 2 °C
Item Symbol Min. Typ. Max. Unit Note
LED Forward Current IF - 20 - mA
LED Forward Voltage VF 3.0 3.2 3.4 V

LED Array Voltage VP 27.0 28.8 30.6 V VF X 9 LEDs

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IF X VF X 36 LEDs
Power Consumption P - - 3.5 W
(w/ Converter Efficiency)

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3.3 LED Driver
- LED Driver Manufacturer : Max17061 (Maxim) Ta= 25 ± 2 °C

Item

Input Voltage

Input Current

Input Power
dSymbol

Vin

P
I
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Min.

7.5

400

3.00
Typ.

12

240

2.88
Max.

21

130

2.73
Unit

mA

W
Note

P= Vin X I

Operating Frequency Fo 0.9 - 1.1 MHz

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PWM Input Frequency FPWM 5 - 100 kHz

PWMI Duty Cycle D 0 - 100 %

Vin=7.5~21V,
28.6 30 31.4 mA
RISET = 133kohm
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Vin=7.5~21V,
19.1 20 20.9 mA
Output Current RISET = 200kohm
Iout
(each LED string) Vin=7.5~21V,
18.1 19 19.9 mA
RISET = 211kohm
Vin=7.5~21V,
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14.3 15 15.7 mA
RISET = 266kohm
Note - Test Equipment : Fluke 45

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4. BLOCK DIAGRAM Approval
4.1 TFT LCD Module

EDID
EEPROM
I2C bus
eDP mLVDS
Input Connector
eDP Input / mLVDS Output
I-PEX 20455-030E-0 Timing Controller

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or Compatible

Source 13.3” HD
SMBUS
Driver ICs TFT-LCD Panel
DC-DC Gamma
Converter

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Generator
LED Power
Control

VCOM

LED B/L

Video Signal
Control Signal
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Generator

SOURCE PCB

VCOM
LED Power&signal
DVDD
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AVDD
Von/Voff
Gamma
Feedback

4.2 LED connection and placement

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 Approval
5. INPUT TERMINAL PIN ASSIGNMENT
5.1. Input Signal & Power (eDP, Connector : 20455-030E-02 by I-PEX or equivalent )

PIN # Symbol Description

1 DIAG_LOOP Diag pin for Dell testing. Pin 1 & 30 must be connected
2 H_GND High Speed Ground
3 NC No Connection (Reserved for 2lane)

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4 NC No Connection (Reserved for 2lane)
5 H_GND High Speed Ground
6 Lane0_N Complement Signal Link - Lane 0
7 Lane0_P True Signal Link - Lane 0

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8 H-GND High Speed Ground
9 AUX+ True Signal - Auxiliary Channel
10
11

12
13
AUX-
H-GND

VCC
VCC
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Complement Signal - Auxiliary Channel
High Speed Ground

VCC for LCD Module (3.3V)

VCC for LCD Module (3.3V)
14 BIST Build-In Self Test Enable
15 GND Ground
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16 GND Ground
17 HPD HPD(Hot Plug Detect) signal pin
18 BL_GND BL Ground
19 BL_GND BL Ground
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20 BL_GND BL Ground
21 BL_GND BL Ground
22 NC No Connection (Reserved)
23 BL_PWM System PWM Signal Input
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24 SMBUS_CLK Backlight Control CLK

25 SMBUS_DATA Backlight Control Data
26 VBL Backlight Power
27 VBL Backlight Power
28 VBL Backlight Power
29 VBL Backlight Power
30 DIAG_LOOP Diag pin for Dell testing. Pin 1 & 30 must be connected

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 Approval
5.2 eDP Interface : (compliant to DP spec v1.1a & eDP spec v1.1)

Lane 0

---
BE R0-5:0|G0-5:4

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First partial-pixels
of line N Pix0 G0-3:0|B0-5:2
-----------------------

B0-1:0|R1-5:0

G1-5:0|B1-5:4 18bpp RGB mapping to 1-lane

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B1-3:0|R2-5:2

R2-1:0|G2-5:0
Last partial-pixels
of line N
d BS

VB-ID
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…..

Mvid7:0

Maud7:0
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Dummy data symbols

(may be substituted with
audio packet)
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BE
First partial-pixels
of line N+1 Pix0
---------------------------
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Pixel data symbols

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 Approval
5.3 Timing Diagrams of eDP For Transmission

eDP Receiver : Integrated T-CON

The following requirements are compliant to VESA DisplayPort Standard v1.1a

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Parameter Symbol Min. Typ. Max. Unit Note
- 1227 - - mUI at 2MHz
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Receiver Jitter - 548 - - mUI at 10MHz

Tolerance (HBR) - 505 - - mUI at 20MHz
- 491 - - mUI at 100MHz
- 1648 - - mUI at 2MHz
Receiver Jitter
Tolerance (HBR) - 778 - - mUI at 10MHz
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- 747 - - mUI at 20MHz

Differential peak-to-
VRX-DIFFp-p 100 - 1320 mV HBR & RBR
peak input voltage
RX DC Common
VRX-DC-CM - GND - V -
Mode Voltage
LRX-SKEW- - - 150 ps High Bit Rate
Lane Intra-pair INTRA_PAIR
Skew LRX-SKEW- - - 300 ps Reduced Bit Rate
INTRA_PAIR

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 Approval
5.2 Input Signals, Basic Display Colors and Gray Scale of Each Color
Data Signal Gray
Color Display Red Green Blue Scale
R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 45 B5 Level

Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 -
Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 -

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Basic Cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 -
Colors Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 -
Magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 -
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 -

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White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 -
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R0
Dark 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R1
↑ 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R2
Gray
Scale
Of
Red
↓
:
:

Light
1
0
:
:
d :
:
0
1
1
1
:
:
:
:
1
1
:
:
1
1
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1
1
:
:
:
:
0
0
:
:
0
0
:
:
0
0
0
0
:
:
:
:
0
0
:
:
0
0
:
:
0
0
:
:
0
0
:
:
0
0
:
:
0
0
:
:
0
0
:
:
0
0
R3∼R60

R61
R62
Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 R63
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 G0
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Dark 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 G1

Gray ↑ 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 G2
Scale : : : : : : : : : : : : : : : : : : :
G3∼G60
Of : : : : : : : : : : : : : : : : : : :
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Green
↓ 0 0 0 0 0 0 1 0 1 1 1 1 0 0 0 0 0 0 G61
Light 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 G62
Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 G63
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 B0
Dark 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 B1
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Gray ↑ 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 B2
Scale : : : : : : : : : : : : : : : : : : :
B3∼B60
Of : : : : : : : : : : : : : : : : : : :
Blue
↓ 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 B61
Light 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 B62
Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 B63
Note 1) Definition of gray :
Rn: Red gray, Gn: Green gray, Bn: Blue gray (n=gray level)
Note 2)Input signal: 0 =Low level voltage, 1=High level voltage
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 Approval
5.3 Pixel Format in the display

Pixel 1 Pixel 1366

Line 1 R G B R G B R G B R G B

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LTN133AT17-1

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Line 768 R G B R G B
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6. INTERFACE TIMING
Approval

6.1 Timing Parameters

Symbo
Signal Item Min. Typ. Max. Unit Note
l

Frame Frequency Cycle TV 780 790 800 Lines -

Vertical Active Display

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TVD - 768 - Lines -
Display Term Period

One Line
Cycle TH 1450 1522 1572 Clocks -
Scanning Time

Horizontal Active Display

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THD - 1366 - Clocks -
Display Term Period

6.2 Timing diagrams of interface signal

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TVD
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DE
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TH

DCLK
TC
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THD

DE

DATA Valid display data ( 1366 clocks)

SIGNALS

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 6.3 Power ON/OFF Sequence
Approval
: The Power ON/OFF sequence is described as follows :

T1 T11
0.9 LCD Vcc 0.9 LCD Vcc

0.1 LCD Vcc 0.1 LCD Vcc

LCD Vcc
T2 T10
T12
eDP Black Video Video From Source Black Video

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Display
T3
HPD
from Sink

Sink
Aux Channel Operational
Aux CH

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T4 T7
Source
Link
Main-Link Idle Valid Video Data Idle or off
Training
Data
T5 T6 T8 T9
Display
Backlight Disabled .co
Power ON/OFF Sequence, Normal System Operation
d Enabled

T1 T11
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0.9 LCD Vcc 0.9 LCD Vcc

0.1 LCD Vcc 0.1 LCD Vcc

LCD Vcc
T2
T12
eDP Black Video
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Display
T3
HPD
from Sink

Sink
Aux Channel Operational
Aux CH
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Source
Main-Link Idle or off
Data

Display Disabled
Backlight

Power ON/OFF Sequence, Aux Channel Transaction Only

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 Approval

Timing Reqd. Limits (ms)

Description Notes
Parameter By Min Max
Power rail rise time,
T1 Source 0.5 10
10% to 90%

Delay from LCD Vcc to black Prevents display noise until valid video data is
T2 Sink 0 200 received from Source (see note1 below)
video generation

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Delay from LCD Vcc to HPD Sink Aux Channel must be operational upon HPD
T3 Sink 0 200
high high
Delay from HPD high to link Allows for Source to read Link capability and
T4 Source - -
training initialization initialize
T5 Link training duration Source - - Dependant on Source link training protocol

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Min accounts for required BS-Idle pattern.
T6 Link idle Source - -
Max allows for Source frame synchronization
Delay from valid video data Max allows Sink validate video data and timing
T7 from Source to video on Sink 0 50

T8

T9
display
Delay from valid video data
from Source to backlight
Delay from backlight disable
to end of valid video data
d
Delay from end of valid video
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Source

Source
-

-
-

-
Source must assure display video is stable

Source mush assure backlight is no longer

illuminated (see note 1 below)

T10 Source 0 500

data from Source to power off
Power rail fall time,
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T11 Source 10
90% to 10%
T12 Power off time Source 500 -

Power Sequence Timing Parameters

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Note 1) The Sink must include the ability to generate black video autonomously. The Sink must automatically
enable black video under the following conditions:
- Upon LCD Vcc power-on (within T2 max)
- When the “NoVideoStream_Flag” (VB-ID Bit 3) is received from the Source (at the end of T9)
- When no Main Link data, or invalid video data, is received from the Source. Black video must be
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displayed within 50ms (max) from the start of either condition. Video data can be deemed invalid
based on MSA and timing information, for example.

Note 2) The Sink may implement the ability to disable the black video function, as described in Notes 1,
above, for system development and debugging purposes.

Note 3) The Sink must support Aux Channel polling by the Source immediately following LCD Vcc power-on
without causing damage to the Sink device (the Source can re-try if the Sink is not ready). The Sink
must be able to respond to an Aux Channel transaction with the time specified within T3 max.

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 Approval

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Limits (ms) Limits (ms)
# Description # Description

Ta
Tb
Tc
Td
VBL rising time
VBL falling time
Valid data to VBL rising
VBL falling to Valid data
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Min
0.5
0.5
10
10
Max
10
10
-
-
Te
Tf
Tg
Th
VBL rising to BLU on (SMBus)
BLU off to VBL falling (SMBus)
Valid data to BLU on
BLU off to Valid data
Min
20
20
200
200
Max
-
-
-
-

Backlight Power Sequence Timing Parameters

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Note 1) VBL should follow the Valid data to prevent BLU malfunction for preventing Fuse open, IC burnt, No
BLU LED by surge current

6.4 Input video tolerance of Vsync and Hsync

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 Approval
6.5 Fault / Status BIT timing

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T3

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Signal Item Min. Typ. Max. Unit Note

Fault / status
BIT timing
T3 .co10 -

Note 1) T3 timing is SMBus “on command” to valid status / Fault register.

(Min time delay from B/L on to status register “read”.)
d 15 mS -
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7. MECHANICAL OUTLINE DIMENSION Approval
It will be attached with PDF file

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d .co
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 8. PACKING Approval
1. CARTON(Internal Package)

(1) Packing Form

Corrugated Cardboard box and Corrupad form as shock absorber

(2) Packing Method

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CUSHION TOP PANEL

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d .co
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PACKING CASE CUSHION BOTTOM

Note 1) Total Weight : Approximately 12 kg

2) Acceptance number of piling : 30 sets
3) Carton size : 418(W) x 490(D) x 301(H)

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 Approval
(3) Packing Material
No Part name Quantity
1 Static electric protective sack 30 pcs
Packing case (Inner box)
2 1 set
included shock absorber
3 Pictorial marking 2 pcs
4 Carton 1 set

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9. MARKINGS & OTHERS
A nameplate bearing followed by is affixed to a shipped product at the
specified location on each product.
(1) Parts number : LTNXXXXXXX-XXX

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Product code.
Extension code.
Customer code.
Generation
Tech, information
Resolution

(2) Revision
(3) Lot number
d : Three letters
: X X X X XXX XX X
.co Size

Cell Position No.(In the one Glass)

Glass No.(In the one Lot)
Lot No.(Glass)
Month
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Year(Note 1)
Product Code
Line
NOTE 1). This code indicating year is omitted in the products of KIHEUNG site.
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(4) Nameplate Indication( Following example is only for reference )

LTN133AT17
0901
13.3” HD xxxxxxxxxx 1xx
40 mm
DP / N 0XF930
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CN –0XF930 - XXXXX - XXX- XXXX – XXX

USP6639589 / USP5280371
MADE IN CHINA

80 mm

Parts name : LTN133AT17-1

Lot number : xxxxxxxxxx
Inspected work week : 0901 Number (2009 year 1st week)
DP/N : Dell Part No (“0XF930” is for LTN133AT17-1)
XXX : Product Revision Code
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 Approval

※ Panel revision code scheme (Refer to the Red box on the label)
Build Name(s) Revision Code(s)
SST (WS) X00, X01, X02, … X09
PT (ES) X10, X11, X12, … X19
ST (CS) X20, X21, X23, … X29

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XB (MP) A00, A01, A02, … A99

(6) Packing small box attach ( Following example is only for reference )

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0XXXXX : DELL P/N
LTNXXXXXXX-XXX

0XXXXX
0XF930
d .co REV.xxx

Vendor ID/Loc :
21320/39792
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20
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10. GENERAL PRECAUTIONS Approval

1. Handling

(a) When the module is assembled, It should be attached to the system firmly
using every mounting holes. Be careful not to twist and bend the modules.

(b) Refrain from strong mechanical shock and / or any force to the module. In addition to
damage, this may cause improper operation or damage to the module.

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(c) Note that polarizers are very fragile and could be easily damaged. Do not press or scratch
the surface harder than a HB pencil lead.

(d) Wipe off water droplets or oil immediately. If you leave the droplets for a long time,
Staining and discoloration may occur.

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(e) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth.

(f) The desirable cleaners are water, IPA (Isoprophyl Alcohol) or Hexane.
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Do not use Ketone type materials(ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl
chloride. It might permanent damage to the polarizer due to chemical reaction.

(g) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or
mouth . In case of contact with hands, legs or clothes, it must be washed away thoroughly
d
with soap.
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(h) Protect the module from static , it may cause damage to the C-MOS Gate Array IC.

(i) Use fingerstalls with soft gloves in order to keep display clean during the incoming
inspection and assembly process.
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(j) Do not disassemble the module.

(k) Do not pull or fold the lamp wire.

(l) Do not adjust the variable resistor which is located on the back side.

(m) Protection film for polarizer on the module shall be slowly peeled off just before use so
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that the electrostatic charge can be minimized.

(n) Pins of I/F connector shall not be touched directly with bare hands.

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2. STORAGE Approval
(a) Do not leave the module in high temperature, and high humidity for a long time.
It is highly recommended to store the module with temperature from 0 to 35 °C and
relative humidity of less than 70%.

(b) Do not store the TFT-LCD module in direct sunlight.

(c) The module shall be stored in a dark place. It is prohibited to apply sunlight or fluorescent
light during the store.

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3. OPERATION

(a) Do not connect,disconnect the module in the “ Power On” condition.

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(b) Power supply should always be turned on/off by following item 6.3
“ Power on/off sequence “.

(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic

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interference shall be done by system manufacturers. Grounding and shielding methods
may be important to minimize the interference.

(d) The standard limited warranty is only applicable when the module is used for general
notebook applications. If used for purposes other than as specified, SEC is not to be
held reliable for the defective operations. It is strongly recommended to contact SEC
d
to find out fitness for a particular purpose.
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(e) The standard limited warranty is only applicable when the module is used for general
notebook applications. If used for purposes other than as specified, SEC is not to be
held reliable for the defective operations. It is strongly recommended to contact SEC
to find out fitness for a particular purpose.
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4. OTHERS

(a) Ultra-violet ray filter is necessary for outdoor operation.

(b) Avoid condensation of water. It may result in improper operation or disconnection

of electrode.
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(c) Do not exceed the absolute maximum rating value. ( the supply voltage variation, input
voltage variation, variation in part contents and environmental temperature, so on)
Otherwise the module may be damaged.

(d) If the module displays the same pattern continuously for a long period of time,it can be
the situation when the image “sticks” to the screen.

(e) This module has its circuitry PCB’s on the rear side and should be handled carefully in
order not to be stressed.
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11. EDID Approval
Byte Value Value
Field Name and Comments
(hex) (hex) (binary)
0 Header 00 00000000
1 Header FF 11111111
2 Header FF 11111111
Header

3 Header FF 11111111
4 Header FF 11111111
5 Header FF 11111111
6 Header FF 11111111

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7 Header 00 00000000
8 EISA manufacture code = 3 Character ID 4C 01001100
9 EISA manufacture code (Compressed ASCII) A3 10100011
0A Panel Supplier Reserved – Product Code 41 01000001
Vendor / Product

0B Panel Supplier Reserved – Product Code 54 01010100

EDID Version

0C LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
0D LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000

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0E LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
0F LCD module Serial No - Preferred but Optional (“0” if not used) 00 00000000
10 Week of manufacture FF 11111111
11 Year of manufacture 14 00010100
12 EDID structure version # = 1 01 00000001
13
14
EDID revision # = 4
Video I/P definition = Digital I/P .co 04
95
00000100
10010101
Parameters
Display

15 Max H image size = (Rounded to cm) 1D 00011101

16 Max V image size = (Rounded to cm) 10 00010000
17 ×
Display gamma = (gamma ×100)-100 = Example: ( 2.2 100 ) – 100 = 120 78 01111000
18 Feature support ( DPM (Standby, Suspend, Active), Color Type, Other Feature) 0A 00001010
d
19 Red/Green Low bit (RxRy/GxGy) 20 00100000
1A Blue/White Low bit (BxBy/WxWy) E5 11100101
1B Red X Rx = 0.xxx 97 10010111
Panel Color
Coordinates

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1C Red Y Ry = 0.xxx 59 01011001
1D Green X Gx = 0.xxx 52 01010010
1E Green Y Gy = 0.xxx 89 10001001
1F Blue X Bx = 0.xxx 27 00100111
20 Blue Y By = 0.xxx 1D 00011101
21 White X Wx = 0.xxx 50 01010000
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22 White Y Wy = 0.xxx 54 01010100

Timings

00
Establi

23 Established timings 1 (00h if not used) 00000000

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24 Established timings 2 (00h if not used) 00 00000000

25 Manufacturer’s timings (00h if not used) 00 00000000
26 Standard timing ID1 (01h if not used) 01 00000001
27 Standard timing ID1 (01h if not used) 01 00000001
28 Standard timing ID2 (01h if not used) 01 00000001
29 Standard timing ID2 (01h if not used) 01 00000001
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2A Standard timing ID3 (01h if not used) 01 00000001

Standard Timing ID

2B Standard timing ID3 (01h if not used) 01 00000001

2C Standard timing ID4 (01h if not used) 01 00000001
2D Standard timing ID4 (01h if not used) 01 00000001
2E Standard timing ID5 (01h if not used) 01 00000001
2F Standard timing ID5 (01h if not used) 01 00000001
30 Standard timing ID6 (01h if not used) 01 00000001
31 Standard timing ID6 (01h if not used) 01 00000001
32 Standard timing ID7 (01h if not used) 01 00000001
33 Standard timing ID7 (01h if not used) 01 00000001
34 Standard timing ID8 (01h if not used) 01 00000001
35 Standard timing ID8 (01h if not used) 01 00000001

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 Approval
36 Pixel Clock/10,000 (LSB) 2E 00101110
37 Pixel Clock/10,000 (MSB) 1C 00011100
38 Horizontal Active = xxxx pixels (lower 8 bits) 56 01010110
39 Horizontal Blanking (Thbp) = xxxx pixels (lower 8 bits) 9C 10011100
3A Horizontal Active/Horizontal blanking (Thbp) (upper4:4 bits) 50 01010000
3B Vertical Active = xxxx lines 00 00000000
3C Vertical Blanking (Tvbp) = xxxx lines (DE Blanking typ. for DE only panels) 16 00010110
3D Vertical Active : Vertical Blanking (Tvbp) (upper4:4 bits) 30 00110000
3E Horizontal Sync, Offset (Thfp) = xxxx pixels 30 00110000

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Timing Descripter #1

3F Horizontal Sync, Pulse Width = xxxx pixels 20 00100000

40 Vertical Sync, Offset (Tvfp) = xx lines Sync Width = xx lines 25 00100101
41 Horizontal Vertical Sync Offset/Width upper 2 bits 00 00000000
42 Horizontal Image Size =xxx mm 25 00100101
43 Vertical image Size = xxx mm A5 10100101
44 Horizontal Image Size / Vertical image size 10 00010000

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45 Horizontal Border = 0 (Zero for Notebook LCD) 00 00000000
46 Vertical Border = 0 (Zero for Notebook LCD) 00 00000000

Bit[7] 0: Non-interlace, 1: Interlace

Bit[6:5] 00: Normal display, no strero, XX: See table xx for definition

47

Bit[0]
bits 4 and 3 - see Table 3.18.
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Bit[4:3] 00: Analog composite, 01: Bipolar analog composite, 10: Digital
composite, 11: Digital separate
Bit[2:1] :The interpretation of bits 2 and 1 is dependent on the decode of

:See Table VESA EDID spec for definition

Referenced Default = 1Ah

d 1A 00011010

48 Pixel Clock/10,000 (LSB) C9 11001001

49 Pixel Clock/10,000 (MSB) 12 00010010
4A Horizontal Active = xxxx pixels (lower 8 bits) 56 01010110
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4B Horizontal Blanking (Thbp) = xxxx pixels (lower 8 bits) 9C 10011100
4C Horizontal Active/Horizontal blanking (Thbp) (upper4:4 bits) 50 01010000
4D Vertical Active = xxxx lines 00 00000000
4E Vertical Blanking (Tvbp) = xxxx lines (DE Blanking typ. for DE only panels) 16 00010110
4F Vertical Active : Vertical Blanking (Tvbp) (upper4:4 bits) 30 00110000
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50 Horizontal Sync, Offset (Thfp) = xxxx pixels 30 00110000

Timing Descripter #2

51 Horizontal Sync, Pulse Width = xxxx pixels 20 00100000

52 Vertical Sync, Offset (Tvfp) = xx lines Sync Width = xx lines 25 00100101
53 Horizontal Vertical Sync Offset/Width upper 2 bits 00 00000000
54 Horizontal Image Size =xxx mm 25 00100101
55 Vertical image Size = xxx mm A5 10100101
56 Horizontal Image Size / Vertical image size 10 00010000
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57 Horizontal Border = 0 (Zero for Notebook LCD) 00 00000000

58 Vertical Border = 0 (Zero for Notebook LCD) 00 00000000

Bit[7] 0: Non-interlace, 1: Interlace

Bit[6:5] 00: Normal display, no strero, XX: See table xx for definition
Bit[4:3] 00: Analog composite, 01: Bipolar analog composite, 10: Digital
composite, 11: Digital separate
59 Bit[2:1] :The interpretation of bits 2 and 1 is dependent on the decode of 1A 00011010
bits 4 and 3 - see Table 3.18.
Bit[0] :See Table VESA EDID spec for definition

Referenced Default = 1Ah

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 Approval
5A Flag 00 00000000
5B Flag 00 00000000
5C Flag 00 00000000
5D Data Type Tag: Alphanumeric Data String (ASCII) FE 11111110
5E Flag 00 00000000
st
5F Dell P/N 1 Character 58 01011000
nd
60 Dell P/N 2 Character 46 01000110
rd
61 Dell P/N 3 Character 39 00111001
Dell specific information

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Timing Descripter #3

th
62 Dell P/N 4 Character 33 00110011
th
63 Dell P/N 5 Character 30 00110000
LCD Supplier EEDID Revision #
Bit[7] : 0=X, 1=A
Bit[6:0] : 00, 01, 02…for SST
64 80 10000000
10, 11, 12…for PT

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20, 21, 22…for ST
00, 01, 02…for X-Build (if Bit[7]=1)
65 Manufacturer P/N 31 00110001
66 Manufacturer P/N 33 00110011
67
68
69
6A

6B
Manufacturer P/N
Manufacturer P/N
Manufacturer P/N
Manufacturer P/N
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Manufacturer P/N (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h)
d 33
41
54
0A

20
00110011
01000001
01010100
00001010

00100000

6C Flag 00 00000000
6D Flag 00 00000000
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6E Flag 00 00000000
6F Data Type Tag: Manufacturer Specified Data 00 00 00000000
70 Flag 00 00000000
71 Color Management (True Color Depth, 2-bit FRC) 00 00000000
Timing Descripter #4

72 Panel Type & Configurations (Bulb/LED string #, Structure Revision, Panel Structure) 41 01000001
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73 Frame Rate Details (SDRRS, DRRS, MaxFrame Rate, Min Frame Rate) 01 00000001
74 Light Controller Interface and MaximumTypical Luminance 16 00010110
75 Front Surface / Polarizer and Pixel Structure (Transflective, AG/Glossy) 00 00000000
76 Multi-Media Features (Dynamic Backlight Control, Color Management) 00 00000000
77 Multi-Media Features (Active Gamma Control, Motion Blur) 00 00000000
78 Special Features #1 (In-Cell Scanner, Wireless) 00 00000000
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79 Special Features #2 (In-Cell Touch, Interface, Over Drive, LVDS Channel or eDP Lane) 09 00001001
7A Special Features #3 (3D, E-Privacy, BIST Support) 01 00000001
7B (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 0A 00001010
7C (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
7D (If <13 char, then terminate with ASCII code 0Ah, set remaining char = 20h) 20 00100000
Checksum

7E Extension flag (# of optional 128 EDID extension blocks to follow, Typ = 0) 00 00000000

7F Checksum (The 1-byte sumof all 128 bytes in this EDID block shall = 0) 9D 10011101

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