DATA SHEET

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N-Channel Enhancement D

Mode Field Effect

Transistor G

2N7000, 2N7002, S
NDS7002A
Description
These N−channel enhancement mode field effect transistors are
produced using onsemi’s proprietary, high cell density, DMOS 1 − Source
technology. These products have been designed to minimize on−state 2 − Gate
resistance while providing rugged, reliable, and fast switching 3 − Drain
performance. They can be used in most applications requiring up to 12 1
2
400 mAdc and can deliver pulsed currents up to 2 A. These products 3 3
are particularly suited for low−voltage, low−current applications, such TO−92 TO−92
as small servo motor control, power MOSFET gate drivers, and other CASE 135AN CASE 135AR
switching applications.
MARKING DIAGRAM
Features
• High Density Cell Design for Low RDS(on) $Y&Z&3
• Voltage Controlled Small Signal Switch 2N
7000
• Rugged and Reliable
• High Saturation Current Capability
• This Device is Pb−Free and Halogen Free
$Y = Logo
&Z = Assembly Plant Code
&3 = Date Code
2N7000 = Specific Device Code

3
1 − Gate
1 2 − Source
2 3 − Drain
SOT−23
CASE 318−08

MARKING DIAGRAM

&E&Y
7x2&E&G

&E = Designates Space

&Y = Binary Calendar Year Coding Scheme
7x2 = Specific Device Code
x= 0, 1
&G = Date Code

ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.

© Semiconductor Components Industries, LLC, 1998 1 Publication Order Number:

July, 2022 − Rev. 7 NDS7002A/D
 2N7000, 2N7002, NDS7002A

ABSOLUTE MAXIMUM RATINGS Values are at TC = 25°C unless otherwise noted.

Value

Symbol Parameter 2N7000 2N7002 NDS7002A Unit

VDSS Drain−to−Source Voltage 60 V
VDGR Drain−Gate Voltage (RGS ≤ 1 MW) 60 V
VGSS Gate−Source Voltage − Continuous ±20 V
Gate−Source Voltage − Non Repetitive (tp < 50 ms) ±40
ID Maximum Drain Current − Continuous 200 115 280 mA
Maximum Drain Current − Pulsed 500 800 1500
PD Maximum Power Dissipation Derated above 25°C 400 200 300 mW
3.2 1.6 2.4 mW/°C
TJ, TSTG Operating and Storage Temperature Range −55 to 150 −65 to 150 °C
TL Maximum Lead Temperature for Soldering Purposes, 300 °C
1/16−inch from Case for 10 s
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS Values are at TC = 25°C unless otherwise noted.

Value

Symbol Parameter 2N7000 2N7002 NDS7002A Unit

RθJA Thermal Resistance, Junction to Ambient 312.5 625 417 °C/W

ELECTRICAL CHARACTERISTICS
Values are at TC = 25°C unless otherwise noted.

Symbol Parameter Conditions Type Min Typ Max Unit

OFF CHARACTERISTICS
BVDSS Drain−Source Breakdown VGS = 0 V, ID = 10 mA All 60 − − V
Voltage
IDSS Zero Gate Voltage Drain VDS = 48 V, VGS = 0 V 2N7000 − − 1 mA
Current
VDS = 48 V, VGS = 0 V, − − 1 mA
TC = 125°C
VDS = 60 V, VGS = 0 V 2N7002 − − 1 mA
NDS7002A
VDS = 60 V, VGS = 0 V, − − 0.5 mA
TC = 125°C
IGSSF Gate − Body Leakage, VGS = 15 V, VDS = 0 V 2N7000 − − 10 nA
Forward
VGS = 20 V, VDS = 0 V 2N7002 − − 100
NDS7002A
IGSSR Gate − Body Leakage, VGS = −15 V, VDS = 0 V 2N7000 − − −10 nA
Reverse
VGS = −20 V, VDS = 0 V 2N7002 − − −100
NDS7002A

ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 1 mA 2N7000 0.8 2.1 3 V
VDS = VGS, ID = 250 mA 2N7002 1 2.1 2.5
NDS7002A

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 2N7000, 2N7002, NDS7002A

ELECTRICAL CHARACTERISTICS (continued)

Values are at TC = 25°C unless otherwise noted.

Symbol Parameter Conditions Type Min Typ Max Unit

ON CHARACTERISTICS
RDS(on) Static Drain−Source VGS = 10 V, ID = 500 mA 2N7000 − 1.2 5 W
On−Resistance
VGS = 10 V, ID = 500 mA, − 1.9 9
TC = 125°C

VGS = 4.5 V, ID = 75 mA − 1.8 5.3

VGS = 10 V, ID = 500 mA 2N7002 − 1.2 7.5
VGS = 10 V, ID = 500 mA, − 1.7 13.5
TC = 100°C

VGS = 5 V, ID = 50 mA − 1.7 7.5

VGS = 5 V, ID = 50 mA, − 2.4 13.5
TC = 100°C

VGS = 10 V, ID = 500 mA NDS7002A − 1.2 2

VGS = 10 V, ID = 500 mA, − 2 3.5
TC = 125°C

VGS = 5 V, ID = 50 mA − 1.7 3
VGS = 5 V, ID = 50 mA, − 2.8 5
TC = 125°C
VDS(on) Drain−Source On−Voltage VGS = 10 V, ID = 500 mA 2N7000 − 0.6 2.5 V
VGS = 4.5 V, ID = 75 mA − 0.14 0.4
VGS = 10 V, ID = 500 mA 2N7002 − 0.6 3.75
VGS = 5.0 V, ID = 50 mA − 0.09 1.5
VGS = 10 V, ID = 500 mA NDS7002A − 0.6 1
VGS = 5.0 V, ID = 50 mA − 0.09 0.15
ID(on) On−State Drain Current VGS = 4.5 V, VDS = 10 V 2N7000 75 600 − mA
VGS = 10 V, VDS ≥ 2 VDS(on) 2N7002 500 2700 −
VGS = 10 V, VDS ≥ 2 VDS(on) NDS7002A 500 2700 −
gFS Forward Transconductance VDS = 10 V, ID = 200 mA 2N7000 100 320 − mS
VDS ≥ 2 VDS(on), ID = 200 mA 2N7002 80 320 −
VDS ≥ 2 VDS(on), ID = 200 mA NDS7002A 80 320 −
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, All − 20 50 pF
f = 1.0 MHz
Coss Output Capacitance All − 11 25
Crss Reverse Transfer All − 4 5
Capacitance
ton Turn−On Time VDD = 15 V, RL = 25 W, 2N7000 − − ns
ID = 500 mA, VGS = 10 V, 10
RGEN = 25 W
VDD = 30 V, RL = 150 W, 2N7002 − −
ID = 200 mA, VGS = 10 V, NDS7002A 20
RGEN = 25 W
toff Turn−Off Time VDD = 15 V, RL = 25 W, 2N7000 − − ns
ID = 500 mA, VGS = 10 V, 10
RGEN = 25 W
VDD = 30 V, RL = 150 W, 2N7002 − −
ID = 200 mA, VGS = 10 V, NDS7002A 20
RGEN = 25 W

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 2N7000, 2N7002, NDS7002A

ELECTRICAL CHARACTERISTICS (continued)

Values are at TC = 25°C unless otherwise noted.

Symbol Parameter Conditions Type Min Typ Max Unit

DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuous Drain−Source Diode Forward Current 2N7002 − − 115 mA
NDS7002A − − 280
ISM Maximum Pulsed Drain−Source Diode Forward Current 2N7002 − − 0.8 A
NDS7002A − − 1.5
VSD Drain−Source Diode VGS = 0 V, IS = 115 mA 2N7002 − 0.88 1.5 V
Forward Voltage (Note 1)

VGS = 0 V, IS = 400 mA NDS7002A − 0.88 1.2

(Note 1)
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Pulse test: Pulse Width ≤ 300 ms, Duty Cycel ≤ 2 %

TYPICAL PERFORMANCE CHARACTERISTICS

2 3
VGS = 10 V 9.0 V = 4.0
8.0 7.0 4.5

Drain−Source On−Resistance
ID, Drain−Source Current (A)

2.5
1.5 5.0
RDS(on), Normalized

6.0 6.0
7.0
2
1 8.0
5.0
1.5
9.0
4.0 10
0.5
1

3.0
0 0.5
0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 2
VDS, Drain−Source Voltage (V) ID, Drain Current (A)

Figure 1. On−Region Characteristics Figure 2. On−Resistance Variation with

Gate Voltage and Drain Current

2 3

VGS = 10 V VGS
Drain−Source On−Resistance

Drain−Source On−Resistance

1.75 2.5
ID = 500 mA
RDS(on), Normalized

TJ = 125°C
RDS(on), Normalized

1.5 2

1.25 1.5
25°C
1 1
−55°C
0.75 0.5

0.5 0
−50 −25 0 25 50 75 100 125 150 0 0.4 0.8 1.2 1.6 2
TJ, Junction Temperature (5C) ID, Drain Current (A)

Figure 3. On−Resistance Variation with Figure 4. On−Resistance Variation with

Temperature Drain Current and Temperature

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 2N7000, 2N7002, NDS7002A

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

2 1.1
25°C
VDS = 10 V VDS = VGS

Vth, Normalized Gate−Source

1.6 1.05 I = 1 mA
125°C
ID, Drain Current (A)

Threshold Voltage
1
1.2 T = −55°C

0.95
0.8
0.9

0.4
0.85

0 0.8
0 2 4 6 8 10 −50 −25 0 25 50 75 100 125 150
VGS, Gate to Source Voltage (V) TJ, Junction Temperature (5C)

Figure 5. Transfer Characteristics Figure 6. Gate Threshold Variation with

Temperature

1.100 2
VGS = 0 V
Drain−Source Breakdown Voltage

ID = 250 mA IS, Reverse Drain Current (A) 1

1.075
0.5
1.050
BVDSS, Normalized

T = 125°C
0.1 25°C
1.025
0.05
1.000
−55°C
0.975 0.01
0.005
0.950

0.925 0.001
−50 −25 0 25 50 75 100 125 150 0.2 0.4 0.6 0.8 1 1.2 1.4
TJ, Junction Temperature (5C) VSD, Body Diode Forward Voltage (V)

Figure 7. Breakdown Voltage Variation with Figure 8. Body Diode Forward Voltage
Temperature Variation with

60 10
VDS = 25 V
40
VGS, GA E−Source Voltage (V)

Ciss 8
20
Capacitance (pF)

Coss 6
10
I = 500 mA
5 4
Crss
280 mA
2
2
f = 1 MHz 115 mA
V=0V
1 0
1 2 3 5 10 20 30 50 0 0.4 0.8 1.2 1.6 2

VDS, Drain to Source Voltage (V) Qg, Gate Charge (nC)

Figure 9. Capacitance Characteristics Figure 10. Gate Charge Characteristics

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 2N7000, 2N7002, NDS7002A

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

VDD ton toff

RL td(on) tr td(off) tf
VIN
90% 90%
D VOUT

VGS Output, Vout 10% 10%

RGEN DUT
G Inverted
90%

S 50% 50%
Input, Vin
10%
Pulse Width

Figure 11. Switching Test Circuit Figure 12. Switching Waveforms

3 3
2 2
1 1 100 ms
RDS(on) Limit 100 ms
ID, Drain Current (A)

ID, Drain Current (A)

0.5 0.5 RDS(on) Limit
1 ms 1 ms
0.1 0.1
100 ms 10 ms 10 ms
100 ms
0.05 0.05
1s
VGS = 10 V 10 s VGS = 10 V
Single Pulse Single Pulse 1s
DS DC 10 s
0.01 TA = 25°C 0.01 TA = 25°C
0.005 0.005
1 2 5 10 20 30 60 80 1 2 5 10 20 30 60 80
VDS, Drain−Source Voltage (V) VDS, Drain−Source Voltage (V)

Figure 13. 2N7000 Maximum Safe Operating Area Figure 14. 2N7002 Maximum Safe Operating Area

3
2 RDS(on) Limit 100 ms
1
1 ms
ID, Drain Current (A)

0.5
10 ms
0.1
100 ms

0.05

VGS = 10 V 1s
Single Pulse DC 10 s
0.01 TA = 25°C
0.005
1 2 5 10 20 30 60 80
VDS, Drain−Source Voltage (V)

Figure 15. NDS7000A Maximum Safe Operating Area

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 2N7000, 2N7002, NDS7002A

TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

1
D = 0.5
Transient Thermal Resistance

0.5
r(t), Normalized Effective

0.2
0.2 RqJA(t) = r(t) * RqJA
RqJA = (See Datasheet)
0.1
0.1
0.05 P(pk)
0.05
0.02 t1
t2
0.02 0.01 TJ − TA = P * RqJA(t)
Single Pulse Duty Cycle, D = t1/t2
0.01
0.0001 0.001 0.01 0.1 1 10 100 300
t1, Time (s)

Figure 16. TO−92, 2N7000 Transient Thermal Response Curve

1
0.5
Transient Thermal Resistance

D = 0.5
r(t), Normalized Effective

0.2
0.2
0.1 0.1 RqJA(t) = r(t) * RqJA
RqJA = (See Datasheet)
0.05 0.05

0.02 P(pk)
0.01 0.01 t1
t2
TJ − TA = P * RqJA(t)
0.002 Single Pulse Duty Cycle, D = t1/t2
0.001
0.0001 0.001 0.01 0.1 1 10 100 300
t1, Time (s)

Figure 17. SOT−23, 2N7002 / NDS7002A Transient Thermal Response Curve

ORDERING INFORMATION
Min Order Qty /
Part Number Marking Package Packing Method† Immediate Pack Qty
2N7000 2N7000 TO−92 3L Bulk 10000 / 1000
(Pb−Free)
2N7000−D74Z Ammo 2000 / 2000
2N7000−D75Z Tape and Reel 2000 / 2000
2N7000−D26Z 2000 / 2000
2N7002 702 SOT−23 3L Tape and Reel 3000 / 3000
(Pb−Free)
NDS7002A 712 3000 / 3000
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−92 3 4.825x4.76
CASE 135AN
ISSUE O
DATE 31 JUL 2016

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON13880G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−92 3 4.825X4.76 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

TO−92 3 4.83x4.76 LEADFORMED

CASE 135AR
ISSUE O
DATE 30 SEP 2016

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON13879G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: TO−92 3 4.83X4.76 LEADFORMED PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
3 THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
E HE T PROTRUSIONS, OR GATE BURRS.
1 2
MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
L A 0.89 1.00 1.11 0.035 0.039 0.044
3X b A1 0.01 0.06 0.10 0.000 0.002 0.004
L1 b 0.37 0.44 0.50 0.015 0.017 0.020
e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008
TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120
E 1.20 1.30 1.40 0.047 0.051 0.055
e 1.78 1.90 2.04 0.070 0.075 0.080
L 0.30 0.43 0.55 0.012 0.017 0.022
L1 0.35 0.54 0.69 0.014 0.021 0.027
A HE 2.10 2.40 2.64 0.083 0.094 0.104
T 0° −−− 10 ° 0° −−− 10°
A1 SIDE VIEW SEE VIEW C c
GENERIC
END VIEW
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT XXXMG
G
1
3X
2.90 0.90 XXX = Specific Device Code
M = Date Code
G = Pb−Free Package

*This information is generic. Please refer to

3X 0.80 0.95 device data sheet for actual part marking.
PITCH Pb−Free indicator, “G” or microdot “ G”,
DIMENSIONS: MILLIMETERS may or may not be present.

STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:

CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE
2. EMITTER 2. BASE 2. NO CONNECTION
3. COLLECTOR 3. COLLECTOR 3. CATHODE

STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:
PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE
2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE
3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE

STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:
PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE
2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE
3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE

STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:
PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE
2. SOURCE 2. OUTPUT 2. ANODE 2. DRAIN 2. CATHODE 2. ANODE
3. DRAIN 3. INPUT 3. CATHODE 3. SOURCE 3. GATE 3. NO CONNECTION

STYLE 27: STYLE 28:

PIN 1. CATHODE PIN 1. ANODE
2. CATHODE 2. ANODE
3. CATHODE 3. ANODE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42226B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com

 onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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