Lecture 14
MOSFET I-V
CHARACTERISTICS
Outline
1. MOSFET: cross-section, layout, symbols
2. Qualitative operation
3. I-V characteristics
Key questions
• How can carrier inversion be exploited to make
a transistor?
• How does a MOSFET work?
• How does one construct a simple first-order
model for the current-voltage characteristics
of a MOSFET?
3
1. MOSFET:
layout, cross-
section, platform
Shallow
trench
isolation
(STI)
4
Key elements:
• inversion layer under gate (depending on gate
voltage)
• heavily-doped regions reach underneath gate
=->inversion layer electrically connects source and
drain
• 4-terminal device: body voltage important
5
Circuit symbols
Two complementary devices:
• n-channel device (n-MOSFET) on p-substrate
– uses electron inversion layer
• p-channel device (p-MOSFET) on n-substrate
– uses hole inversion layer
6
Qualitative Operation
•Drain Current (Id: proportional to inversion charge and the
velocity that the charge travels from source to drain
•Velocity :proportional to electric field from drain to source
•Gate-Source Voltage (VGS controls amount of inversion charge
that carries the current
•Drain-Source Voltage (VDS: controls the electric field that
drifts the inversion charge from the source to drain
7
Want to understand the relationship between the drain
current in the MOSFET as a function of gate-to-source
voltage and drain-to-source voltage.
Initially consider source tied up to body (substrate)
8
Three regimes of operation:
• MOSFET:
-VGS<VT, with VDS≥0
• Inversion Charge=0
• VDS drops across drain depletion region
• ID=0
9
Linear or Triode regime:
Electrons drift from source to drain →electrical current!
VGS QN I D
VDS VGS VT
VDS E y I D
10
Saturation Region VDS >VGS -VT
VGS VT ,VGD VT VDS VGS VT
ID is independent of VDs: ID=Idsat
Electric field in channel cannot increase with VDs
11
3. I-V Characteristics (Assume VSB=0)
Geometry of problem:
12
General expression of channel current
Current can only flow in the y-direction, Total channel flux:
I y W QN y v y y
Drain current is equal to minus channel current:
I D W QN y v y y
Rewrite in terms of voltage at channel location y, V (y):
• If electric field is not too high (velocity saturation doesn’t occur):
dV
v y y n E y y n
dy
• For QN(y), use charge-control relation at location y:
QN y Cox VGS V y VT
13 for VGS V y VT
All together the drain current is given by:
dV y
I D W nCox VGS V y VT
dy
Solve by separating variables:
I D d y W nCox VGS V y VT dV
Integrate along the channel in the linear regime subject the
boundary conditions :
Then:
L VDS
I D dy W nCox VGS V y VT dV
0 0
14
Resulting in:
VDS
V
I D y 0 I D L W nCox VGS VT V
L
2 0
W VDS
ID nCox VGS VT VDS
L 2
for VDS VGS VT
For small VDS:
W
ID nCox VGS VT VDS
L
15
Key dependencies:
VDS↑→ ID↑ (higher lateral electric field)
VGS↑→ ID↑ (higher electron concentration)
L ↑→ID ↓ (lower lateral electric field)
W ↑→ID ↑ (wider conduction channel)
This is the linear or triode region:
It is linear if VDS <<VGS - VT
16
Two important observations
1. Equation only valid if VGS – V(y) ≥ VT at every y. Worst
point is y=L, where V(y) = VDS, hence, equation is valid if
VDS VGS VT
17
2. As VDS approaches VGS – VT, the rate of increase of
ID decreases.
To understand why ID bends over, must understand first :
channel debiasing!
As y increases down the channel, V(y) ↑, |QN(y)| ↓, and Ey(y)
↑ (fewer carriers moving faster)
inversion layer thins down from source to drain
Local ”channel overdrive” reduced closer to drain.
ID grows more slowly.
18
QN y Cox VGS V y VT
19
Impact of VDS:
As VDS ↑, channel debiasing more prominent
20 => ID rises more slowly with VDS
Key conclusions
• The MOSFET is a field-effect transistor:
– the amount of charge in the inversion layer is controlled
by the field-effect action of the gate
– the charge in the inversion layer is mobile ⇒ conduction
possible between source and drain
• In the linear regime:
– VGS ↑⇒ ID ↑: more electrons in the channel
– VDS ↑⇒ ID ↑: stronger field pulling electrons out of the
source
• Channel debiasing: inversion layer ”thins down” from
source to drain ⇒ current saturation as VDS approaches:
VDSsat VGS VT
21
Drain current saturation
As VDS approaches
VDSsat VGS VT
increase in Ey compensated by decrease in |QN|
⇒ ID saturates when |QN| equals 0 at drain end.
Value of drain saturation current:
I Dsat I Dlin VDS VDSsat VGS VT
W VDS
I Dsat nCox VGS VT VDS
L 2 VDS VGS VT
1W
nCox VGS VT
2
I Dsat
2 L
22
Transfer characteristics in
Output Characteristics saturation
23
What happens when VDS = VGS −VT ?
Charge control relation at drain end of channel:
Qn L Cox VGS VDS VT 0
No inversion layer at end of channel??!! ⇒ Pinchoff
Vc L VDSsat VGS VT
24
Key dependencies of IDsat
I Dsat VGS VT
2
Drain current at pinchoff:
∝lateral electric field ∝VDSsat = VGS −VT
∝electron concentration ∝VGS −VT
1
I Dsat
L
L E y
25
What happens when VDS > VGS −VT?
Depletion region separating pinchoff point and drain
widens (just like in reverse biased pn junction)
26
To first order, ID does not increase past pinchoff:
W
I D I Dsat nCox VGS VT
2
2L
To second order, electrical channel length affected
(“channel length modulation”):
VDS ↑⇒Lchannel↓⇒ID ↑
1 1 L
ID 1
L L L L
Experimental finding: L VDS VDSsat
L
Hence: VDS VDsat
L
27
Improved model in saturation:
W
nCox VGS VT 1 VDS VDSsat
2
I Dsat
2L
Also, experimental finding:
1
L
28
2. Backgate characteristics
There is a fourth terminal in a MOSFET: the body.
What does the body do?
29
Body contact allows application of bias to body with respect to
inversion layer, VBS .
Only interested in VBS<0 (pn diode in reverse bias).Interested in
effect on inversion layer
⇒ examine for V >V (keep V constant).
GS T GS
Application of VBS< 0 increases potential buildup across
semiconductor:
2 p 2 p VBS
Depletion region must widen to produce required extra field:
30
31
Consequences of application of VBS< 0:
2 p 2 p VBS
QB xd max
since VGS constant, Vox unchanged
Eox unchanged
QS QG unchanged
QS Qn QB unchanged, but QB Qn
inversion layer charge is reduced!
Application of VBS < 0 with constant VGS reduces
electron concentration in inversion layer ⇒VT ↑
32
How does VT change with VBS?
In VT formula change −2φp to −2φp −VBS:
VT VBS VFB 2 p VBS
GB 1
Cox
2 s qN a 2 p VBS
In MOSFETs, interested in VT between gate and source:
VGB VGS VBS VTGB VTGS VBS
V
Then: T
GS
VT
GB
VBS
2 s qN a 2 p VBS VT VBS
1
And: VT
GS
VBS VFB 2 p
Cox
In the context of the MOSFET, VT is always defined in
terms of gate-to-source voltage.
33
Define backgate effect parameter [units: V1/2]:
1
2 s qN a
Cox
Define VTo VT VBS 0 Zero-bias threshold voltage
Then : VT VBS VTo 2 p VBS 2 p
34
Key conclusions
• MOSFET in saturation (VDS≥ VDSsat): pinchoff point at drain end
of channel
– electron concentration small, but
– electrons move very fast;
– pinchoff point does not represent a barrier to electron flow
• In saturation, ID saturates:
W
nCox VGS VT
2
I Dsat
2L
•But due to channel length modulation, IDsat increases slightly
with VDS
•Application of back bias shifts VT (backgate effect)
35
Example: MOSFET as a voltage controlled resistor
The circuit below shows an n-channel MOSFET that is used as
voltage-controlled resistor.
(a) Find the sheet resistance of the MOSFET over the range
VGS=1.5 V to VGS=4V using un= 215 cm2V-1S-1, Cox=2.3fF/um2
and Vtn =1 V.
Fig. an n-channel MOSFET used a voltage controlled resistor
36
SOLUTION
Note that for a gate-source voltage VGS>VTn+0.1V=1.1V, the
MOSFET operates in the triode region. Since the drain-source
voltage is small
W 1
I D n Cox VGS VTn VDS VDS
L R
For a particular value of VGS, ID is a linear function of VDS and
the circuit model for the MOSFET is a resistor. Now we relate
R to the sheet resistance
1 1 L
R R L /W
W nCox VGS VTn W
nCox VGS VTn
L
R as a function of VGS is
1 1 20k V
R
215cm2V 1s 1 2.3 107 F / cm2 VGS 1V VGS 1V
37
The plot of sheet resistance as a
function of VGS with very small VDS
38
(b) For a particular application, we need to control the resistor between 200 Ω
and 1 kΩ for VGS=1.5V to 4 V. How wide should the MOSFET be if the channel
length L=1.5 um?
Solution:
We already solved for the sheet resistance in part (a), so we can find the
range of sheet resistances for VGS=1.5V to 4V
20k V 20k V
R 6666.7 and R 40k
min
4V 1V
max
1.5V 1V
Solving for (W/L) to obtain Rmin=200 Ω and Rmax=1 kΩ yields
W 6666.7 W 40000
33.3 and 40
L min 200 L max 1000
(W/L)=33.3 is adopted so the width of the MOSFET should be
39
W 1.5 m 33.3 50 m
(c) Design the layout for
this MOS resistor so it
occupies a minimum area.
The length of the
source/drain diffusions is
Ldiff=6um with contact that
are 2um × 2um.
Solution:
Given the high ratio of
width to length (W/L=33.3),
it is desirable to fold the
MOSFET. Since the
diffusions are 6 um long,
the total length is
LT 3Ldiff 2 L
3 6um+2 1.5um=21um
Fig (a) layout of folded n-channel MSOFET
40 (b) Equivalent schematic circuit
Example: Measuring the backgate effect parameter
The test circuit below can be used to find an experimental value for the
backgate parameter γn. Note that a negative voltage VBS is applied from
the bulk to the source of the MOSFET. The circuit varies VGS
continuously from 0 to 5 V, for VBS=0 VBS=-5V. The drain-source voltage
is VDS=100mV.
(a) From the drain current measurements plotted below, find the backgate
effect parameter. The device parameters are un= 215 cm2V-1S-1,
Cox=2.3fF/um2 , Vt0 =1 V and Na=1017 cm-3.
Fig. circuit to find the
backgate effect parameter
41
Solution:
Since the drain voltage is small, the MOSFET operates in its triode region
once VGS exceeds the threshold voltage. The drain current is linear with VGS
W
ID n Cox VGS VTn VBS VDS
L
The threshold voltage is VT VBS VTo 2 p VBS 2 p
From the graph, we have 2V 1V n 0.84V 5V
0.84V n 0.67V 1/2
42
Homework 15
Consider an n-channel MOSFET with the following
parameters: un/Cox=0.18 mA/V2, W/L =8, and VT
=0.4 V. Determine the drain current ID for
(a) VGS =0.8 V, VDS = 0.2 V;
(b) VGS = 0.8 V, VDS = 1.2 V;
(c) VGS = 0.8 V, VDS = 2.5 V;
(d) VGS = 1.2 V, VDS = 2.5 V.
