International Journal of Scientific Research in Science and Technology

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Print ISSN: 2395-6011 | Online ISSN: 2395-602X doi : https://doi.org/10.32628/IJSRST

Use of Resonance in Induction Cooker

S. R. Ghuge1, S. U. Borade2, R. R. Gaikwad2
1 Head of Department of Electrical Engineering, MSBTE, MET BKC Institute of Technology – Polytechnic, Nashik, Maharashtra, India
2Department of Electrical Engineering, MSBTE, MET BKC Institute of Technology – Polytechnic, Nashik, Maharashtra, India

ARTICLEINFO ABSTRACT
Article History: Resonance is a highly helpful tool for induction heating processes, such as melting,
Accepted: 10 Nov 2023 heating, and of course, using induction cookers and other household appliances.
Published: 30 Nov 2023 The investigation of resonance is done in this publication. Their fundamental
Publication Issue circuit schematic, a two-series and parallel resonance comparison. Next, choose
Volume 10, Issue 6 the most effective resonance methods, such as the induction cooker's series
November-December-2023 resonance.
Page Number Keywords : Induction heating, series resonance

291-295

1. Introduction 3. Requirement for Induction Cooker

The following are the specifications for induction cookers:
When the impedance and resistance of a circuit become Ultrasonic switching frequency, dependability, large power
equal at a given frequency, this is termed the resonance range (usually 10% to 100%), high efficiency, cheap cost,
frequency. Basically, resonance is separated into two and power factor almost equal to unity.
categories: Typically, induction cookers are meant to be used with
Resonance in series cooking vessels composed of a particular material, most
Resonance in parallel commonly ferro-magnetic stainless steel or cast iron.
Therefore, the following features should be present in the
A circuit is referred to as serial resonance when a circuit converter:
capacitor is linked in series with a load. A circuit is referred
to be parallel resonance if a circuit capacitor is linked in 1. Only the heating coil and no other reactive parts
parallel with the load. The series and parallel resonance range for a workable range of frequencies,
results are also produced by simulation. Current is 2. Clamped current and/or voltage on switches,
magnified in a series resonance situation, whereas voltage is 3.50% duty ratio, making gating and control simpler
magnified in a parallel resonance situation. circuits
4. Making use of a voltage source under control.
2. Design Considerations
A series circuit is connected across an a.c. source of
4. Choice of Converter
constant voltage V but of frequency varying from zero to
The following factors led to the selection of the full-bridge,
infinity. There would be a certain frequency of the applied
series resonant topology [2, 3, 4]:A clamp is applied across
voltage, which would make XL equal to XC in magnitude.
the semiconductor voltage. Because switching is done at a
In that case, X = 0 and Z = R, as shown in figure3.
50% duty ratio, no feedback is required. As seen in Fig. 3,
anti-parallel composite switches (CS), which are composed

Copyright © 2023 The Author(s): This is an open-access article distributed under the terms of the Creative 291
Commons Attribution 4.0 International License (CC BY-NC 4.0) which permits unrestricted use, distribution,
and reproduction in any medium for non-commercial use provided the original author and source are credited.
 S. R. Ghuge et al Int J Sci Res Sci & Technol. November-December-2023, 10 (6) : 291-295

of an anti-parallel diode (D) and a double switch (S), are The forced commutated converter was chosen due to the
required. The reason why silicon control rectifiers (SCRs) elimination of the reverse recovery current of the diodes
are displayed is that they are an excellent fit for this and the maximum power being obtained at the lowest
medium-frequency application. The 50% duty ratio allows point of the switching frequency range, usually about 2.5
for the usage of a modest isolation transformer. This kHz.
converter can use either of two switching techniques— 5. Load Arrangement
forced commutation or load commutation—to provide the For induction cooking, a flat heating coil is utilized, as
required power control without changing the input voltage illustrated in Fig. 4. To prevent the heating coil from
[1,10] overheating and to support the cooking pot, a thermal
+100V
insulator is positioned between it and the coil [8]. Usually,
the coil needs to be cooled by forced air. Fig. 4 depicts the
S1
S3
load arrangement's comparable circuit. The heating coil
and cooking vessel are represented by the series
L Leq C
R
combination of C1 and L, and the cooking vessel can be
S4 S2 represented by an equivalent series inductance (Lr) and
resistance (CI), which are provided by the resonant
capacitance, which is typically metallized polypropylene.
To get an initial voltage across S, S1 and S2 are closed first,
Fig. 3 Full Bridge circuit with series resonant
and S3 and S4 are left open. S1 and S2 are activated and S3
and S4 are then closed to obtain resonance between C.
A. Load Commutation
The switching frequency (fs) is lowered below the damped
resonant frequency (fr) to reduce power. This has the
Fig. 4 Load arrangement of Induction cooker
following benefits and drawbacks:
+100V

Benefits
No way to cut off the power to the individual switches, and S3
S1

no activate the anti-parallel diodes' power loss.

Negative aspects L Leq
R C

2. Switch on the individual switches' power loss and turn

S4 S2

shutting down power loss and reversing the anti- diodes in

parallel.
3. At the maximum limit of the available power, the Fig. 5. Equivalent circuit of Load arrangement of Induction
frequency of switching.
cooker
Commutation under duress
6. Proposed Block Diagram of the System
Increasing fs above fr reduces the power and has the
Proposed block diagram as shown in fig. 6 consist of the
following benefits and drawbacks:
three parts [14,15,16]
Benefits A. High Frequency Circuit
The anti-parallel diodes do not experience reverse recovery
B. Firing Circuit
current or turn-off power loss, and the solitary switches do
C. DC Source
not experience turn-on power loss.
D. Thyristor Bridge
2. Maximum power is obtained at the lower limit of the
switching frequency.
Disadvantages
Turn-off power loss for the singular-switches and turn-on
power loss for the anti-parallel diodes.

Fig. 6 Block diagram of the Project

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 S. R. Ghuge et al Int J Sci Res Sci & Technol. November-December-2023, 10 (6) : 291-295

6.1 High Frequency Circuit output power, is the minimum power When requested, it
This circuit is designing using IC 555 Timer as a astable was regarded as 25% of the upper limit. strength. Switching
multivibrator here frequency is generated of 1 KHz square frequency (fsw): For the design's maximum powers, a
wave which is given to the input firing circuit as clock for switching frequency of 5 kHz was taken for granted; it can
the IC 7473. A detail analysis is given in the design section. be changed to achieve lower powers. Additionally, it was
presumed that every device had SCRs. Additionally, a
Features
common value of 0.5 for the pan-inductor coupling's power
• High Current Drive Capability (200mA)
factor is assumed in the design (1).
• Adjustable Duty Cycle
• Temperature Stability of 0.005%/ｰC

6.2 Firing Circuit

This firing circuit uses an isolation transformer to isolate
7.1 High Frequency Circuit
the high voltage. It also includes a bipolar converter. Here,
the SCRs are fired by the produced pulses. Primarily, we As shown in fig. 8 we used IC555 as timer in astable mode
ignite the initial two SCRs (S1, S2) and SCRs (S3, S4), here the frequency used is 5 KHz. Supply current when
necessitating four firing pulses—two of which are identical output is high is typically 1mA less at VCC = 5V
and produce the positive half cycle, and the other two, the 2. Tested at VCC = 5.0V
negative half cycle. To be isolated from high-voltage and 3. This will determine maximum value of R9 + R8 for 5V
high-current thyristor bridges, a pulse transformer is operation, the max. total R = 20MΩ, and for 5V operation
utilized. Fig. 7 displays a block diagram of the firing circuit. the max. total R = 6.7MΩ
+5V

C
R1 U1
8
14.43k D
4 3
R VCC Q
7
DC
Fig.7 Block diagram of Firing Circuit 5
CV
R2
D1 14.43k
DIODE
6.3 DC Source
GND

2 6
TR TH

The DC source can generate 100V and 10A by design. It is

1

555

C1 C2
made up of a filter capacitor and a bridge rectifier. 230V AC 0.01uf 0.01uf

is converted to 100V pulsing DC by a bridge rectifier, and

the ripple content is eliminated using a capacitor.
6.4 Thyristor Bridge Fig. 8 High Frequency Circuit
This is essentially a chopper design in which the average
DC output is produced by firing SCRs concurrently while An astable timer operation is achieved by adding resistor
they are coupled in a bridge. The firing frequency has an R2 and R1 as shown in figure 8. In astable operation, the
impact on the average DC output. When this DC high trigger terminal and the threshold terminal are connected
current output passes through an inductor coil, heat is so that a self-trigger is formed, operating as a multi vibrator.
produced that is utilized for induction heating. When the timer output is high, its internal discharging Tr.
turns off and the VC1 increases by exponential function
7. Implementation of Proposed System
with the time constant Ton or Tr 0.693(R1)*C1. When the
DESIGN CONSIDERATIONS
VC1, or the threshold voltage, reaches 2Vcc/3, the
To bridge inverter topologies, a few design specifications
comparator output on the trigger terminal becomes high,
are required. These are covered below:
resetting the F/F and causing the timer output to become
Two 100 V input voltages are the input voltage (Vrms). low. This in turn turns on the discharging C3 through the
Peak power output (Pmax): Maximum power output One discharging channel formed by R8 and the discharging
thousand W of power was assumed. Pmin, or minimum internal transistor and given by Toff or Td 0.693(R2)*C1.

International Journal of Scientific Research in Science and Technology (www.ijsrst.com) | Volume 10 | Issue 6 293
 S. R. Ghuge et al Int J Sci Res Sci & Technol. November-December-2023, 10 (6) : 291-295

When the VC1 falls below Vcc/3, the comparator output on 7.2 Firing Circuit
the trigger terminal becomes high and the timer output +12V

TR1 D3
becomes high again. The discharging transistor turns off DIODE D7
R7
1k
S1
DIODE

and the VC1 rises again. In the above process, the section D4

DIODE R8 S2
D8
where the timer output is high is the time it takes for the
TRAN-1P2S 1k
DIODE
Q3
NPN
TR2 D5

VC1 to rise from Vcc/3 to 2Vcc/3, and the section where C1

1nF
D1

DIODE
R3
10k
Q1
NPN
DIODE D9
R9
1k
S3

DIODE
U1:A R1

the timer output is low is the time it takes for the VC1 to +5V

14
7473

J Q
12
10k

R5
D6

10k D10 R10 S4

1 TRAN-1P2S DIODE

drop from 2Vcc/3 to Vcc/3. When timer output is high, the

CLK DIODE 1k

3 13
K Q

R
Q4
NPN

2
equivalent circuit for charging capacitor C1 is as follows: C2 D2 R4
10k
Q2
NPN
CLK FROM IC555 PIN3 1nF DIODE
R2
10k
+5V
R6
10k

R1 Fig. 10 Firing Circuit

14.43k

As shown in fig 10 This circuit consist of transistor Q1 as

R2
D2 14.43k
switch which is driven by the high frequency IC555. This
will generate firing pulses at the output of the pulse
C1 transformer. Diode D3, D4, D5 and D6 are used to stop
0.01uf

negative pulses and allowed to pass only positive pulse to

the firing circuit. This also used to protect the firing circuit
from the high voltage available at the SCR’s. Capacitor C1
Fig. 9 Charging circuit of IC 555 and C2 is pass only AC to the base of the transistor and
block the DC component. IC 7473 is JK FF which is
A Diode is connected across the Resister R2 to get 50%
configured in T Flip flop and generate the equal and
duty cycle. Hence formula for the calculation of Frequency,
opposite signal for the firing of SCR’s
Ton and Toff is as given,
For 5 KHz, 7.3 DC Source
T = 1/5KHz = 0.2ms
Ton =Toff = 0.1 ms required for 5 kHz frequency TR3
Ton = 0.693*R1*C1 D7 D8
DIODE DIODE
0.1 ms = 0.693* R1* C1
12V /1 AMP
Assume C1= 0.01uF. 230 V
C5
R1 = 0.1ms/(0.693*0.01uf) 1000uF
= 14.43Kohms. D9 D10
DIODE DIODE
Toff = 0.693*R2*C1 TRAN-2P2S
0.1 ms = 0.693* R2* C1
Fig. 11 DC Source
Assume C3 = 0.01uF.
R8 = 0.1ms/(0.693*0.01uf) Fig. 11 is DC Source which generate the high current (
= 14.43Kohms. Appr. 10A ) and voltage ( 100 V DC). Here transformer is
For 5 KHz frequency a components values are chosen 230V/100-0 V. and D7, D8, D9 and D10 are used in the
R2 = 14.3 K Ohms bridge configuration which gives the output 100 V DC.
R1 = 14.3 K Ohms Capacitor C5 1000uf/450V acts as filter to give pure DC.
C1 = 0.01 uF This 100 V DC is fed to the SCR’s where it is chopped at
A Diode is connecte across the Resister R8 to get 50% duty high frequency 2.5 KHz which generate output of 1000W
cycle. and 2.5 KHz

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 S. R. Ghuge et al Int J Sci Res Sci & Technol. November-December-2023, 10 (6) : 291-295

7.4 Thyristor Inverter topology 5 Results

A. Full-bridge inverter Experimental converters have been used to validate
The full-bridge topology is the most complete allowing topology designs. SCR transistors were utilized in their
many control possibilities. In this case the full bridge construction. Thyristors have been used to create the
topology with a series resonant load LC is analyzed (Fig. control circuits, and the firing circuits are displayed.
12). The following characteristics were assumed for the
design at maximum output power:[9] 9. Conclusion and future scope
Square wave: since it provides the highest rms voltage in The common topologies for resonant inverters used in
the load (VLOAD). Equation (2) shows the decomposition induction cookers have been developed and put into use.
in harmonics. Because it uses less current to power its components, the
Switching frequency equal to natural oscillation full-bridge architecture is the most efficient; yet, it is more
frequency of the load (fn) (3): since it provides that the difficult to build.
power factor for the load at the switching frequency is
one[12]. REFERENCES
+100V

[1]. 130 kHz 7.5 kW Current Source Inverters

[2]. A Comparative Study of Resonant Inverter Topologies Used in
S1 S3
SCR SCR
Induction Cookers.
L R C [3]. A Comparative Study of Dual Half-Bridge Inverter
[4]. Discuss on the Application of Multilevel Inverter
[5]. Load-Adaptive Control Algorithm of Half-Bridge Series Resonant
S4 S2
SCR SCR
Inverter for Domestic Induction Heating
[6]. Parallel Operation of IGBTs Modular converter System
[7]. Performance evaluation of edge-resonant ZVS-PWM
Fig. 12 full bridge topology with a series resonant load LC [8]. Adaptive Observers Applied to Pan Temperature Control of
Induction Hobs
[9]. Design of the Half-Bridge, Series Resonant Converter for
Induction Cooking
[10]. Frequency-Synchronized Resonant Converters for the Supply of
where VI is the input dc bus voltage (Fig. 12). Multiwinding Coils in Induction Cooking Appliances
[11]. Improved Performance of Half-Bridge Series Resonant Inverter
for Induction Heating with Discontinuous Mode Control
The devices must be chosen in order to withstand the
[12]. Load-Adaptive Control Algorithm of Half-Bridge Series Resonant
maximum voltage and have the appropriate performance in Inverter for Domestic Induction Heating
conduction. The devices used for the implementation of the [13]. Parallel Operation of IGBTs Modular converter System for High
topologies for the cases of 1000 W and 100V As Power High Frequency Induction Heating Applications
[14]. Practical Evaluations Of Single-Ended Load-Resonant Inverter
consequence the full-bridge inverter is the most efficient
Using Application specific IGBT 8 Driver IC For Induction-
topology. Heating Appliance
C) Power control [15]. The domestic induction heating appliance an overview of recent
The inverter must be able to let the power control in order research
[16]. Principle of a Multi-Load Single Converter System
to be adjusted to the user’s requirements. This control is
normally carried out by varying the switching frequency. Cite this article as :
This variation is defined by the modulation factor ( m)
S. R. Ghuge, S. U. Borade, R. R. Gaikwad, " Use of Resonance in Induction
related to the frequency at maximum power (fsw Pmax)
Cooker", International Journal of Scientific Research in Science and
(15). The frequency variation necessary to let the power Technology(IJSRST), Print ISSN : 2395-6011, Online ISSN : 2395-602X,
control with each inverter topology is shown in Fig. 12. Volume 10, Issue 6, pp.291-295, November-December-2023.
Journal URL : https://ijsrst.com/IJSRST52310645

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