Week # 4: Lecture # 10-12

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
 Page replacement
Algorithms
Instructor： Dr. Farzana
Jabeen

Operating System Concepts – 10th Edition Silberschatz, Galvin and Gagne ©2018
 RECAP: LAST LECTURE

Operating System Concepts – 10th Edition 10.3 Silberschatz, Galvin and Gagne ©2018
 Virtual memory

▪ Virtual memory – separation of user logical memory from physical

memory
• Only part of the program needs to be in memory for execution
• Logical address space can therefore be much larger than physical
address space
• Allows address spaces to be shared by several processes
• Allows for more efficient process creation
• More programs running concurrently
• Less I/O needed to load or swap processes

Operating System Concepts – 10th Edition 10.4 Silberschatz, Galvin and Gagne ©2018
 Virtual memory (Cont.)

▪ Virtual address space – logical view of how process is stored in

memory
• Usually start at address 0, contiguous addresses until end of
space
• Meanwhile, physical memory organized in page frames
• MMU must map logical to physical
▪ Virtual memory can be implemented via:
• Demand paging
• Demand segmentation

Operating System Concepts – 10th Edition 10.5 Silberschatz, Galvin and Gagne ©2018
 Paging

Operating System Concepts – 10th Edition 10.6 Silberschatz, Galvin and Gagne ©2018
 Demand Paging

▪ Could bring entire process into memory at load time

▪ Or bring a page into memory only when it is needed
• Less I/O needed, no unnecessary I/O
• Less memory needed
• Faster response
• More users
▪ Similar to paging system with swapping (diagram on right)
▪ Page is needed  reference to it
• invalid reference  abort
• not-in-memory  bring to memory
▪ Lazy swapper – never swaps a page into memory unless page will
be needed
• Swapper that deals with pages is a pager

Operating System Concepts – 10th Edition 10.7 Silberschatz, Galvin and Gagne ©2018
 Valid-Invalid Bit
▪ With each page table entry a valid–invalid bit is associated
(v  in-memory – memory resident, i  not-in-memory)
▪ Initially valid–invalid bit is set to i on all entries
▪ Example of a page table snapshot:

▪ During MMU address translation, if valid–invalid bit in page table entry

is i  page fault

Operating System Concepts – 10th Edition 10.8 Silberschatz, Galvin and Gagne ©2018
 Steps in Handling a Page Fault (Cont.)

Operating System Concepts – 10th Edition 10.9 Silberschatz, Galvin and Gagne ©2018
 What Happens if There is no Free Frame?
▪ Used up by process pages
▪ Also in demand from the kernel, I/O buffers, etc
▪ How much to allocate to each?
▪ Page replacement – find some page in memory, but not really in use,
page it out
• Algorithm – terminate? swap out? replace the page?
• Performance – want an algorithm which will result in minimum
number of page faults
▪ Same page may be brought into memory several times

Operating System Concepts – 10th Edition 10.10 Silberschatz, Galvin and Gagne ©2018
 Need For Page Replacement

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 Basic Page Replacement
1. Find the location of the desired page on disk
2. Find a free frame:
- If there is a free frame, use it
- If there is no free frame, use a page replacement algorithm to
select a victim frame
- Write victim frame to disk if dirty
3. Bring the desired page into the (newly) free frame; update the page
and frame tables
4. Continue the process by restarting the instruction that caused the
trap

Note now potentially 2 page transfers for page fault – increasing EAT

Operating System Concepts – 10th Edition 10.12 Silberschatz, Galvin and Gagne ©2018
 Page Replacement

Operating System Concepts – 10th Edition 10.13 Silberschatz, Galvin and Gagne ©2018
 Page and Frame Replacement Algorithms

▪ Frame-allocation algorithm determines

• How many frames to give each process
• Which frames to replace
▪ Page-replacement algorithm
• Want lowest page-fault rate on both first access and re-access
▪ Evaluate algorithm by running it on a particular string of memory
references (reference string) and computing the number of page faults
on that string
• String is just page numbers, not full addresses
• Repeated access to the same page does not cause a page fault
• Results depend on number of frames available
▪ In all our examples, the reference string of referenced page numbers
is
7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1

Operating System Concepts – 10th Edition 10.14 Silberschatz, Galvin and Gagne ©2018
 First-In-First-Out (FIFO) Algorithm
▪ Reference string: 7,0,1,2,0,3,0,4,2,3,0,3,0,3,2,1,2,0,1,7,0,1
▪ 3 frames (3 pages can be in memory at a time per process)

15 page faults
▪ Can vary by reference string: consider 1,2,3,4,1,2,5,1,2,3,4,5
• Adding more frames can cause more page faults!
 Belady’s Anomaly
▪ How to track ages of pages?
• Just use a FIFO queue

Operating System Concepts – 10th Edition 10.15 Silberschatz, Galvin and Gagne ©2018
 LRU Algorithm (Cont.)
▪ Counter implementation
• Every page entry has a counter; every time page is referenced
through this entry, copy the clock into the counter
• When a page needs to be changed, look at the counters to find
smallest value
 Search through table needed
▪ Stack implementation
• Keep a stack of page numbers in a double link form:
• Page referenced:
 move it to the top
 requires 6 pointers to be changed
• But each update more expensive
• No search for replacement

Operating System Concepts – 10th Edition 10.16 Silberschatz, Galvin and Gagne ©2018
 LRU Algorithm (Cont.)
▪ LRU and OPT are cases of stack algorithms that don’t have
Belady’s Anomaly
▪ Use Of A Stack to Record Most Recent Page References

Operating System Concepts – 10th Edition 10.17 Silberschatz, Galvin and Gagne ©2018
 LRU Approximation Algorithms
▪ LRU needs special hardware and still slow
▪ Reference bit
• With each page associate a bit, initially = 0
• When page is referenced, bit set to 1
• Replace any with reference bit = 0 (if one exists)
 We do not know the order, however

Operating System Concepts – 10th Edition 10.18 Silberschatz, Galvin and Gagne ©2018
 LRU Approximation Algorithms (cont.)

▪ Second-chance algorithm
• Generally FIFO, plus hardware-provided reference bit
• Clock replacement
• If page to be replaced has
 Reference bit = 0 -> replace it
 reference bit = 1 then:
– set reference bit 0, leave page in memory
– replace next page, subject to same rules

Operating System Concepts – 10th Edition 10.19 Silberschatz, Galvin and Gagne ©2018
 Example : Second Chance Algorithm

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 Complete Solution

Page fault probability : no .of faults/ no. of memory access=7/12=0.58

Page fault percentage : no .of faults/ no. of memory access * 100

=7/128 100 =58%

Operating System Concepts – 10th Edition 10.21 Silberschatz, Galvin and Gagne ©2018
 Enhanced Second-Chance Algorithm
▪ Improve algorithm by using reference bit and modify bit (if available)
in concert
▪ Take ordered pair (reference, modify):
• (0, 0) neither recently used not modified – best page to replace
• (0, 1) not recently used but modified – not quite as good, must
write out before replacement
• (1, 0) recently used but clean – probably will be used again soon
• (1, 1) recently used and modified – probably will be used again
soon and need to write out before replacement
▪ When page replacement called for, use the clock scheme but use the
four classes replace page in lowest non-empty class
• Might need to search circular queue several times

https://www.youtube.com/watch?v=fW-h9jGRQdQ

Operating System Concepts – 10th Edition 10.22 Silberschatz, Galvin and Gagne ©2018
 LRU

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 Counting Algorithms

▪ Keep a counter of the number of references that have been made

to each page
• Not common
▪ Least Frequently Used (LFU) Algorithm:
• Replaces page with smallest count
▪ Most Frequently Used (MFU) Algorithm:
• Based on the argument that the page with the smallest count
was probably just brought in and has yet to be used

Operating System Concepts – 10th Edition 10.24 Silberschatz, Galvin and Gagne ©2018
 Example: LFU & MFU

Solution : Frequency of each page

7= ; 0= ; 1= ; 2= ; 3= ; 4=

Operating System Concepts – 10th Edition 10.25 Silberschatz, Galvin and Gagne ©2018
, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

Belady’s Anomaly Example

▪ Reference string :

Operating System Concepts – 10th Edition 10.26 Silberschatz, Galvin and Gagne ©2018
, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

Belady’s Anomaly Example

▪ Reference string :

Operating System Concepts – 10th Edition 10.27 Silberschatz, Galvin and Gagne ©2018
 Page-Buffering Algorithms
• As an add-on to any previous algorithm.
• A pool of free frames is maintained.
• When a page fault occurs, the desired page is read into a free frame from the
pool. The victim frame is later swapped out if necessary and put into the free
frames pool.
• Advantage / disadvantage ?
• Plus - Process is put back to ready queue faster.
• Minus - less pages are in use overall.
• VAX/VMS version - basic FIFO replacement with a free frame pool. A
victim is put into the pool but the original virtual address is kept. When a
page fault occurs, we first look in the pool. If we find the page there - no need
for disk operation.

Operating System Concepts – 10th Edition 10.28 Silberschatz, Galvin and Gagne ©2018
 Allocation of Frames
• Minimum number of frames in memory per process
• Architecture dependent: All of the pages needed for any possible
instruction need to be in memory for this instruction to be executed.
• Example: the IBM 370 move block operation will need up to 6 pages in
memory at the same time in order to execute (two for the instruction, two
for the source and two for the destination).
• Two ways of allocation
• Equal allocation (Fixed allocation)
• Each process gets the same number of frames. Divide the frames equally
between the processes.
• Proportional allocation (Dynamic allocation)
• Allocate frames according to size of process.
• Priority allocation
• Higher priority processes get more frames.

Operating System Concepts – 10th Edition 10.29 Silberschatz, Galvin and Gagne ©2018
 Fixed Allocation
▪ Equal allocation – For example, if there are 100 frames (after
allocating frames for the OS) and 5 processes, give each process 20
frames
• Keep some as free frame buffer pool

▪ Proportional allocation – Allocate according to the size of process

• Dynamic as degree of multiprogramming, process sizes change
m = 64
si = size of process pi
s1 = 10
S =  si s2 = 127
m = total number of frames 10
a1 = ´ 62
64 » 4
s 137
ai = allocation for pi = i  m 127
S a2 = ´ 62
64» 57
137

Operating System Concepts – 10th Edition 10.30 Silberschatz, Galvin and Gagne ©2018
 Example of Frame Allocation

Operating System Concepts – 10th Edition 10.31 Silberschatz, Galvin and Gagne ©2018
 Global vs. Local Allocation
• Global replacement
• Allows a process to select a victim frame from the set of all frames.
• Local replacement
• A victim frame is selected from the set of frames allocated to this
process.
• Tradeoffs?
• Global replacement is more efficient overall and therefore is commonly used.
Also easier to implement.
• Local replacement prevents external influences on the page fault rate of this
process as long as the same number of frames is allocated.

Operating System Concepts – 10th Edition 10.32 Silberschatz, Galvin and Gagne ©2018
 Reclaiming Pages
▪ A strategy to implement global page-replacement policy
▪ All memory requests are satisfied from the free-frame list, rather than
waiting for the list to drop to zero before we begin selecting pages for
replacement,
▪ Page replacement is triggered when the list falls below a certain
threshold.
▪ This strategy attempts to ensure there is always sufficient free
memory to satisfy new requests.

Operating System Concepts – 10th Edition 10.33 Silberschatz, Galvin and Gagne ©2018
 Reclaiming Pages Example

Operating System Concepts – 10th Edition 10.34 Silberschatz, Galvin and Gagne ©2018
 I/O interlock

▪ I/O Interlock
• Sometimes it is necessary to lock pages in memory so that they are not paged
out.

• Examples:
• I/O operation - the frame into which the I/O device was scheduled to
write should not be replaced.
• New page that was just brought - looks like the best candidate to be
replaced because it was not accessed yet, nor was it modified.

Operating System Concepts – 10th Edition 10.35 Silberschatz, Galvin and Gagne ©2018
 Non-Uniform Memory Access

▪ Non-uniform memory access (NUMA) is a computer memory

architecture used for multiprocessing. Each processor is assigned its
own local memory, as well as memory that is shared between
processors. Primarily used on servers.

▪ Non-uniform memory access (NUMA) is a computer memory design

used in multiprocessing, where the memory access time depends on
the memory location relative to the processor. Under NUMA, a
processor can access its own local memory faster than non-local
memory (memory local to another processor or memory shared
between processors). The benefits of NUMA are limited to particular
workloads, notably on servers where the data is often associated
strongly with certain tasks or users.

Operating System Concepts – 10th Edition 10.36 Silberschatz, Galvin and Gagne ©2018
 Non-Uniform Memory Access
▪ So far, we assumed that all memory accessed equally
▪ Many systems are NUMA – speed of access to memory varies
• Consider system boards containing CPUs and memory,
interconnected over a system bus
▪ NUMA multiprocessing architecture

Operating System Concepts – 10th Edition 10.37 Silberschatz, Galvin and Gagne ©2018
 Thrashing

▪ If a process does not have “enough” pages, the page-fault rate is very
high
• Page fault to get page
• Replace existing frame
• But quickly need replaced frame back
• This leads to:
 Low CPU utilization
 Operating system thinking that it needs to increase the degree
of multiprogramming
 Another process added to the system

Operating System Concepts – 10th Edition 10.38 Silberschatz, Galvin and Gagne ©2018
 Thrashing (Cont.)
▪ Thrashing. A process is busy swapping pages in and out

Operating System Concepts – 10th Edition 10.39 Silberschatz, Galvin and Gagne ©2018
 Demand Paging and Thrashing
▪ Why does demand paging work?
Locality model
A locality is a set of pages that are actively used together. The locality
model states that as a process executes, it moves from one locality to
another. A program is generally composed of several different localities
which may overlap.
For example when a function is called, it defines a new locality where
memory references are made to the instructions of the function call, it’s
local and global variables, etc. Similarly, when the function is exited,
the process leaves this locality.

▪ Why does thrashing occur?

 size of locality > total memory size

▪ Limit effects by using local or priority page replacement

Operating System Concepts – 10th Edition 10.40 Silberschatz, Galvin and Gagne ©2018
 Thrashing (Cont.)

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 Working-Set Model (Cont.)

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 Working-Set Model (Cont.)

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 Page-Fault Frequency
▪ More direct approach than WSS
▪ Establish “acceptable” page-fault frequency (PFF) rate and use
local replacement policy
• If actual rate too low, process loses frame
• If actual rate too high, process gains frame

Operating System Concepts – 10th Edition 10.44 Silberschatz, Galvin and Gagne ©2018
 Working Sets and Page Fault Rates
▪ Direct relationship between working set of a process and its
page-fault rate
▪ Working set changes over time
▪ Peaks and valleys over time

Operating System Concepts – 10th Edition 10.45 Silberschatz, Galvin and Gagne ©2018
 Reading assignment

▪ Slide 46 to 65

Operating System Concepts – 10th Edition 10.46 Silberschatz, Galvin and Gagne ©2018
 Other Considerations
▪ Prepaging
▪ Page size
▪ TLB reach
▪ Inverted page table
▪ Program structure
▪ I/O interlock and page locking

Operating System Concepts – 10th Edition 10.47 Silberschatz, Galvin and Gagne ©2018
 Prepaging
▪ To reduce the large number of page faults that occurs at process
startup
▪ Prepage all or some of the pages a process will need, before they are
referenced
▪ But if prepaged pages are unused, I/O and memory was wasted
▪ Assume s pages are prepaged and α of the pages is used
• Is cost of s * α save pages faults > or < than the cost of prepaging
s * (1- α) unnecessary pages?
• α near zero  prepaging loses

Operating System Concepts – 10th Edition 10.48 Silberschatz, Galvin and Gagne ©2018
 Page Size
▪ Sometimes OS designers have a choice
• Especially if running on custom-built CPU
▪ Page size selection must take into consideration:
• Fragmentation
• Page table size
• Resolution
• I/O overhead
• Number of page faults
• Locality
• TLB size and effectiveness
▪ Always power of 2, usually in the range 212 (4,096 bytes) to 222
(4,194,304 bytes)
▪ On average, growing over time

Operating System Concepts – 10th Edition 10.49 Silberschatz, Galvin and Gagne ©2018
 TLB Reach
▪ TLB Reach - The amount of memory accessible from the TLB
▪ TLB Reach = (TLB Size) X (Page Size)
▪ Ideally, the working set of each process is stored in the TLB
• Otherwise there is a high degree of page faults
▪ Increase the Page Size
• This may lead to an increase in fragmentation as not all
applications require a large page size
▪ Provide Multiple Page Sizes
• This allows applications that require larger page sizes the
opportunity to use them without an increase in fragmentation

Operating System Concepts – 10th Edition 10.50 Silberschatz, Galvin and Gagne ©2018
 Program Structure
▪ Program structure
• int[128,128] data;
• Each row is stored in one page
• Program 1
for (j = 0; j <128; j++)
for (i = 0; i < 128; i++)
data[i,j] = 0;

128 x 128 = 16,384 page faults

• Program 2
for (i = 0; i < 128; i++)
for (j = 0; j < 128; j++)
data[i,j] = 0;

128 page faults

Operating System Concepts – 10th Edition 10.51 Silberschatz, Galvin and Gagne ©2018
 Operating System Examples

▪ Windows

▪ Solaris

Operating System Concepts – 10th Edition 10.52 Silberschatz, Galvin and Gagne ©2018
 Windows
▪ Uses demand paging with clustering. Clustering brings in pages
surrounding the faulting page
▪ Processes are assigned working set minimum and working set
maximum
▪ Working set minimum is the minimum number of pages the
process is guaranteed to have in memory
▪ A process may be assigned as many pages up to its working set
maximum
▪ When the amount of free memory in the system falls below a
threshold, automatic working set trimming is performed to
restore the amount of free memory
▪ Working set trimming removes pages from processes that have
pages in excess of their working set minimum

Operating System Concepts – 10th Edition 10.53 Silberschatz, Galvin and Gagne ©2018
 Solaris
▪ Maintains a list of free pages to assign faulting processes
▪ Lotsfree – threshold parameter (amount of free memory) to begin
paging
▪ Desfree – threshold parameter to increasing paging
▪ Minfree – threshold parameter to being swapping
▪ Paging is performed by pageout process
▪ Pageout scans pages using modified clock algorithm
▪ Scanrate is the rate at which pages are scanned. This ranges from
slowscan to fastscan
▪ Pageout is called more frequently depending upon the amount of free
memory available
▪ Priority paging gives priority to process code pages

Operating System Concepts – 10th Edition 10.54 Silberschatz, Galvin and Gagne ©2018
 Solaris 2 Page Scanner

Operating System Concepts – 10th Edition 10.55 Silberschatz, Galvin and Gagne ©2018
 Example: The Intel 32 and 64-bit Architectures

▪ Dominant industry chips

▪ Pentium CPUs are 32-bit and called IA-32 architecture
▪ Current Intel CPUs are 64-bit and called IA-64 architecture
▪ Many variations in the chips, cover the main ideas here

Operating System Concepts – 10th Edition 10.56 Silberschatz, Galvin and Gagne ©2018
 Example: The Intel IA-32 Architecture

▪ Supports both segmentation and segmentation with paging

• Each segment can be 4 GB
• Up to 16 K segments per process
• Divided into two partitions
 First partition of up to 8 K segments are private to process (kept
in local descriptor table (LDT))
 Second partition of up to 8K segments shared among all
processes (kept in global descriptor table (GDT))

Operating System Concepts – 10th Edition 10.57 Silberschatz, Galvin and Gagne ©2018
 Example: The Intel IA-32 Architecture (Cont.)

▪ CPU generates logical address

• Selector given to segmentation unit
 Which produces linear addresses

• Linear address given to paging unit

 Which generates physical address in main memory
 Paging units form equivalent of MMU
 Pages sizes can be 4 KB or 4 MB

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 Logical to Physical Address Translation in IA-32

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 Intel IA-32 Segmentation

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 Intel IA-32 Paging Architecture

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 Intel IA-32 Page Address Extensions
▪ 32-bit address limits led Intel to create page address extension (PAE),
allowing 32-bit apps access to more than 4GB of memory space
• Paging went to a 3-level scheme
• Top two bits refer to a page directory pointer table
• Page-directory and page-table entries moved to 64-bits in size
• Net effect is increasing address space to 36 bits – 64GB of
physical memory

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 Intel x86-64
▪ Current generation Intel x86 architecture
▪ 64 bits is ginormous (> 16 exabytes)
▪ In practice only implement 48 bit addressing
• Page sizes of 4 KB, 2 MB, 1 GB
• Four levels of paging hierarchy
▪ Can also use PAE so virtual addresses are 48 bits and physical
addresses are 52 bits

Operating System Concepts – 10th Edition 10.63 Silberschatz, Galvin and Gagne ©2018