Semiconductor Devices

Junction Field-Effect Transistors: Part 1

M. B. Patil
mbpatil@ee.iitb.ac.in
www.ee.iitb.ac.in/~sequel

Department of Electrical Engineering

Indian Institute of Technology Bombay

M. B. Patil, IIT Bombay

Junction field-effect transistors

Gate

Source Current flow Drain

Semiconductor

M. B. Patil, IIT Bombay

Junction field-effect transistors

Gate

Source Current flow Drain

Semiconductor

* The flow of carriers (electrons or holes) from the “source” to the “drain” is modulated by
changing the electric field perpendicular to the direction of current flow.

M. B. Patil, IIT Bombay

Junction field-effect transistors

Gate

Source Current flow Drain

Semiconductor

* The flow of carriers (electrons or holes) from the “source” to the “drain” is modulated by
changing the electric field perpendicular to the direction of current flow.
* The change in field is brought about by a voltage applied to the “gate” terminal.

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.
* However, there are some fundamental differences between the two devices.

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.
* However, there are some fundamental differences between the two devices.
- In a BJT, both types of carriers – electrons and holes – participate in conduction (hence “bipolar”).

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.
* However, there are some fundamental differences between the two devices.
- In a BJT, both types of carriers – electrons and holes – participate in conduction (hence “bipolar”).
In a FET, either electrons or holes participate, depending on the type of the device
→ FET is a “unipolar” device.

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.
* However, there are some fundamental differences between the two devices.
- In a BJT, both types of carriers – electrons and holes – participate in conduction (hence “bipolar”).
In a FET, either electrons or holes participate, depending on the type of the device
→ FET is a “unipolar” device.
- In a BJT, VBE controls the collector current by changing the number of carriers injected by the emitter
into the base.

M. B. Patil, IIT Bombay

Junction field-effect transistors
Gate

Source Current flow Drain

Semiconductor

* The drain current can be controlled with the gate voltage. This is similar to a BJT in which the collector
current is controlled by the base voltage.
* However, there are some fundamental differences between the two devices.
- In a BJT, both types of carriers – electrons and holes – participate in conduction (hence “bipolar”).
In a FET, either electrons or holes participate, depending on the type of the device
→ FET is a “unipolar” device.
- In a BJT, VBE controls the collector current by changing the number of carriers injected by the emitter
into the base.
In a FET, VGS controls the drain current by modulating the resistance between the source and the drain.
M. B. Patil, IIT Bombay
Junction field-effect transistors

p+ n-Si
Source Drain
2a
p+
Z

Gate

M. B. Patil, IIT Bombay

Junction field-effect transistors

p+ n-Si
Source Drain
2a
p+
Z

Gate

* As the name implies, the operation of a junction field-effect transistor (JFET) depends on “junctions,” in
particular, on pn junctions.

M. B. Patil, IIT Bombay

Junction field-effect transistors

p+ n-Si
Source Drain
2a
p+
Z

Gate

* As the name implies, the operation of a junction field-effect transistor (JFET) depends on “junctions,” in
particular, on pn junctions.
* An n-channel JFET structure consists of an n-type semiconductor “channel” between two ohmic
contacts — source and drain.

M. B. Patil, IIT Bombay

Junction field-effect transistors

p+ n-Si
Source Drain
2a
p+
Z

Gate

* As the name implies, the operation of a junction field-effect transistor (JFET) depends on “junctions,” in
particular, on pn junctions.
* An n-channel JFET structure consists of an n-type semiconductor “channel” between two ohmic
contacts — source and drain.
* The top and bottom regions of the semiconductor are doped p + and are connected together as the gate
terminal.

M. B. Patil, IIT Bombay

Junction field-effect transistors

p+ n-Si
Source Drain
2a
p+
Z

Gate
L
L′
Junction field-effect transistors

G VG p+

a n-Si ID
p+ n-Si S D
Source Drain 0V a electron flow VD
2a
+
p
Z G VG p+
L
Gate Simplified structure
L
L′

M. B. Patil, IIT Bombay

Junction field-effect transistors

G VG p+

a n-Si ID
p+ n-Si S D
Source Drain 0V a electron flow VD
2a
+
p
Z G VG p+
L
Gate Simplified structure
L
L′

* A positive drain voltage VD causes an electron flow from source to drain (i.e., a current
ID in the opposite direction).

M. B. Patil, IIT Bombay

Junction field-effect transistors

G VG p+

a n-Si ID
p+ n-Si S D
Source Drain 0V a electron flow VD
2a
+
p
Z G VG p+
L
Gate Simplified structure
L
L′

* A positive drain voltage VD causes an electron flow from source to drain (i.e., a current
ID in the opposite direction).
* A negative gate voltage VG causes the p + n junctions to be reverse biased, and through
this “field effect,” the conductance of the channel is modulated.

M. B. Patil, IIT Bombay

Junction field-effect transistors

G VG p+

a n-Si ID
p+ n-Si S D
Source Drain 0V a electron flow VD
2a
+
p
Z G VG p+
L
Gate Simplified structure
L
L′

* A positive drain voltage VD causes an electron flow from source to drain (i.e., a current
ID in the opposite direction).
* A negative gate voltage VG causes the p + n junctions to be reverse biased, and through
this “field effect,” the conductance of the channel is modulated.
* This mechanism leads to a change ∆ID in the drain current when a change ∆VG is
applied in the gate voltage.

M. B. Patil, IIT Bombay

Junction field-effect transistors

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

(a) VG = 0 V

Consider VD = VS = 0 V, and VG < 0 V (reverse bias).

Junction field-effect transistors

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

(a) VG = 0 V

Consider VD = VS = 0 V, and VG < 0 V (reverse bias).

* Since the doping density in the p + region is much larger than that in the n region, the
depletion region extends mostly on the n-side.
Junction field-effect transistors

depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

Consider VD = VS = 0 V, and VG < 0 V (reverse bias).

* Since the doping density in the p + region is much larger than that in the n region, the
depletion region extends mostly on the n-side.

M. B. Patil, IIT Bombay

Junction field-effect transistors

depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

Consider VD = VS = 0 V, and VG < 0 V (reverse bias).

* Since the doping density in the p + region is much larger than that in the n region, the
depletion region extends mostly on the n-side.
* As the gate reverse bias is increased, the depletion width (W ) increases, and the width of
the neutral region (2h) decreases, since h = a − W .

M. B. Patil, IIT Bombay

Junction field-effect transistors
depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

M. B. Patil, IIT Bombay

Junction field-effect transistors
depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

1 L L
* The resistance offered by the n region (the “channel”) is Rch = = .
σ Area qNd µn (2hZ )

M. B. Patil, IIT Bombay

Junction field-effect transistors
depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

1 L L
* The resistance offered by the n region (the “channel”) is Rch = = .
σ Area qNd µn (2hZ )
1
* Rch ∝ → Rch ↑ as h ↓, i.e., as VG is made more negative.
h

M. B. Patil, IIT Bombay

Junction field-effect transistors
depletion
region VG p+ VG

W W
a
h a
S D S h D
0V 0V 0V 0V
n-silicon

VG p+ VG
L

(a) VG = 0 V (b) VG = −1 V

1 L L
* The resistance offered by the n region (the “channel”) is Rch = = .
σ Area qNd µn (2hZ )
1
* Rch ∝ → Rch ↑ as h ↓, i.e., as VG is made more negative.
h
* When W = a (i.e., h = 0), Rch → ∞, and the channel is said to be “pinched off.”
The corresponding gate voltage VG is known as the “pinch-off” voltage VP .
M. B. Patil, IIT Bombay
Example

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

Consider an n-channel Si JFET with Nd = 2 × 1015 cm−3 , µn = 1000 cm2 /V-s, a = 1.5 µm,
L = 10 µm, Z = 50 µm. Let the built-in voltage for the p + n (gate-to-channel) junction be 0.8 V.
(a) Find the pinch-off voltage VP .
(b) Compute the device resistance for VG = 0 V, −1 V, −2 V.
(c) Plot the ID –VD characteristics for VG = 0 V, −1 V, −2 V, for 0 < VD < 50 mV.

M. B. Patil, IIT Bombay

Example

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

2
r
(a) For a p + n junction, W = (Vbi − V ) where V = VG − 0 = VG , since VS = VD = 0 V.
qNd
2
r
qNd 2
At pinch-off, VG = VP , and W = a → a = (Vbi − VP ) → VP = Vbi − a .
qNd 2
1.6 × 10 −19 × 2 × 1015
→ VP = 0.8 − (1.5 × 10−4 )2 = 0.8 − 3.48 ≈ −2.7 V.
2 × 11.7 × 8.85 × 10−14

M. B. Patil, IIT Bombay

Example
depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

L
Example
depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

1 L 1 2
r
L
(b) The channel resistance is Rch = = , h=a − W =a − (Vbi − VG ).
σ Area qNd µn 2hZ qNd
Example
depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

1 L 1 2
r
L
(b) The channel resistance is Rch = = , h=a − W =a − (Vbi − VG ).
σ Area qNd µn 2hZ qNd
VG Rch
0V 4.0 kΩ
−1 V 7.4 kΩ
−2 V 20.3 kΩ
Example
depletion
region VG p+
50

W 40
a
h 30

Rch (kΩ)
S D
0V 0V 20
n-silicon
10

0
VG p+ −3 −2 −1 0
VG (V)
L VG = VP

1 L 1 2
r
L
(b) The channel resistance is Rch = = , h=a − W =a − (Vbi − VG ).
σ Area qNd µn 2hZ qNd
VG Rch
0V 4.0 kΩ
−1 V 7.4 kΩ
−2 V 20.3 kΩ
M. B. Patil, IIT Bombay
Example

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

(c) Since VD is small (< 50 mV), h can be assumed to be constant from the source end to the drain end.
Example

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

(c) Since VD is small (< 50 mV), h can be assumed to be constant from the source end to the drain end.
The device behaves like a gate-controlled resistor, with
1 L 1 L 1
Rch = =
2
r
qNd µn 2hZ qNd µn 2Z
a− (Vbi − VG )
qNd
Example

depletion
region VG p+

W
a
h
S D
0V 0V
n-silicon

VG p+

(c) Since VD is small (< 50 mV), h can be assumed to be constant from the source end to the drain end.
The device behaves like a gate-controlled resistor, with
1 L 1 L 1
Rch = =
2
r
qNd µn 2hZ qNd µn 2Z
a− (Vbi − VG )
qNd
VD
→ ID = .
Rch (VG )
Example

depletion
region VG p+
15
W
a
h 10
S D

ID (µA)
VG = 0 V
0V 0V
n-silicon 5 −1 V

−2 V
p+ 0
VG 0 10 20 30 40 50
L VD (mV)

(c) Since VD is small (< 50 mV), h can be assumed to be constant from the source end to the drain end.
The device behaves like a gate-controlled resistor, with
1 L 1 L 1
Rch = =
2
r
qNd µn 2hZ qNd µn 2Z
a− (Vbi − VG )
qNd
VD
→ ID = .
Rch (VG )
M. B. Patil, IIT Bombay
JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
S x D
0V VD

n-silicon

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
0V VD

n-silicon

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
= (2aZ ) × σ|E(x)| 0V VD

n-silicon

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
= (2aZ ) × σ|E(x)| 0V VD

= (2aZ ) × qµn Nd |E(x)|.

n-silicon

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
= (2aZ ) × σ|E(x)| 0V VD

= (2aZ ) × qµn Nd |E(x)|.

n-silicon
* Since the conductivity σ is independent of x, E is also
dV L
independent of x, say E0 → = constant.
dx

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
= (2aZ ) × σ|E(x)| 0V VD

= (2aZ ) × qµn Nd |E(x)|.

n-silicon
* Since the conductivity σ is independent of x, E is also
dV L
independent of x, say E0 → = constant.
dx
L Z L
dV
* E=− → V =− E dx
dx 0 0

M. B. Patil, IIT Bombay

JFET I -V relationship

Consider a rectangular bar of n-type silicon with a uniform doping

density Nd .
2a I0
* ID = Area × |J|
S x D
= (2aZ ) × σ|E(x)| 0V VD

= (2aZ ) × qµn Nd |E(x)|.

n-silicon
* Since the conductivity σ is independent of x, E is also
dV L
independent of x, say E0 → = constant.
dx
L Z L
dV
* E=− → V =− E dx
dx 0 0
VD
→ V (L) − V (0) = −E0 L → E0 = − .
L

M. B. Patil, IIT Bombay

JFET I -V relationship

I0 = 2aZ × qµn Nd × |E(x)|

VD
= 2aZ × qµn Nd × .
L
2a I0
S x D
0V VD

n-silicon

L
V
VD

0 x
0 L
JFET I -V relationship

I0 = 2aZ × qµn Nd × |E(x)|

VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD

n-silicon

L
V
VD

0 x
0 L
JFET I -V relationship

I0 = 2aZ × qµn Nd × |E(x)|

VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD
We can also view the structure as a series of resistances, each
corresponding to a length l. n-silicon

L
V
VD

0 x
0 L
JFET I -V relationship

R’ R’ R’ R’ R’
I0 = 2aZ × qµn Nd × |E(x)|
VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD
We can also view the structure as a series of resistances, each
corresponding to a length l. n-silicon

l l l l l
L
V
VD

0 x
0 L

M. B. Patil, IIT Bombay

JFET I -V relationship

R’ R’ R’ R’ R’
I0 = 2aZ × qµn Nd × |E(x)|
VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD
We can also view the structure as a series of resistances, each
corresponding to a length l. n-silicon
1 l 1 l
R0 = = . l l l l l
σ Area qµn Nd 2aZ
L
V
VD

0 x
0 L

M. B. Patil, IIT Bombay

JFET I -V relationship

R’ R’ R’ R’ R’
I0 = 2aZ × qµn Nd × |E(x)|
VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD
We can also view the structure as a series of resistances, each
corresponding to a length l. n-silicon
1 l 1 l
R0 = = . l l l l l
σ Area qµn Nd 2aZ
L
Since there are L/l resistors, V
VD
VD VD
I0 =   = (same as before).
L L 1 l
R0
l l qµn Nd 2aZ

0 x
0 L

M. B. Patil, IIT Bombay

JFET I -V relationship

R’ R’ R’ R’ R’
I0 = 2aZ × qµn Nd × |E(x)|
VD
= 2aZ × qµn Nd × .
L
VD 1 L 2a I0
The bar behaves like a resistance R = = × .
I0 qµn Nd 2aZ S x D
0V VD
We can also view the structure as a series of resistances, each
corresponding to a length l. n-silicon
1 l 1 l
R0 = = . l l l l l
σ Area qµn Nd 2aZ
L
Since there are L/l resistors, V
VD
VD VD
I0 =   = (same as before).
L L 1 l
R0
l l qµn Nd 2aZ
We will find this picture useful in understanding the functioning of
the JFET.
0 x
0 L

M. B. Patil, IIT Bombay

JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon

L 0 x
0 L

E
0 x

VD
−
L
resistor
JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG
JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG

Consider an n-channel JFET with a drain voltage VD .

JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG

Consider an n-channel JFET with a drain voltage VD .

* We expect the potential to rise from 0 V at the source end to VD at the drain end.
JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon JFET

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG

Consider an n-channel JFET with a drain voltage VD .

* We expect the potential to rise from 0 V at the source end to VD at the drain end.

M. B. Patil, IIT Bombay

JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon JFET

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG

Consider an n-channel JFET with a drain voltage VD .

* We expect the potential to rise from 0 V at the source end to VD at the drain end.
* As a result, the reverse bias VR across the p + n junction becomes a function of x, increasing from VS − VG at the source
end to VD − VG at the drain end.

M. B. Patil, IIT Bombay

JFET I -V relationship V
VD
2a I0
S x D
0V VD
resistor

n-silicon JFET

L 0 x
0 L
depletion
y VG region p+
E
0 x

ID
2a S x D
0V 2h(x) VD VD
−
L
n-silicon resistor

VG

Consider an n-channel JFET with a drain voltage VD .

* We expect the potential to rise from 0 V at the source end to VD at the drain end.
* As a result, the reverse bias VR across the p + n junction becomes a function of x, increasing from VS − VG at the source
end to VD − VG at the drain end.
√
* VR increases with x → W (∝ Vbi + VR ) ↑ → h ↓
M. B. Patil, IIT Bombay
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion y VG p+
region

2a I0 2h1 ID
2h2
S x D 2a S x D
0V VD 0V VD

n-silicon n-silicon

l l l l l VG
L L
V
V
VD

resistor

0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.

2a I0 2h1 ID
2h2
S x D 2a S x D
0V VD 0V VD

n-silicon n-silicon

l l l l l VG
L L
V
V
VD

resistor

0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.
l
* Rk ∝ →
2hk Z
R5 > R4 > R3 > R2 > R1 . 2a I0 2h1 ID
2h2
S x D 2a S x D
0V VD 0V VD

n-silicon n-silicon

l l l l l VG
L L
V
V
VD

resistor

0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.
l
* Rk ∝ →
2hk Z
R5 > R4 > R3 > R2 > R1 . 2a I0 2h1 ID
2h2
S x D 2a S x D
* Since the current is the same for 0V VD 0V VD
all resistors,
R5 > R4 > R3 > R2 > R1 → n-silicon n-silicon
∆V5 > ∆V4 > ∆V3 > ∆V2 > ∆V1 .
l l l l l VG
L L
V
V
VD

resistor

0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.
l
* Rk ∝ →
2hk Z
R5 > R4 > R3 > R2 > R1 . 2a I0 2h1 ID
2h2
S x D 2a S x D
* Since the current is the same for 0V VD 0V VD
all resistors,
R5 > R4 > R3 > R2 > R1 → n-silicon n-silicon
∆V5 > ∆V4 > ∆V3 > ∆V2 > ∆V1 .
l l l l l VG
L L
V
V
VD
∆V5

∆V4
resistor
∆V3
JFET ∆V2
∆V1
0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.
l
* Rk ∝ →
2hk Z
R5 > R4 > R3 > R2 > R1 . 2a I0 2h1 ID
2h2
S x D 2a S x D
* Since the current is the same for 0V VD 0V VD
all resistors,
R5 > R4 > R3 > R2 > R1 → n-silicon n-silicon
∆V5 > ∆V4 > ∆V3 > ∆V2 > ∆V1 .
l l l l l VG
∆V
|E(x)| ≈ ↑ as x ↑ L L
l
V
V
VD
∆V5

∆V4
resistor
∆V3
JFET ∆V2
∆V1
0 x x
0 L 0 L
 JFET: a discretised view
R1 R2 R3 R4 R5

R’ R’ R’ R’ R’ depletion
* A JFET can be thought of as a y VG p+
region
series of resistances.
l
* Rk ∝ →
2hk Z
R5 > R4 > R3 > R2 > R1 . 2a I0 2h1 ID
2h2
S x D 2a S x D
* Since the current is the same for 0V VD 0V VD
all resistors,
R5 > R4 > R3 > R2 > R1 → n-silicon n-silicon
∆V5 > ∆V4 > ∆V3 > ∆V2 > ∆V1 .
l l l l l VG
∆V
|E(x)| ≈ ↑ as x ↑ L L
l
V
E V
L VD
x
0 ∆V5

∆V4
JFET resistor
∆V3
VD JFET
− ∆V2
L
∆V1
resistor 0 x x
0 L 0 L

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L
* Gradual channel approximation:

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L
* Gradual channel approximation:
The potential in the channel is two-dimensional in nature, i.e., it varies with both x and y .

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L
* Gradual channel approximation:
The potential in the channel is two-dimensional in nature, i.e., it varies with both x and y .
Poisson’s equation should now be written in the 2D form:
∂Ex ∂Ey ρ
+ = .
∂x ∂y 

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L
* Gradual channel approximation:
The potential in the channel is two-dimensional in nature, i.e., it varies with both x and y .
Poisson’s equation should now be written in the 2D form:
∂Ex ∂Ey ρ
+ = .
∂x ∂y 
∂Ex ∂Ey
If L  a, the “gradual channel approximation,” viz.,  can be made, and the equation
∂x ∂y
∂Ey ρ
reduces to the 1D form, = .
∂y 

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L
* Gradual channel approximation:
The potential in the channel is two-dimensional in nature, i.e., it varies with both x and y .
Poisson’s equation should now be written in the 2D form:
∂Ex ∂Ey ρ
+ = .
∂x ∂y 
∂Ex ∂Ey
If L  a, the “gradual channel approximation,” viz.,  can be made, and the equation
∂x ∂y
∂Ey ρ
reduces to the 1D form, = .
∂y 
s
2
→ W (x) = (Vbi − V (x)), as in a 1D pn junction.
qNd
M. B. Patil, IIT Bombay
 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L

In the neutral channel region, V (x, y ) ≈ V (x) → Jdrift

n has only x-component.

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L

In the neutral channel region, V (x, y ) ≈ V (x) → Jdrift

n has only x-component.
dV
→ Jn (x, y ) = −qµn Nd ,
dx
where we have neglected Jndiff , a second-order effect.

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L

In the neutral channel region, V (x, y ) ≈ V (x) → Jdrift

n has only x-component.
dV
→ Jn (x, y ) = −qµn Nd ,
dx
where we have neglected Jndiff , a second-order effect.
Since the same current flows throughout the device,
ZZ ZZ
dV
ID = Jn (x, y ) dy dz = −qµn Nd dy dz.
dx

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon

Z
VG
L

In the neutral channel region, V (x, y ) ≈ V (x) → Jdrift

n has only x-component.
dV
→ Jn (x, y ) = −qµn Nd ,
dx
where we have neglected Jndiff , a second-order effect.
Since the same current flows throughout the device,
ZZ ZZ
dV
ID = Jn (x, y ) dy dz = −qµn Nd dy dz.
dx
dV
With L  a, we can say that depends only on x.
dx
dV
→ ID = −qµn Nd (2hZ ) .
dx M. B. Patil, IIT Bombay
 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon
dV Z
ID = −qµn Nd (2hZ ) . VG
dx L

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon
dV Z
ID = −qµn Nd (2hZ ) . VG
dx L
Integrating from x = 0 to x = L,
Z L Z VD Z VD    
W W
ID dx = −qµn Nd (2Z ) h dV → ID L = −qµn Nd (2Z )a 1− dV ∵ h = a − W = a 1− .
0 0 0 a a

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon
dV Z
ID = −qµn Nd (2hZ ) . VG
dx L
Integrating from x = 0 to x = L,
Z L Z VD Z VD    
W W
ID dx = −qµn Nd (2Z ) h dV → ID L = −qµn Nd (2Z )a 1− dV ∵ h = a − W = a 1− .
0 0 0 a a
2
r
The depletion width W is W (V ) = [Vbi − (VG − V )].
qNd

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon
dV Z
ID = −qµn Nd (2hZ ) . VG
dx L
Integrating from x = 0 to x = L,
Z L Z VD Z VD    
W W
ID dx = −qµn Nd (2Z ) h dV → ID L = −qµn Nd (2Z )a 1− dV ∵ h = a − W = a 1− .
0 0 0 a a
2
r
The depletion width W is W (V ) = [Vbi − (VG − V )].
qNd
( "  #)
2 VD + Vbi − VG 3/2 Vbi − VG 3/2
 
→ ID = G0 VD − (Vbi − VP ) − ,
3 Vbi − VP Vbi − VP

M. B. Patil, IIT Bombay

 depletion
JFET I -V relationship y region p+
VG

W(x) Area = 2hZ

a
S h(x) D 2h
0V x VD

n-silicon
dV Z
ID = −qµn Nd (2hZ ) . VG
dx L
Integrating from x = 0 to x = L,
Z L Z VD Z VD    
W W
ID dx = −qµn Nd (2Z ) h dV → ID L = −qµn Nd (2Z )a 1− dV ∵ h = a − W = a 1− .
0 0 0 a a
2
r
The depletion width W is W (V ) = [Vbi − (VG − V )].
qNd
( "  #)
2 VD + Vbi − VG 3/2 Vbi − VG 3/2
 
→ ID = G0 VD − (Vbi − VP ) − ,
3 Vbi − VP Vbi − VP

(2aZ )
where G0 = × (qµn Nd ) is the conductance of the channel if there was no depletion, i.e., h = a throughout.
L
M. B. Patil, IIT Bombay
 depletion
JFET I -V relationship y VG region p+

VG = −0.5 V
a = 1.5 µm W(x)
a
L = 10 µm
S h(x) D
Z = 50 µm x
0V VD
Vbi = 0.8 V
Nd = 2 × 1015 cm−3
n-silicon
µn = 1000 cm2 /V-s

VG
L
 depletion
JFET I -V relationship y VG region p+

VG = −0.5 V
a = 1.5 µm W(x)
a
L = 10 µm
S h(x) D
Z = 50 µm x
0V VD
Vbi = 0.8 V
Nd = 2 × 1015 cm−3
n-silicon
µn = 1000 cm2 /V-s

VG
L
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
 depletion
JFET I -V relationship y VG region p+

VG = −0.5 V
a = 1.5 µm W(x)
a
L = 10 µm
S h(x) D
Z = 50 µm x
0V VD
Vbi = 0.8 V
Nd = 2 × 1015 cm−3
n-silicon
µn = 1000 cm2 /V-s

VG
L
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
* The first term G0 VD represents the maximum current that we can get from the JFET structure without
any channel depletion.
 depletion
JFET I -V relationship y VG region p+

VG = −0.5 V
a = 1.5 µm W(x)
a
L = 10 µm
S h(x) D
Z = 50 µm x
0V VD
Vbi = 0.8 V
Nd = 2 × 1015 cm−3
n-silicon
µn = 1000 cm2 /V-s

VG
L
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
* The first term G0 VD represents the maximum current that we can get from the JFET structure without
any channel depletion.
* The second term represents reduction of the current due to channel depletion.
 depletion Vsat
D
JFET I -V relationship y VG region p+
0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm W(x) C
a
L = 10 µm pinch-off

ID (mA)
S h(x) D
Z = 50 µm x 0.1
0V VD ID = G0 ’ VD
Vbi = 0.8 V B
15 −3
Nd = 2 × 10 cm ID = G0 VD
n-silicon
µn = 1000 cm2 /V-s A
0
VG 0 1 2 3 4
L VD (V)
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
* The first term G0 VD represents the maximum current that we can get from the JFET structure without
any channel depletion.
* The second term represents reduction of the current due to channel depletion.

M. B. Patil, IIT Bombay

 depletion Vsat
D
JFET I -V relationship y VG region p+
0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm W(x) C
a
L = 10 µm pinch-off

ID (mA)
S h(x) D
Z = 50 µm x 0.1
0V VD ID = G0 ’ VD
Vbi = 0.8 V B
15 −3
Nd = 2 × 10 cm ID = G0 VD
n-silicon
µn = 1000 cm2 /V-s A
0
VG 0 1 2 3 4
L VD (V)
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
* The first term G0 VD represents the maximum current that we can get from the JFET structure without
any channel depletion.
* The second term represents reduction of the current due to channel depletion.
* Consider low values of VD (VD ≈ 0 V).
s
dID (2h0 Z ) 2
- = G00 = × (qµn Nd ), with h0 = a − (Vbi − VG ).
dVD VD →0 L qNd

M. B. Patil, IIT Bombay

 depletion Vsat
D
JFET I -V relationship y VG region p+
0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm W(x) C
a
L = 10 µm pinch-off

ID (mA)
S h(x) D
Z = 50 µm x 0.1
0V VD ID = G0 ’ VD
Vbi = 0.8 V B
15 −3
Nd = 2 × 10 cm ID = G0 VD
n-silicon
µn = 1000 cm2 /V-s A
0
VG 0 1 2 3 4
L VD (V)
( " 3/2 3/2 #)
2 VD + Vbi − VG Vbi − VG (2aZ )

ID = G 0 VD − (Vbi − VP ) − , G0 = × (qµn Nd ).
3 Vbi − VP Vbi − VP L
* The first term G0 VD represents the maximum current that we can get from the JFET structure without
any channel depletion.
* The second term represents reduction of the current due to channel depletion.
* Consider low values of VD (VD ≈ 0 V).
s
dID (2h0 Z ) 2
- = G00 = × (qµn Nd ), with h0 = a − (Vbi − VG ).
dVD VD →0 L qNd
- Note that G00 is smaller than G0 , the channel conductance with no depletion.
M. B. Patil, IIT Bombay
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
dx 0
A
0 1 2 3 4
VD (V)
2.5

2.0

1.5

V (volts)
1.0

0.5
A
0

0 A

−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V)
drain end increases, and the depletion width 2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
1.0

0.5
A
0

0 A

−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V)
drain end increases, and the depletion width 2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
1.0

0.5 B
A
0

0 A

−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
1.0

0.5 B
A
0

0 A

−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
dV
* Since the current, which is proportional to h , 1.0
dx B
is independent of x, a narrower channel at the 0.5
A
drain end is accompanied by a larger electric field. 0

0 A

−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
dV
* Since the current, which is proportional to h , 1.0
dx B
is independent of x, a narrower channel at the 0.5
A
drain end is accompanied by a larger electric field. 0

0 A
B
−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
dV
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A
drain end is accompanied by a larger electric field. 0

0 A
B
−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

0 A
B
−2

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

0 A

−2 C B

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
D
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

0 A

−2 C B

E (kV/cm)
−4
−6
−8
-10
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
D
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
D
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
VG = −0.5 V Isat
D
D E
a = 1.5 µm C S D
0V x VD
L = 10 µm pinch-off

ID (mA)
Z = 50 µm 0.1
ID = G 0 ’ VD
Vbi = 0.8 V B
dV Nd = 2 × 1015 cm−3 ID = G0 VD
ID = −qµn Nd (2hZ ) . µn = 1000 cm2 /V-s
B
dx 0
A
0 1 2 3 4
* When VD is increased, the reverse bias at the VD (V) S D
drain end increases, and the depletion width 0V VD
2.5
becomes larger at the drain end, causing the 2.0
conduction channel to shrink. 1.5

V (volts)
D
dV C
* Since the current, which is proportional to h , 1.0 C
dx B
is independent of x, a narrower channel at the 0.5
A S D
drain end is accompanied by a larger electric field. 0 0V VD

A
* At point D, as the current reaches its maximum 0
−2 C B
value, the channel at the drain end is almost

E (kV/cm)
−4 D
pinched off because the voltage across the p + n D
−6
junction at that point has become equal to the
−8
pinch-off voltage VP , i.e., VG − VD = VP . S
0V
D
VD
-10
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
B

ID = G0 VD B
A
0
0 1 2 3 4
VD (V) S D
0V VD
2.5

2.0 E

1.5

V (volts)
D
C
1.0 C

0.5 B
A S D
0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
* Our I -V equation is not valid beyond pinch-off. pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
B

ID = G0 VD B
A
0
0 1 2 3 4
VD (V) S D
0V VD
2.5

2.0 E

1.5

V (volts)
D
C
1.0 C

0.5 B
A S D
0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
* Our I -V equation is not valid beyond pinch-off. pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
* What actually happens is that a narrow high-field B

region develops near the drain end, and the ID = G0 VD B

“excess” voltage (over and above VD at point D) A
0
0 1 2 3 4
drops across this high-field region, leaving the VD (V) S D
0V VD
conditions in the rest of the channel virtually the 2.5
same as those at point D. 2.0 E

1.5

V (volts)
D
C
1.0 C

0.5 B
A S D
0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
* Our I -V equation is not valid beyond pinch-off. pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
* What actually happens is that a narrow high-field B

region develops near the drain end, and the ID = G0 VD B

“excess” voltage (over and above VD at point D) A
0
0 1 2 3 4
drops across this high-field region, leaving the VD (V) S D
0V VD
conditions in the rest of the channel virtually the 2.5
same as those at point D. 2.0 E

* Since the potential profile in most of the channel 1.5

V (volts)
D
C
remains the same (as point D), W (x), h(x), E(x) 1.0 C

also remain the same, and so does the current 0.5 B

A S D
→ the drain current saturates at IDsat . 0 0V VD

0 A

−2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
* Our I -V equation is not valid beyond pinch-off. pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
* What actually happens is that a narrow high-field B

region develops near the drain end, and the ID = G0 VD B

“excess” voltage (over and above VD at point D) A
0
0 1 2 3 4
drops across this high-field region, leaving the VD (V) S D
0V VD
conditions in the rest of the channel virtually the 2.5
same as those at point D. 2.0 E

* Since the potential profile in most of the channel 1.5

V (volts)
D
C
remains the same (as point D), W (x), h(x), E(x) 1.0 C

also remain the same, and so does the current 0.5 B

A S D
→ the drain current saturates at IDsat . 0 0V VD

* The corresponding VD is called the “drain 0 A

saturation voltage” VDsat . −2 C B

E (kV/cm)
−4 D
D
−6
−8
S D
-10 0V VD
-12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat
D
p+
A
JFET I -V relationship 0.2
Isat
D
What happens beyond punch-off? D E
C S D
0V x VD
* Our I -V equation is not valid beyond pinch-off. pinch-off

ID (mA)
0.1
ID = G 0 ’ VD
* What actually happens is that a narrow high-field B

region develops near the drain end, and the ID = G0 VD B

“excess” voltage (over and above VD at point D) A
0
0 1 2 3 4
drops across this high-field region, leaving the VD (V) S D
0V VD
conditions in the rest of the channel virtually the 2.5
same as those at point D. 2.0 E

* Since the potential profile in most of the channel 1.5

V (volts)
D
C
remains the same (as point D), W (x), h(x), E(x) 1.0 C

also remain the same, and so does the current 0.5 B

A S D
→ the drain current saturates at IDsat . 0 0V VD

* The corresponding VD is called the “drain 0 A

saturation voltage” VDsat . −2 C B

E (kV/cm)
−4 D
D
* VG − VDsat = VP → VDsat = VG − VP . For
−6
example, if VP = −2.5 V, VG = −1 V, the drain −8
S D
current will saturate at -10 0V VD
VDsat = −1 − (−2.5) = 1.5 V. -12
0 2 4 6 8 10
M. B. Patil, IIT Bombay
x (µm)
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

∆L

G VD
V
(VD − Vsat
D )

0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

* In the region near the drain end (between x = x2

and x = L), the electric field is larger than the rest
of the channel. The “excess” voltage, VD − VDsat , ∆L
drops across this region.
G VD
V
(VD − Vsat
D )

0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

* In the region near the drain end (between x = x2

and x = L), the electric field is larger than the rest
of the channel. The “excess” voltage, VD − VDsat , ∆L
drops across this region.
G VD
* Any further increase in VD causes a larger field in V
(VD − Vsat
D )
this high-field region, and the voltage drop across
that region increases accordingly.

0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

* In the region near the drain end (between x = x2

and x = L), the electric field is larger than the rest
of the channel. The “excess” voltage, VD − VDsat , ∆L
drops across this region.
G VD
* Any further increase in VD causes a larger field in V
(VD − Vsat
D )
this high-field region, and the voltage drop across
that region increases accordingly.
* The rest of the channel, “shielded” by the
high-field region, does not experience any change
as VD is increased.
0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

∆L

G VD
V
(VD − Vsat
D )

0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

* At x = x1 in the figure, for example, the channel

dV
potential as well as its derivative remain
dx
unaffected by the excess VD , and therefore the ∆L
dV G
current at x1 , which depends on h(V ) and VD
dx V
remains constant. Since the current is the same (VD − Vsat
D )
throughout the device, ID , the drain terminal
current, remains constant.

0 x1 x2
M. B. Patil, IIT Bombay L
 Vsat G depletion
D region
p+
JFET I -V relationship
0.2
Isat
D
D E
C

pinch-off

ID (mA)
0.1
ID = G0 ’ VD
B

ID = G0 VD S D
A 0V VD
0
0 1 2 3 4
VD (V)

* At x = x1 in the figure, for example, the channel

dV
potential as well as its derivative remain
dx
unaffected by the excess VD , and therefore the ∆L
dV G
current at x1 , which depends on h(V ) and VD
dx V
remains constant. Since the current is the same (VD − Vsat
D )
throughout the device, ID , the drain terminal
current, remains constant.
* Note that the high-field region near the drain is
not completely devoid of electrons (otherwise, the
current would be zero).
0 x1 x2
M. B. Patil, IIT Bombay L
 Simulation results
y
VG Gate

p+
0V 2a VD
Source x Drain
p+
n-Si

VG Gate
L = 2 µm
L’ = 2.8 µm

VG = −1 V
a = 0.2 µm
L = 2 µm
Z = 50 µm
Nd = 1017 cm−3
 Simulation results
y
VG Gate

p+
0V 2a VD
Source x Drain
p+
n-Si

VG Gate
L = 2 µm
L’ = 2.8 µm

3
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2
Z = 50 µm
Nd = 1017 cm−3 1

0
0 1 2 3 4 5
VD (volts)
 ×1017
Simulation results 1.2
y 1.0
VG Gate
VD = 0.4 V

n (cm−3 )
0.8 1V
p+
0V 2a VD 2V
Source x Drain 0.6
p+ 3V
n-Si 0.4 3.6 V
y=0
VG Gate 4V
0.2
L = 2 µm 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm)

3
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2
Z = 50 µm
Nd = 1017 cm−3 1

0
0 1 2 3 4 5
VD (volts)
 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

3
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2
Z = 50 µm
Nd = 1017 cm−3 1

0
0 1 2 3 4 5
VD (volts)
 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3
3 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0
Z = 50 µm 0.3
Nd = 1017 cm−3 1
0.0
0
0 1 2 3 4 5 2 2.5
1 1.5
VD (volts) −0.3 0 0.5
y VD = 0.4 V
x
 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

M. B. Patil, IIT Bombay

 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

* The channel is uniform from S to D at low VD and becomes narrower at the drain end at high VD .

M. B. Patil, IIT Bombay

 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

* The channel is uniform from S to D at low VD and becomes narrower at the drain end at high VD .
* An increase in VD is accompanied by a decrease in n and an increase in E.
M. B. Patil, IIT Bombay
 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

M. B. Patil, IIT Bombay

 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

* Beyond saturation (VD ∼ 3.6 V), V (x) is almost constant except in the region close to the drain.

M. B. Patil, IIT Bombay

 ×1017
Simulation results 1.2 4
4V
y y=0 3.6 V
VG Gate 1.0
3 3V
VD = 0.4 V
2V

n (cm−3 )
0.8

V (volts)
p+ 1V
0V 2a VD 2V 2
1V
Source x Drain 0.6
p+ 3V VD = 0.4 V
n-Si 3.6 V 1
0.4 y=0
VG Gate 4V
0.2 0
L = 2 µm 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5
L’ = 2.8 µm x (µm) x (µm)

×1017 cm−3 ×1017 cm−3

3 1 1
VG = −1 V
a = 0.2 µm
ID (mA)

L = 2 µm 2 0 0
Z = 50 µm 0.3 0.3
Nd = 1017 cm−3 1
0.0 0.0
0
0 1 2 3 4 5 2 2.5 2 2.5
1 1.5 1 1.5
VD (volts) −0.3 0 0.5 −0.3 0 0.5
y VD = 0.4 V VD = 4 V
x

* Beyond saturation (VD ∼ 3.6 V), V (x) is almost constant except in the region close to the drain.
* Note that the ID versus VD curve has a non-zero slope beyond saturation (to be discussed).
M. B. Patil, IIT Bombay