(Markss la)
* Unit 2 - Loqic ates gnd
                          Boolean Alyebrad
        Logic    Gates
          Logj.c9ates qre the loyic
                                    cireuits
   which act aS the basic building bloCks of
   any digita) sys tem. It is an Wetonic cintut
                                       one   ioputs and
                  output.
                classi-fication of       logic Getg
   B4sC Gate              Univer gate                Qeri ved gate
 ONot gate               9 N4ND 9ate             )     Ex-oR get
 OAND q4te                  NoR Gate         2        fxNoR gdte
 OoR qate
ON¡T Gate
                The      NoT gg te     or Jnyetrs a
  logic gate having                     ioput CA) and
  one     output cY).
                                        Output (y
   Boolean            equation =
                                                DE
         Tablei
        Toput        A         Out?ut
AND     Gate
             The AND gate               perform      the lorital
 multiplicatiens on itt inputsThe outpu
is        bijh (y- 1 if and only if all tse
inputs to the AND gate # qre bih (),
The  outut                                One
inputs
tuo       more           înutr and anly one outeut
Syrobo)eA        B
                                        -1(output)
 Tuth    Tasle
          Topts                Outpu!
             A       P
  8oolean ExpreAs j9)
                         A"B
                                            DATE
 9OR     Gat
                                         tbe
                he      oR qate penforms
                                          its outpud
  addition             it inputr,4erefel
   will be bigh (L), if n qrn onc
        ioptts gre bith().
                                  (o)         f and
            Its outpt cuj)) Le Jow
   any tf both the input           dre simltancsh
    lowCo)
    Sym bo
             Ioput
                              ooutut
                 A8
                  |
   Booea        ExpUjon
               y= A+8
()NAND         Gete
                 NAND te js              combjotjn
   NOT     ate dnd AND gate,            he NAND gat
     also      clled as        Universal qate '    kecaue
               Constnct
 using   on           ND gottes
                                        DATE
ioput
                                 (outut)
TntTable
           Toputs      Output|
           A
          or     Boolean   £xpresrion
Logica)
          Y= A-8
NOR     Gatt
           the    NOR qate js a combinetion
     gate    and oR  qate. The    Rggate s
                                NoR
 Not                               '_, becaye
also calle dd as rUniyeaa geteand           qate
                                        NoT gt
          ConrtNt       AND, oR
        Noggate
Symbol                           Y Coutt)
            B
                                                     DATE
      Trtt        able
                  Tbpts             output
                  A
     Boo)ean          ExpreJS)ón
()    EX-OR Gate          -
                      A EX-oR    gate having tuo jnput
     termín als        and one output terroio.
     Syrobol
                  A                      y=A B      ÂB+AB
     Tut       Tqble        -
                         Toputy              tput
                        A       B
     Booleon          Erpres Jon
                                                DArEI
   Ex- NoR       Gete
   ex-OR       ExNoRqate
                t            is
                  folloued boy aequiveJest
                                  NT g1te
                                           to an
                 A
                                         ÁB + AB
                 Tnputs         Output
   Boclean Expreasion
                 Y      AB + AB
* charra   cterjstics      Of Le
                              Lpgic      omilies '
               Noisc'       qn    unantto       eleotrica
  disturb dnce eobich m4y induee   ome Voltage
   iothe Connechng eirt
                     euire  ued etucen tue gat
     x from a gatt t output to lo aca
            Nojse Margin ss detiotd a hc
   of a logic circeit to toleute the hoseabilig
   oithout Cauaing the outpt t chanye und
    Hiyk level noye Margin s'H Voncmin- 8 HCmi)
     Lo    lere) nojse margin     V - VLomax)
                                                      "undesi
                                                     Vo mat)
                                                             nby
                                                 DATE
       oe       dissipation'
                     Dueto applied     voltay-e and curent
      long thoqh the Jogic           T    sorme pouer
     coill he disipateo in it        in tte foro of heat
                  Poer dissigatios is defined
      the pduct        of   pou
                           díssipatjon and
     frpagtion time is ciluays constant.
                               the
(9
      Eigare of Meit i
                 The Pigue df oer't of a logical
      family is the psduct of pouer dissipasag
     Land pnpgation
            ps) aqaion delay
         Figure of     merit =
            Prop ag ation   deluy time- X Poue   dissiphion
      fan-in    gnd
                dnd       fan-out
     fen-jn
         fan- in js dene d a the nymber
     inpuds a gate hd .        for'example, a tun       input
     qate uil)     have     Fann e¡ual to 2
     fenout
         fanout is defined s the maximym
  number. of inputs ofbe same TC fa mily
 -ht d gate Can dm ve cuihot
  atsi de the specified           fa|linq
                        output otage ITinits
                                         DATE
OSpeed. of opes
          the
               atiog       (ix Propagatien, deley
 change /ts     Otput of d logic gate doei not
              state
 stete   its_state
        of its input instgntgotous ly,wben  tse
                        s
time dela
 which
            betuee
        S called
                               changethene  is a
                           these tuo ime insteots,
                       fropagtion delay ht,
  popaa tion delay Is defined
   betueen t   ibstant
                                 s
                                 s ine delay
                            of application of an
  input     palse   qnd the instant of ocCuTence.
      the
             Corrponding output pulse.
                                            DATE
  Maximym clock frqueny
          This characeoiscs       plays a      vita)
 y le    for   selecting digita) Ic's for hik
 speed    opeaatÉon   for all p rocessor IC
 maxímun clock frequeny is 3pecified.
depends an the components ure d Tt 0s
 FXpresed in teamy        Of kHzMHz THz for
         ypes of diit) rcs
Supply yoltage Deguinement
         Supely Noltage atq uird for diqital c
Ldepende on compDnent
              component used
                        used Ac for each tye
 Of component bias ing, Sypply Tequre ment i
  ifferent
 Pouer Per gate
          This characteeistic     Of digita        rc
    essentia to cohsides
                                ohile designing
pootr supply for diqital rc based
 As poer Teuie ment ncregses, size of
poutr supply and cooling reguiement inc
*ornparison of TIL
               TTL               and
                                 qnd   CMOS !
    Parorntea
    Device         Nchanne    Mosf£
      used
                                       Bipolar j4nct'on
                  and pchannel         tansis tet
                    Mos fET
     VIH Chin)     3-SV( Vop =    )
    NILCax)
     VoH Cmin)                          2-7V
)   Higb leve       VNH   I4V
    poise magin
     Louw 1ee
    nojse marg
                                       Les     han
     Nose            Better thnTTL
     fmmyni
                                                    DATE'
                                cMOS
 9Propagatin fos
          dela
 (o      Sus chin g        Less mth n   TL   faster than
          Speed                                CMoSt
        Poue
       dissip ethin
       Per gate
(12    Speed
       poer prdt                              toopT
        fan cut            Tyeically so       fo
                                             Large
        Pouer                                  Lom
 6).Cost                    ex Expers)       More Expeniie
  2) Speed                   sloue             Pas te
          Laws        of      Booea
      0 Com nutative           lau
                Any binay apeatjoy           ohich satisf
       the fo ]lounny
       Commutdtive        CISion i           koown
                      opatio
                                                   DATE
    - ) ABBA
     2) At 8 B+A
                Ths the      commutatiye        aw stettes thdt
         Cam      h4nge     fhe segueee         Of Variak les
    Cinputs) oitheut having ang efffct oh the
        utput of lqic cirut
    AssociativeJaw i
                This laus state          t4at te ortlec in which
   the    Joqic operation          gre     pecfermed is not at
   all in portent eltiate . oittome                ?s the sqme
          2)    (At B†tc= A+CBtc)
9Dis trib utive lauw i
  a) AND laws
                These     aws     ae     elatedto th      AND
   eperathon      theefor         they drt     calledor"ANn
                                asFo||ows -
    Laus. They
    ) A o =0
         A "I     A
   i)     A"A =A
   b)    OR law
               These las setthe OR operqten, Thehe
                  Catled as OR lashey
         i) A1 =1
         iv) A+ A -1
                                                     DATE
(4)       Joveson
                This laus usesS the NoT opecation
         The invrs iorn states tht   f a vaiable i
         Subjectd to a double fovec'og then, it uiII
          esult
            s+    jn 4he onigha         yariab le   itself i .
                                    A
          Other Important Rues
)          A t AB   A
           A+ AIS = AtB
    V)      A+AB=A tB
v)
                                              Shgek
          Alaebrd \as     PoNotws
*Duaiity- Fheoxtmj
                        Aeeozdin4 to duali
                        An important property of Boolea0
         algebra s called sei principle of
                                               duali
              state that in a tuso yalued Boolean
          lgebra, the dual
                         dual" of
                               af 'anlae
                                  'an algebric xpio
               be obtained
                        ed simply y             ioterchanging
                                              DATE
 oR and AND
       and Os bopeator,
                      Is
                             and by eplacing b
 Polloun ng According
             conyersionsto Buality theortm, the
 Boolean                           possible    in a qiven
  )change
  )
          eacs  AND operatiorn to an oR
   chane each oR operahíen to an AND oprrats
   Complemeot.                        operchirn
  expreJsion              aPpegeiaq in the
           fos
         exAmple,  if the given
  isAt[ =l,                      expraion
            the mepl eLce the oRCt)
 o AND C) operation and              opeati
 e1 twnte the dual oftake        complémet
                              the gi
  elation                                            ven
  The dul fACB+C= A8 t AC isven by
            T+      s posible 4o, verify tbis theore hm
     constncting tnth tabler tor bott sidea
   of eqyationr
* De-Morqgnt Theorem
                   The                  Sugyested
  De- Mosqan and ohich qre rxtrthnely ulekl
 In Boolegn alqehra
  Theore n
      AB          4+
                 This theoremgtatesthat,+he Compkmest
  of a'preduct           is cq uc to addihorn of the
  Complenents "Tbit xle is             us trattd
   the Jeft        handside      cLH) of this t5orem
tpreseots   NAND_qte ant                  öt5inputsy A
  A_andB, cwheaS the RIght                        Handsile(RHs)
               meprey ents
 inverted inputs. Such oR                     qate
                                              gate    is
                                                      Is taled
        Bybbled oR
                              Can     gtate       De-Moqanse
                         GS    a NAND          operethon-s
equivaent           +o bubbled- oR operation.
              AND = Bytbled               oR
           = AB
                                              B
    bg: Illvstatiog                f De- Morgans theerem
               bi        heotn "Can be yeri Aie
ewTitin   a`tnt teahle
                               A      B
                     4         1
          1                    1
    1
              LHS AB = A                  RHS
                    The LHS                          theo reg p
  NoR gatt uith
                  roputsAand 8 obeeas
tfe RHs nepresetr 4s AND 9te ith thyet
                                                     DATE
      inputs. Such                ANDqte is called
       AND           hus   we                            "bubsled
      theotm                         state
                                   R funtion De-Morgdn'r   se cond
                bubbled         AND Aunctíon. js equivalert
                    NoR     Bubbl ed AN
                Y=AB
       ig IJus        trdhiont De-Morgan's
                                         qn' second theerem
                       thÉs theorem can be
      ontin4 a tnnth table Fos bots veriied
                                       sides
      theoero stateoent, ThÌs tntt table js shon
     in fiq   ohiçh shows LHS RHS.
                A
                           AtB
                            lo
                          LHSA48=A8            RHS
    * Fxample
O     Retuce        the    Follouiny expresin gnd
     in pleent legicqatei
                   =AB + ABC +ABCEtf)
               y=AB + ABCtA8 CE tf)
                     AB+Ag( r )
                      AB.(I+£+f)
    . y - AB
 Jrnplem entation' using9ates
          A
 mplement the lqica        exprekioh using beibaic
ates:      y        ABt AB +ÃC
      A
                                    A8
                                         AB
                                     Ac
  Ai: Toplemestation
Paroye the follocuing     ogic expresjons      aing
Boolean Algekra:
i) ABCt        BC   tABCtABC+A 8C    AB+ A 8
 )(A+B) CA tc)= A+ 8C
  LHS= (AtB)CA tc )
    But AA= A
    LHS  A+ActA8t 8e
        B t (Jtc) =
      LHS= A+AB+ Bc
                A (1+ B) +B C
       Buct (ItB)
      LHS ABCHs                  Preveol.
  i)   ABC+ ABC+ ABC+ ABC
       Rearraoge he 4ersto urnte
                 ABCABC ABC
             =ABCC+)t
           But    Ct1
           . LHS 5 AB+A g
                  -RHS
4) Reduce the Eolleusing lggic
                               exprteor iing
   Boclean laur' add Ugeoarian's     tseori
          A (ÀB    8(A-s)
           LAtAS]-[ +A8]
       - AB A A& t ABS t AsA8
                            BBO, AA-o,A8f A S
         AB tA
          AOB       :y-As tAS
                       DATE
Reaoram ig tHe tony
                ABC t ABC+4B
     A
                                           DATE
Simpliy the fol ]ouing boo|ean
  ) Y AB tABC +ABt A C
                                     express ions:
  ) Y- ABt   ABt AB +ABG
                (Ltcl            8t 8CBtc)
       As tABtAC
    = B(AtÂtAC
1) y CA+8) CA+ 5)(Ats)
  1= CA+ B) (At 5) CÃ+B)
     = (A+   AB+ABto)(A+         )
       AB+o+o
   =AAtABtAAB t ABB t AABt AB8
      AB t AB
                   AABA               qnd B8-A)
   =AB
             YAB
                    exampler
       technax D1E