IPW60R075CP
CoolMOSTM Power Transistor
Product Summary
Features
V DS @ Tj,max 650 V
• Lowest figure-of-merit R ON x Qg
R DS(on),max 0.075 Ω
• Extreme dv/dt rated
Q g,typ 87 nC
• High peak current capability
• Qualified according to JEDEC1) for target applications
• Pb-free lead plating; RoHS compliant
PG-TO247-3
• Ultra low gate charge
CoolMOS CP is designed for:
• Hard switching SMPS topologies for Server and Telecom
Type Package Marking
IPW60R075CP PG-TO247-3 6R075P
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter Symbol Conditions Value Unit
Continuous drain current ID T C=25 °C 39 A
T C=100 °C 25
Pulsed drain current2) I D,pulse T C=25 °C 130
Avalanche energy, single pulse E AS I D=11 A, V DD=50 V 1150 mJ
Avalanche energy, repetitive t AR2),3) E AR I D=11 A, V DD=50 V 1.7
Avalanche current, repetitive t AR2),3) I AR 11 A
MOSFET dv /dt ruggedness dv /dt V DS=0...480 V 50 V/ns
Gate source voltage V GS static ±20 V
AC (f >1 Hz) ±30
Power dissipation P tot T C=25 °C 313 W
Operating and storage temperature T j, T stg -55 ... 150 °C
Mounting torque M3 and M3.5 screws 60 Ncm
Rev. 2.2 page 1 2008-03-13
IPW60R075CP
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter Symbol Conditions Value Unit
Continuous diode forward current IS 26 A
T C=25 °C
Diode pulse current 2) I S,pulse 117
Reverse diode dv /dt 4) dv /dt 15 V/ns
Parameter Symbol Conditions Values Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case R thJC - - 0.4 K/W
Thermal resistance, junction -
R thJA leaded - - 62
ambient
Soldering temperature, 1.6 mm (0.063 in.)
T sold - - 260 °C
wavesoldering only allowed at leads from case for 10 s
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=250 µA 600 - - V
Gate threshold voltage V GS(th) V DS=V GS, I D=1.2 mA 2.5 3 3.5
V DS=600 V, V GS=0 V,
Zero gate voltage drain current I DSS - - 5 µA
T j=25 °C
V DS=600 V, V GS=0 V,
- 50 -
T j=150 °C
Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA
V GS=10 V, I D=26 A,
Drain-source on-state resistance R DS(on) - 0.068 0.075 Ω
T j=25 °C
V GS=10 V, I D=26 A,
- 0.18 -
T j=150 °C
Gate resistance RG f =1 MHz, open drain - 1.3 - Ω
Rev. 2.2 page 2 2008-03-13
IPW60R075CP
Parameter Symbol Conditions Values Unit
min. typ. max.
Dynamic characteristics
Input capacitance C iss V GS=0 V, V DS=100 V, - 4000 - pF
Output capacitance C oss f =1 MHz - 190 -
Effective output capacitance, energy
C o(er) - 180 -
related5)
V GS=0 V, V DS=0 V
to 480 V
Effective output capacitance, time
C o(tr) - 480 -
related6)
Turn-on delay time t d(on) - 40 - ns
Rise time tr V DD=400 V, - 17 -
V GS=10 V, I D=26 A,
Turn-off delay time t d(off) R G=7.6 Ω - 110 -
Fall time tf - 7 -
Gate Charge Characteristics
Gate to source charge Q gs - 20 - nC
Gate to drain charge Q gd V DD=400 V, I D=26 A, - 30 -
Qg V GS=0 to 10 V
Gate charge total - 87 116
Gate plateau voltage V plateau - 5.0 - V
Reverse Diode
V GS=0 V, I F=26 A,
Diode forward voltage V SD - 0.9 1.2 V
T j=25 °C
Reverse recovery time t rr - 500 - ns
V R=400 V, I F=I S,
Reverse recovery charge Q rr - 15 - µC
di F/dt =100 A/µs
Peak reverse recovery current I rrm - 58 - A
1)
J-STD20 and JESD22
2)
Pulse width t p limited by T j,max
3)
Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f.
4)
ISD≤ID, di/dt≤100A/µs, VDClink=400V, Vpeak<V(BR)DSS, Tj<Tjmax, identical low side and high side switch
5)
C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS.
6)
C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS.
Rev. 2.2 page 3 2008-03-13
IPW60R075CP
1 Power dissipation 2 Safe operating area
P tot=f(T C) I D=f(V DS); T C=25 °C; D =0
parameter: t p
350 103
limited by on-state
resistance
300
1 µs
102 10 µs
250
100 µs
200
P tot [W]
I D [A]
101
1 ms
150 DC
10 ms
100
100
50
0 10-1
0 40 80 120 160 100 101 102 103
T C [°C] V DS [V]
3 Max. transient thermal impedance 4 Typ. output characteristics
ZthJC=f(tP) I D=f(V DS); T j=25 °C
parameter: D=t p/T parameter: V GS
100 180
10 V
20 V 8V
150
0.5
7V
10-1 0.2 120
Z thJC [K/W]
0.1
I D [A]
0.05 90
0.02 6V
0.01
10-2 single pulse 60
5.5 V
5V
30
4.5 V
10-3 0
10-5 10-4 10-3 10-2 10-1 0 5 10 15 20
t p [s] V DS [V]
Rev. 2.2 page 4 2008-03-13
IPW60R075CP
5 Typ. output characteristics 6 Typ. drain-source on-state resistance
I D=f(V DS); T j=150 °C R DS(on)=f(I D); T j=150 °C
parameter: V GS parameter: V GS
80 0.5
8V
7V
70 10 V
6V
20 V 0.4
6.5 V
60
5.5 V 7V
50 6V
0.3
R DS(on) [Ω]
20 V
I D [A]
5.5 V
40
5V 5V
0.2
30
4.5 V
20
0.1
10
0 0
0 5 10 15 20 0 20 40 60 80 100
V DS [V] I D [A]
7 Drain-source on-state resistance 8 Typ. transfer characteristics
R DS(on)=f(T j); I D=26 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R DS(on)max
parameter: T j
0.2 200
C °25
160
0.15
120
R DS(on) [Ω]
I D [A]
0.1
98 %
C °150
typ 80
0.05
40
0 0
-60 -20 20 60 100 140 180 0 2 4 6 8 10
T j [°C] V GS [V]
Rev. 2.2 page 5 2008-03-13
IPW60R075CP
9 Typ. gate charge 10 Forward characteristics of reverse diode
V GS=f(Q gate); I D=26 A pulsed I F=f(V SD)
parameter: V DD parameter: T j
10 102
25 °C, 98%
120 V
150 °C, 98%
8 400 V
25 °C
150 °C
101
6
V GS [V]
I F [A]
4
100
0 10-1
0 20 40 60 80 100 0 0.5 1 1.5 2
Q gate [nC] V SD [V]
11 Avalanche energy 12 Drain-source breakdown voltage
E AS=f(T j); I D=11 A; V DD=50 V V BR(DSS)=f(T j); I D=0.25 mA
1200 700
1000
660
800
V BR(DSS) [V]
E AS [mJ]
600 620
400
580
200
0 540
20 60 100 140 180 -60 -20 20 60 100 140 180
T j [°C] T j [°C]
Rev. 2.2 page 6 2008-03-13
IPW60R075CP
13 Typ. capacitances 14 Typ. Coss stored energy
C =f(V DS); V GS=0 V; f =1 MHz E oss= f(V DS)
105 30
25
104
Ciss
20
3
10
E oss [µJ]
C [pF]
Coss 15
102
10
101
5
Crss
100 0
0 100 200 300 400 500 0 100 200 300 400 500 600
V DS [V] V DS [V]
Rev. 2.2 page 7 2008-03-13
IPW60R075CP
Definition of diode switching characteristics
Rev. 2.2 page 8 2008-03-13
IPW60R075CP
PG-TO247-3-21-41: Outlines
Rev. 2.2 page 9 2008-03-13
IPW60R075CP
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
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Rev. 2.2 page 10 2008-03-13