Lecture 4
Basic I/O Interface
-B.B. BREY-
CHAPTER-11
Kumary Sumi Rani Shaha
Lecturer
Dept. of EECE, PUST
23 July 2023 1
CHAPTER-11
Basic I/O Interface
-B.B. BREY-
Basic I/O Interface
I/O Instructions
• IN: Read information from an I/O device.
• OUT: Transfer information to an I/O device.
• Both IN and OUT instructions transfer data between an I/O
device and accumulator (AL or AX).
• The I/O address is stored in register DX as a 16-bit I/O address
or the byte (p8) immediately following the opcode as an 8-bit I/O
address.
• The 8-bit form p8 is called fixed Address.
• A 16-bit I/O address in register DX is called variable address.
Basic I/O Interface
Whenever data are transferred by using the IN or OUT instruction,
the I/O address,often called port number (or simply port), appears
on the address bus.
Instruction Data with Function
IN AL, p8 8 A byte is input from port p8 into AL
IN AX, p8 16 A word is input from port p8 into AX
IN AL, DX 8 A byte is input from the port addressed by DX into AL
IN AX, DX 16 A word is input from the port addressed by DX into AX
INSB 8 A byte is input from the port addressed by DX into the extra
segment memory location addressed by DI, then DI=DI 1
INSW 16 A word is input from…….. by DI, then DI=DI 2
OUT p8, AL 8 A byte is output from AL into port p8
OUT p8, AX 16 A word is output from AX into port p8
OUT DX, AL 8 A byte is output from AL into the port addressed by DX.
OUT DX, AX 16 A word is output from AX into the port addressed by DX
OUTSB 8 A byte is output from the data segment memory location addre
ssed by SI to the the port addressed by DX, then SI=SI 1
OUTSW 16 A word is output from the data………DX, then SI=SI 2
Isolated I/O
Memory Mapped I/O
The I/O map of PC
I/O space between ports 0000H-
03FFH are normally reserved for
the computer system and the ISA
bus.
The I/O ports located at 0400H-
FFFFH are available for user
applications, main-board functions
and PCI bus.
Basic Input Interface
Three-state-buffer
Basic Output Interface
Data latch
Minimum Mode 8086 I/O interface
Input/Output Instructions
Example: Write a sequence of instructions that will
output the data FFH to a byte wide output at address
ABH of the I/O address space.
MOV AL,FFH
OUT ABH, AL
Example: Data is to be read from two byte-
wide input ports at addresses AAh and A9h
and this data will then be output to a word-
wide output port at address B000h
IN AL, AAh
MOV AH, AL
IN AL, A9h
MOV DX, B000h
OUT DX, AX
The 8255 Programmable Peripheral Interface
• Intel has developed several peripheral controller chips
designed to support the 80x86 processor family. The
Intel is to provide a complete I/O interface in one
chip.
• 8255 PPI provides three 8 bit input ports in one 40
pin package. The chip interfaces directly to the data
bus of the processor, allowing its functions to be
programmed; that is in one application a port may
appear as an output, but in another, by
reprogramming it as an input.
PPI 8255
Addressing 8255
Control Word
Control Word
Example
•Find the control word
PA = out
PB = in
PC0 – PC3 = in
PC4 – PC7 = out
• Program the 8255 to get data from port B and send it to port A; in
addition data from PCL is sent out to the PCU
• Use port addresses 300h – 303h for the 8255 chip
Control Word:
The control word should be 1000 0011b = 83h
The Program
B8255 EQU 300h
CNTL EQU 83h
MOV DX, B8255+3
MOV AL, CNTL
OUT DX, AL
MOV DX, B8255+1
IN AL, DX
MOV DX, B8255
OUT DX, AL
MOV DX, B8255+2
IN AL, DX
AND AL, 0Fh
MOV CL, 4
ROL AL, CL
OUT DX, AL
Fig:10-21
I/O Design in the 8088/86
• In every computer, when data is sent out by the CPU, the data
on the data bus must be latched by the receiving device
• While memories have an internal latch to grab the data on the
data bus, a latching system must be designed for ports
• Since the data provided by the CPU to the port is on the
system data bus for a limited amount of time (50 - 1000ns) it
must be latched before it is lost
• Likewise, when data is coming in by way of a data bus (either
from port or memory) it must come in through a three-state
buffer
I/O Design
• Design for OUT 9CH, AL
Byte-wide Output Ports Using Isolated I/O
To which output port in the figure are data
written when the address put on the bus
during an output bus cycle is 8002h.
Write a sequence of instructions that output
the byte contents of the memory address
DATA to output port 0 in the figure.
Examples:
• To which output port in the previous figure are data written
when the address put on the bus during an output bus cycle is
8002h
A15 .. A0 = 1000 0000 0000 0010B
A15L = 1
A0L = 0
A3L A2L A1L = 001
P1 = 0
• Write a sequence of instructions that output the byte contents of
the memory address DATA to output port 0 in the previous
figure
MOV DX, 8000h
MOV AL,DATA
OUT DX, AL
Time Delay Loop and Blinking an LED at an Output
MOV DX, 8000h ;initialize address of port 0
MOV AL, 00h ; load data with bit 7 as logic 0
ON_OFF:OUT DX,AL ; turned on
MOV CX,0FFFFh ; load delay count of FFFFh
HERE: LOOP HERE
XOR AL,80h ; complement bit 7
JMP ON_OFF
IN Port Design Using the 74LS244
• Design for IN AL,9CH
Byte-Wide Input Ports Using Isolated I/O
A0L-A15L
A1L-A3L
A0L
A15L
Read from input port 7 to the
memory location DATA:
MOV DX, 800Eh
IN AL,DX
MOV DATA, AL
