LM3103

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LM3103 SIMPLE SWITCHER® Synchronous 1MHz 0.75A

Step-Down Voltage Regulator
Check for Samples: LM3103

FEATURES KEY SPECIFICATIONS

• Low Component Count and Small Solution • Input Voltage Range 4.5 V to 42 V
Size • 0.75 A Output Current
• Stable with Ceramic and Other Low ESR • 0.6V, ±2% Reference
Capacitors
• Integrated Dual N-Channel Main and
• No Loop Compensation Required Synchronous MOSFETs
• High Efficiency at a Light Load by DCM • Thermally Enhanced HTSSOP-16 Package
Operation
• Pre-bias Startup DESCRIPTION
• Ultra-Fast Transient Response The LM3103 Synchronously Rectified Buck Converter
• Programmable Soft-Start features all required functions to implement a highly
efficient and cost effective buck regulator. It is
• Programmable Switching Frequency up to 1 capable of supplying 0.75A to loads with an output
MHz voltage as low as 0.6V. Dual N-Channel synchronous
• Valley Current Limit MOSFET switches allow a low component count, thus
• Thermal Shutdown reducing complexity and minimizing board size.
• Output Over-Voltage Protection Different from most other COT regulators, the
• Precision Internal Reference for an Adjustable LM3103 does not rely on output capacitor ESR for
stability, and is designed to work exceptionally well
Output Voltage Down to 0.6V
with ceramic and other very low ESR output
capacitors. It requires no loop compensation, results
TYPICAL APPLICATIONS in a fast load transient response and simple circuit
• 5VDC, 12VDC, 24VDC, 12VAC, and 24VAC implementation. The operating frequency remains
Systems nearly constant with line variations due to the inverse
relationship between the input voltage and the on-
• Embedded Systems time. The operating frequency can be externally
• Industrial Control programmed up to 1 MHz. Protection features include
• Automotive Telematics and Body Electronics VCC under-voltage lock-out, output over-voltage
• Point of Load Regulators protection, thermal shutdown, and gate drive under-
voltage lock-out. The LM3103 is available in the
• Storage Systems thermally enhanced HTSSOP-16 package.
• Broadband Infrastructure
• Direct Conversion from 2/3/4 Cell Lithium
Batteries Systems

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2007–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Typical Application

Connection Diagram

Figure 1. 16-Lead Plastic HTSSOP

Package Number PWP0016A

PIN DESCRIPTIONS
Pin Name Description Application Information
1, 2 VIN Input supply voltage Supply pin to the device. Nominal input range is 4.5V to 42V.
3, 4 SW Switch Node Internally connected to the source of the main MOSFET and the drain of the synchronous
MOSFET. Connect to the output inductor.
5 BST Connection for Connect a 33 nF capacitor from the SW pin to this pin. This capacitor is charged through an
bootstrap capacitor internal diode during the main MOSFET off-time.
6 AGND Analog Ground Ground for all internal circuitry other than the PGND pin.
7 SS Soft-start A 70 µA internal current source charges an external capacitor of larger than 22 nF to provide
the soft-start function.
8 NC No Connection This pin should be left unconnected.
9, 10 GND Ground Must be connected to the AGND pin for normal operation. The GND and AGND pins are not
internally connected.
11 FB Feedback Internally connected to the regulation and over-voltage comparators. The regulation setting is
0.6V at this pin. Connect to feedback resistors.
12 EN Enable pin Internal pull-up. Connect to a voltage higher than 1.6V to enable the device.
13 RON On-time Control An external resistor from the VIN pin to this pin sets the main MOSFET on-time.
14 VCC Startup regulator Nominally regulated to 6V. Connect a capacitor of larger than 1 µF between the VCC and
Output AGND pins for stable operation.
15, 16 PGND Power Ground Synchronous MOSFET source connection. Tie to a ground plane.
DAP EP Exposed Pad Thermal connection pad. Connect to the ground plane.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

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Absolute Maximum Ratings (1) (2)

VIN, RON to AGND -0.3V to 43.5V
SW to AGND -0.3V to 43.5V
SW to AGND (Transient) -2V (< 100ns)
VIN to SW -0.3V to 43.5V
BST to SW -0.3V to 7V
VCC to AGND -0.3V to 7V
FB to AGND -0.3V to 5V
All Other Inputs to AGND -0.3V to 7V
(3)
ESD Rating Human Body Model ±2kV
Storage Temperature Range -65°C to +150°C
Junction Temperature (TJ) 150°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.

Operating Ratings (1)

Supply Voltage Range (VIN) 4.5V to 42V
Junction Temperature Range (TJ) −40°C to +125°C
Thermal Resistance (θJA) (2) 35°C/W
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
(2) θJA measurements were performed in general accordance with JEDEC Standards JESD51-1 to JESD51-11.

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Electrical Characteristics
Specifications with standard type are for TJ = 25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical
values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 18V, VOUT = 3.3V.
Symbol Parameter Conditions Min Typ Max Units
Start-Up Regulator, VCC
VCC VCC output voltage CVCC = 1 µF, no load 5.6 6.0 6.2 V
VIN - VCC VIN - VCC dropout voltage (1) ICC = 2mA 55 150 mV
ICC = 10mA 235 500
VCC-UVLO VCC under-voltage lockout threshold VIN increasing 3.5 3.7 4.1 V
(UVLO)
VCC-UVLO-HYS VCC UVLO hysteresis VIN decreasing 275 mV
IIN IIN operating current No switching, VFB = 1V 1.0 1.25 mA
IIN-SD IIN operating current, Device shutdown VEN = 0V 20 40 µA
IVCC VCC current limit VCC = 0V 20 33 42 mA
Switching Characteristics
RDS-UP-ON Main MOSFET RDS(on) 0.370 0.7 Ω
RDS- DN-ON Syn. MOSFET RDS(on) 0.220 0.4 Ω
Soft-start
ISS SS pin source current VSS = 0V 45 70 95 µA
Current Limit
ICL Syn. MOSFET current limit threshold 0.9 A
ON/OFF Timer
ton ON timer pulse width VIN = 10V, RON = 33 kΩ 0.350 µs
VIN = 18V, RON = 33 kΩ 0.170
ton-MIN ON timer minimum pulse width 100 ns
toff OFF timer pulse width 240 ns
Enable Input
VEN EN Pin input threshold VEN rising 1.6 1.85 V
VEN-HYS Enable threshold hysteresis VEN falling 230 mV
IEN Enable Pull-up Current VEN = 0V 1 µA
Regulation and Over-Voltage Comparator
VFB In-regulation feedback voltage TJ = −40°C to +125°C 0.588 0.6 0.612 V
VFB-OV Feedback over-voltage threshold 0.655 0.680 0.705 V
IFB 1 nA
Thermal Shutdown
TSD Thermal shutdown temperature TJ rising 165 °C
TSD-HYS Thermal shutdown temperature TJ falling 20 °C
hysteresis

(1) VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.

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Typical Performance Characteristics

All curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V shown in this
datasheet. TA = 25°C, unless otherwise specified.
Quiescent Current, IIN vs VIN VCC vs ICC

Figure 2. Figure 3.

VCC vs VIN ton vs VIN

Figure 4. Figure 5.

Switching Frequency, fSW vs VIN VFB vs Temperature

Figure 6. Figure 7.

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Typical Performance Characteristics (continued)

All curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V shown in this
datasheet. TA = 25°C, unless otherwise specified.
Efficiency vs Load Current
RDS(on) vs Temperature (VOUT = 3.3V)

Figure 8. Figure 9.

VOUT Regulation vs Load Current Efficiency vs Load Current

(VOUT = 3.3V) (VOUT = 0.6V)

Figure 10. Figure 11.

VOUT Regulation vs Load Current Power Up

(VOUT = 0.6V) (VOUT = 3.3V, 0.75A Loaded)

Figure 12. Figure 13.

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Typical Performance Characteristics (continued)

All curves are taken at VIN = 18V with the configuration in the typical application circuit for VOUT = 3.3V shown in this
datasheet. TA = 25°C, unless otherwise specified.
Enable Transient Shutdown Transient
(VOUT = 3.3V, 0.75A Loaded) (VOUT = 3.3V, 0.75A Loaded)

Figure 14. Figure 15.

Continuous Mode Operation Discontinuous Mode Operation

(VOUT = 3.3V, 2.5A Loaded) (VOUT = 3.3V, 0.02A Loaded)

Figure 16. Figure 17.

Load Transient
DCM to CCM Transition (VOUT = 3.3V, 0.075A - 0.75A Load, Current slew-rate:
(VOUT = 3.3V, 0.01A - 0.75A Load) 2.5A/µs)

Figure 18. Figure 19.

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SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM

Functional Description
The LM3103 Step Down Switching Regulator features all required functions to implement a cost effective,
efficient buck power converter which is capable of supplying 0.75A to loads. It contains dual N-Channel main and
synchronous MOSFETs. The Constant ON-Time (COT) regulation scheme requires no loop compensation,
results in a fast load transient response and simple circuit implementation. The regulator can function properly
even with an all ceramic output capacitor network, and does not rely on the output capacitor’s ESR for stability.
The operating frequency remains constant with line variations due to the inverse relationship between the input
voltage and the on-time. The valley current limit detection circuit, with a limit set internally at 0.9A, inhibits the
main MOSFET until the inductor current level subsides.
The LM3103 can be applied in numerous applications and can operate efficiently for inputs as high as 42V.
Protection features include VCC under-voltage lockout, output over-voltage protection, thermal shutdown, gate
drive under-voltage lock-out. The LM3103 is available in the thermally enhanced HTSSOP-16 package.

COT Control Circuit Overview

COT control is based on a comparator and a one-shot on-timer, with the output voltage feedback (feeding to the
FB pin) compared with a 0.6V internal reference. If the voltage of the FB pin is below the reference, the main
MOSFET is turned on for a fixed on-time determined by a programming resistor RON and the input voltage VIN,
upon which the on-time varies inversely. Following the on-time, the main MOSFET remains off for a minimum of
240 ns. Then, if the voltage of the FB pin is below the reference, the main MOSFET is turned on again for
another on-time period. The switching will continue to achieve regulation.

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The regulator will operate in the discontinuous conduction mode (DCM) at a light load, and the continuous
conduction mode (CCM) with a heavy load. In the DCM, the current through the inductor starts at zero and
ramps up to a peak during the on-time, and then ramps back to zero before the end of the off-time. It remains
zero and the load current is supplied entirely by the output capacitor. The next on-time period starts when the
voltage at the FB pin falls below the internal reference. The operating frequency in the DCM is lower and varies
larger with the load current as compared with the CCM. Conversion efficiency is maintained since conduction
loss and switching loss are reduced with the reduction in the load and the switching frequency respectively. The
operating frequency in the DCM can be calculated approximately as follows:
20
VOUT (VIN - 1) x L x 1.18 x 10 x IOUT
fSW = 2
(VIN ± VOUT) x R ON (1)
In the continuous conduction mode (CCM), the current flows through the inductor in the entire switching cycle,
and never reaches zero during the off-time. The operating frequency remains relatively constant with load and
line variations. The CCM operating frequency can be calculated approximately as follows:
VOUT
fSW = -11
8.3 x 10 x RON (2)
The output voltage is set by two external resistors RFB1 and RFB2. The regulated output voltage is
VOUT = 0.6V x (RFB1 + RFB2)/RFB2 (3)

Startup Regulator (VCC)

A startup regulator is integrated within the LM3103. The input pin VIN can be connected directly to a line voltage
up to 42V. The VCC output regulates at 6V, and is current limited to 30 mA. Upon power up, the regulator sources
current into an external capacitor CVCC, which is connected to the VCC pin. For stability, CVCC must be at least 1
µF. When the voltage on the VCC pin is higher than the under-voltage lock-out (UVLO) threshold of 3.7V, the
main MOSFET is enabled and the SS pin is released to allow the soft-start capacitor CSS to charge.

threshold (≊3.4V). If VIN is less than ≊4.0V, the regulator shuts off and VCC goes to zero.
The minimum input voltage is determined by the dropout voltage of the regulator and the VCC UVLO falling

Regulation Comparator
The feedback voltage at the FB pin is compared to a 0.6V internal reference. In normal operation (the output
voltage is regulated), an on-time period is initiated when the voltage at the FB pin falls below 0.6V. The main
MOSFET stays on for the programmed on-time, causing the output voltage to rise and consequently the voltage
of the FB pin to rise above 0.6V. After the on-time period, the main MOSFET stays off until the voltage of the FB
pin falls below 0.6V again. Bias current at the FB pin is nominally 1 nA.

Zero Coil Current Detect

The current of the synchronous MOSFET is monitored by a zero coil current detection circuit which inhibits the
synchronous MOSFET when its current reaches zero until the next on-time. This circuit enables the DCM
operation, which improves the efficiency at a light load.

Over-Voltage Comparator
The voltage at the FB pin is compared to a 0.68V internal reference. If it rises above 0.68V, the on-time is
immediately terminated. This condition is known as over-voltage protection (OVP). It can occur if the input
voltage or the output load changes suddenly. Once the OVP is activated, the main MOSFET remains off until the
voltage at the FB pin falls below 0.6V. The synchronous MOSFET will stay on to discharge the inductor until the
inductor current reduces to zero and then switch off.

ON-Time Timer, Shutdown

The on-time of the LM3103 main MOSFET is determined by the resistor RON and the input voltage VIN. It is
calculated as follows:
8.3 x 10-11 x RON
tON =
VIN (4)

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The inverse relationship of ton and VIN gives a nearly constant frequency as VIN is varied. RON should be selected
such that the on-time at maximum VIN is greater than 100 ns. The on-timer has a limiter to ensure a minimum of
100 ns for ton. This limits the maximum operating frequency, which is governed by the following equation:
VOUT
fSW(MAX) =
VIN(MAX) x 100 ns (5)
The LM3103 can be remotely shut down by pulling the voltage of the EN pin below 1.6V. In this shutdown mode,
the SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the EN pin
allows normal operation to resume because the EN pin is internally pulled up.

Figure 20. Shutdown Implementation

Current Limit
Current limit detection is carried out during the off-time by monitoring the re-circulating current through the
synchronous MOSFET. Referring to the Functional Block Diagram, when the main MOSFET is turned off, the
inductor current flows through the load, the PGND pin and the internal synchronous MOSFET. If this current
exceeds 0.9A, the current limit comparator toggles, and as a result the start of the next on-time period is
disabled. The next switching cycle starts when the re-circulating current falls back below 0.9A (and the voltage at
the FB pin is below 0.6V). The inductor current is monitored during the on-time of the synchronous MOSFET. As
long as the inductor current exceeds 0.9A, the main MOSFET will remain inhibited to achieve current limit. The
operating frequency is lower during current limit owing to a longer off-time.
Figure 21 illustrates an inductor current waveform. On average, the output current IOUT is the same as the
inductor current IL, which is the average of the rippled inductor current. In case of current limit (the current limit
portion of Figure 21), the next on-time will not initiate until that the current drops below 0.9A (assume the voltage
at the FB pin is lower than 0.6V). During each on-time the current ramps up an amount equal to:
(VIN - VOUT) x ton
ILR =
L (6)
During current limit, the LM3103 operates in a constant current mode with an average output current IOUT(CL)
equal to 0.9A + ILR / 2.

Figure 21. Inductor Current - Current Limit Operation

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N-Channel MOSFET and Driver

The LM3103 integrates an N-Channel main MOSFET and an associated floating high voltage main MOSFET
gate driver. The gate drive circuit works in conjunction with an external bootstrap capacitor CBST and an internal
high voltage diode. CBST connected between the BST and SW pins powers the main MOSFET gate driver during
the main MOSFET on-time. During each off-time, the voltage of the SW pin falls to approximately -1V, and CBST
charges from VCC through the internal diode. The minimum off-time of 240 ns provides enough time for charging
CBST in each cycle.

Soft-Start
The soft-start feature allows the converter to gradually reach a steady state operating point, thereby reducing
startup stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold and a 180 µs
fixed delay, a 70 µA internal current source charges an external capacitor CSS connecting to the SS pin. The
ramping voltage at the SS pin (and the non-inverting input of the regulation comparator as well) ramps up the
output voltage VOUT in a controlled manner. An internal switch grounds the SS pin if any of the following three
cases happen: (i) VCC is below the under-voltage lockout threshold; (ii) a thermal shutdown occurs; or (iii) the EN
pin is grounded. Alternatively, the output voltage can be shut off by connecting the SS pin to the ground using an
external switch. Releasing the switch allows the voltage of the SS pin to ramp up and the output voltage to return
to normal. The shutdown configuration is shown in Figure 22.

Figure 22. Alternate Shutdown Implementation

Thermal Protection
The junction temperature of the LM3103 should not exceed the maximum limit. Thermal protection is
implemented by an internal Thermal Shutdown circuit, which activates (typically) at 165°C to make the controller
enter a low power reset state by disabling the main MOSFET, disabling the on-timer, and grounding the SS pin.
Thermal protection helps prevent catastrophic failures from accidental device overheating. When the junction
temperature falls back below 145°C (typical hysteresis = 20°C), the SS pin is released and normal operation
resumes.

Applications Information

EXTERNAL COMPONENTS
The following guidelines can be used to select external components.
RFB1 and RFB2 : These resistors should be chosen from standard values in the range of 1.0 kΩ to 10 kΩ,
satisfying the following ratio:

RFB1/RFB2 = (VOUT/0.6V) - 1 (7)

For VOUT = 0.6V, the FB pin can be connected to the output directly with a pre-load resistor drawing more than
20 µA. This is because the converter operation needs a minimum inductor current ripple to maintain good
regulation when no load is connected.
RON: Equation 2 can be used to select RON if a desired operating frequency is selected. But the minimum value
of RON is determined by the minimum on-time. It can be calculated as follows:
VIN(MAX) x 100 ns
RON -11
8.3 x 10 (8)

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If RON calculated from Equation 2 is smaller than the minimum value determined in Equation 8, a lower frequency
should be selected to re-calculate RON by Equation 2. Alternatively, VIN(MAX) can also be limited in order to keep
the frequency unchanged. The relationship of VIN(MAX) and RON is shown in Figure 23.
On the other hand, the minimum off-time of 240 ns can limit the maximum duty ratio. This may be significant at
low VIN. A larger RON should be selected in any application requiring a large duty ratio.

Figure 23. Maximum VIN for selected RON

L: The main parameter affected by the inductor is the amplitude of the inductor current ripple (ILR), which is
recommended to be greater than 0.3A. Once ILR is selected, L can be determined by:
VOUT x (VIN - VOUT)
L=
ILR x fSW x VIN (9)
where VIN is the input voltage and fSW is determined from Equation 2.
If the output current IOUT is known, by assuming that IOUT = IL, the peak and valley of ILR can be determined.
Beware that the peak of ILR should not be larger than the saturation current of the inductor and the current rating
of the main and synchronous MOSFETs. Also, the valley of ILR must be positive if CCM operation is required.

Figure 24. Inductor selection for VOUT = 3.3V

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Figure 25. Inductor selection for VOUT = 0.6V

Figure 24 and Figure 25 show curves on inductor selection for various VOUT and RON. According to Equation 8,
VIN is limited for small RON. Some curves are therefore limited as shown in the figures.
CVCC: The capacitor on the VCC output provides not only noise filtering and stability, but also prevents false
triggering of the VCC UVLO at the main MOSFET on/off transitions. CVCC should be no smaller than 1 µF for
stability, and should be a good quality, low ESR, ceramic capacitor.
COUT and COUT3: COUT should generally be no smaller than 10 µF. Experimentation is usually necessary to
determine the minimum value for COUT, as the nature of the load may require a larger value. A load which
creates significant transients requires a larger COUT than a fixed load.
COUT3 is a small value ceramic capacitor located close to the LM3103 to further suppress high frequency noise at
VOUT. A 47 nF capacitor is recommended.
CIN and CIN3: The function of CIN is to supply most of the main MOSFET current during the on-time, and limit the
voltage ripple at the VIN pin, assuming that the voltage source connecting to the VIN pin has finite output
impedance. If the voltage source’s dynamic impedance is high (effectively a current source), CIN supplies the
difference between the instantaneous input current and the average input current.
At the maximum load current, when the main MOSFET turns on, the current to the VIN pin suddenly increases
from zero to the valley of the inductor’s ripple current and ramps up to the peak value. It then drops to zero at
turn-off. The average current during the on-time is the load current. For a worst case calculation, CIN must be
capable of supplying this average load current during the maximum on-time. CIN is calculated from:
IOUT x tON
CIN =
VIN (10)
where IOUT is the load current, ton is the maximum on-time, and ΔVIN is the allowable ripple voltage at VIN.
CIN3’s purpose is to help avoid transients and ringing due to long lead inductance at the VIN pin. A low ESR 0.1
µF ceramic chip capacitor located close to the LM3103 is recommended.
CBST: A 33 nF high quality ceramic capacitor with low ESR is recommended for CBST since it supplies a surge
current to charge the main MOSFET gate driver at each turn-on. Low ESR also helps ensure a complete
recharge during each off-time.
CSS: The capacitor at the SS pin determines the soft-start time, i.e. the time for the reference voltage at the
regulation comparator and therefore, the output voltage to reach their final value. The time is determined from the
following equation:
CSS x 0.6V
tSS = 180 s +
70 A (11)
CFB: If the output voltage is higher than 1.6V, CFB is needed in the Discontinuous Conduction Mode to reduce the
output ripple. The recommended value for CFB is 10 nF.

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PC BOARD LAYOUT
The LM3103 regulation, over-voltage, and current limit comparators are very fast so they will respond to short
duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and compact as
possible, and all external components must be as close to their associated pins of the LM3103 as possible. Refer
to the Simplified Functional Block Diagram. The loop formed by CIN, the main and synchronous MOSFET internal
to the LM3103, and the PGND pin should be as small as possible. The connection from the PGND pin to CIN
should be as short and direct as possible. Vias should be added to connect the ground of C IN to a ground plane,
located as close to the capacitor as possible. The bootstrap capacitor CBST should be connected as close to the
SW and BST pins as possible, and the connecting traces should be thick. The feedback resistors and capacitor
RFB1, RFB2, and CFB should be close to the FB pin. A long trace running from VOUT to RFB1 is generally acceptable
since this is a low impedance node. Ground RFB2 directly to the AGND pin (pin 7). The output capacitor COUT
should be connected close to the load and tied directly to the ground plane. The inductor L should be connected
close to the SW pin with as short a trace as possible to reduce the potential for EMI (electromagnetic
interference) generation. If it is expected that the internal dissipation of the LM3103 will produce excessive
junction temperature during normal operation, making good use of the PC board’s ground plane can help
considerably to dissipate heat. The exposed pad on the bottom of the LM3103 IC package can be soldered to
the ground plane, which should extend out from beneath the LM3103 to help dissipate heat. The exposed pad is
internally connected to the LM3103 IC substrate. Additionally the use of thick traces, where possible, can help
conduct heat away from the LM3103. Using numerous vias to connect the die attached pad to the ground plane
is a good practice. Judicious positioning of the PC board within the end product, along with the use of any
available air flow (forced or natural convection) can help reduce the junction temperature.

Figure 26. Typical Application Schematic for VOUT = 3.3V

Figure 27. Typical Application Schematic for VOUT = 0.6V

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www.ti.co SNVS523F – SEPTEMBER 2007 – REVISED APRIL

REVISION HISTORY

Changes from Revision E (April 2013) to Revision F Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 14

1
Copyright Submit Documentation
© 2007–2013, Texas Instruments CopyrightSubmit Documentation
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Product Folder Links:
 PACKAGE OPTION ADDENDUM

www.ti.com 11-Apr-2013

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Top-Side Markings Samples
(1) Drawing Qty (2) (3) (4)

LM3103MH/NOPB ACTIVE HTSSOP PWP 16 92 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 LM3103
& no Sb/Br) MH
LM3103MHX/NOPB ACTIVE HTSSOP PWP 16 2500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 LM3103
& no Sb/Br) MH

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest
availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on
information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has
taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and
chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Nov-2015

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM3103MHX/NOPB HTSSOP PWP 16 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 6-Nov-2015

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3103MHX/NOPB HTSSOP PWP 16 2500 367.0 367.0 35.0

Pack Materials-Page 2
 MECHANICAL DATA
PWP0016A

MXA16A (Rev A)

www.ti.co
m
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