Experiment# 6 Decoder & Multiplexer Circuits
Experiment # 6
7segment Decoder, and Multiplexer circuits
OBJECTIVES
1. Understanding the construction and operational principles of digital BCD-
to-7segment decoder, and Multiplexer circuits.
2. Understanding how to implement functions using multiplexers.
BACKGROUND
BCD-to-7segment decoder
the idea of a seven-segment indicator for representing decimal numbers. Each
segment of a seven-segment display is a small light-emitting diode (LED) or
liquid-crystal display (LCD), and - as is shown below - a decimal number is
indicated by lighting a particular combination of the LED's or LCD's elements:
Binary-coded-decimal (BCD) is a common way of encoding decimal numbers
with 4 binary bits as shown below:
Decimal digit 0 1 2 3 4
BCD code 0000 0001 0010 0011 0100
Decimal digit 5 6 7 8 9
BCD code 0101 0110 0111 1000 1001
One of your jobs for this lab is to design and test a circuit to convert a 4-bit BCD
signal into a 7-bit control signal according to the following figure and table:
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Experiment# 6 Decoder & Multiplexer Circuits
Truth-table
b3 b2 b1 b0 a b c d e f g
0000 1111110
0001 0110000
0010 1101101
0011 1111001
0100 0110011
0101 1011011
0110 0011111
0111 0001111
1000 1111111
1001 1110011
Fig. 6.1: BCD-to-7segment decoder device
Notice that the truth-table corresponds to a seven-segment device whose display
elements are active high. That is, each element will be active when its
corresponding input is '1', the 7448 IC is of this type. There is another type of
seven-segment device whose display elements are active low, That is, each
element will be active when its corresponding input is '0', the 7447 IC is of this
type .
Multiplexer Circuit
Multiplexer, or MUX, is a logic circuit that select and route any number of
inputs to single output. One of the multiple inputs is selected by the selector
inputs and routed to the single output. The number of selector inputs
determines the capacity of multiplexer. For example, if a certain MUX has
only one selector input, it is referred as a “2 line-to-1 line MUX” because one
selector can only select one from two inputs. A MUX with 3 selector inputs is
called “8 line-to-1 line MUX”, since 3 selectors a capable of selecting an
output from 8 inputs (23=8). MUX is also referred to as “Data Selector”
because it selects one output from many inputs.
Function expression, such as F(CBA)=∑ (0, 1, 2, 6, 7), can be easily executed
on MUX. Refer to the 4 line-to-1 line MUX in fig.6.2, the output is
determined by states selectors A, Band input C. When CBA=000, 001,010,
110, 111 the output F is1. In all other states F=0.
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Experiment# 6 Decoder & Multiplexer Circuits
Fig.6.2
PRELAB:
BCD-to-7segment decoder
1. Use data sheet to draw the schematic (pin diagram) of the 7448 a BCD-to-
7segment decoder and write down its function table.
Multiplexer
2. Design a 2 to one multiplexer using NAND gates only. Write down truth
table and Boolean expression for the output. Draw the circuit connection in
both logic diagram and pin diagram. Use the symbols for the two inputs as I0,
and I1, and the selection line as S, and the output as Y.
3. Use data sheet to draw the schematic (pin diagram) of the 74151 an 8 to 1
MUX and write down its function table.
4. Implement the function F= Σ(0,2,4,5,7,8,10,11,15) using 74151 MUX. Show
necessary connections in block (symbol) diagram, use A,B,C,D as inputs
where D is the most significant bit. Derive the truth table for F.
EQUIPMENTS REQUIRED
KL-31001 trainer kit, Module KL-3300, and KL-33006.
PROCEDURES:
Part I: BCD-to-7segment decoder
a) Connect inputs A, B, C, D of U5 (7448) on block b of module KL-33005
to Data Switches SW3, SW2, SW1, SW0 respectively.
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Experiment# 6 Decoder & Multiplexer Circuits
b) Connect the outputs a, b, c, d, e, f, and g to the seven segment display
inputs.
c) Connect the input (LT) to DIP1(0) and set it to logic 1. Follow the input
sequences for D, C, B, A in Table 7.1 and record outputs of the 7-segment
display. Compare your results with the function table of the 7448 in your
prelab.
INPUTS 7- Segments Display
D C B A a b c d e f g number
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
Table 7.1
d) Set the input (LT) to logic 0. is there any different from step b?
Part II: Constructing a 2-to-1 Multiplexer
a) Construct the circuit of 2 to 1 MUX you designed in your prelab, connect
inputs I0 and I1 to SW0, and SW1 respectively. Connect the selection line
S to SW3, and output Y to L0. Fill down the truth table below and
compare it with the one you have in your prelab.
S I0 I1 Y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
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Experiment# 6 Decoder & Multiplexer Circuits
Part III: Constructing an 8 to 1 Multiplexer Circuit with TTL IC
a) U6 (74151) on block f of module KL-33006 will be used in this part of the
experiment.
b) Connect inputs DOD7 to DIP Switch 1.01.7; inputs C, B, A to DATA
Switches SW2, SWI, SWO. Connect the strobe input to SW3. Verify the
function table of 74151 you drawn in your prelab.
Part IV: Using Multiplexers to create functions
a) Use block f of module KL-33006 to build the circuit you have
implemented in your prelab step 4.
b) Connect inputs D, C, B, A to Data Switches SW3, SVV2, SWI, SWO
respectively. Connect output Y to Logic Indicator L0. Follow the input
sequences and verify the truth table of the function F you have derived in
your prelab.
