Berkeley

Two-Ports and Power Gain

Prof. Ali M. Niknejad

U.C. Berkeley
Copyright © 2023 by Ali M. Niknejad

February 24, 2025

1 / 51
Power Gain

2 / 51
Power Gain
Pin PL
YS
+
Y11 Y12
vs YL
Y21 Y22
−

Pav,s Pav,l

We can define power gain in many different ways. The power gain Gp is defined
as follows
PL
Gp = = f (YL , Yij ) ̸= f (YS )
Pin

We note that this power gain is a function of the load admittance YL and the
two-port parameters Yij .

3 / 51
Derivation of Power Gain

The power gain is readily calculated from the input admittance and voltage gain

|V1 |2
Pin = ℜ(Yin )
2

|V2 |2
PL = ℜ(YL )
2
2
V2 ℜ(YL )
Gp =
V1 ℜ(Yin )

|Y21 |2 ℜ(YL )
Gp = = f (Yi,j , YL )
|YL + Y22 |2 ℜ(Yin )

4 / 51
Is Gp a complete picture of power gain?
Pin PL
YS
+
Y11 Y12
vs YL
Y21 Y22
−

Pav,s
Zin ↔ ρ

Notice that Gp is the power gain normalized to the input power. That seems
natural, but consider the following situation:
Pin = (1 − |ρ|2 )Pavs

The input power is the available power from the source minus the “reflected”
power. In other words, if we have a mismatched input, (ρ ∼ 1) the output power
might be very low:
PL = Pin Gp = (1 − |ρ|2 )Pavs ≈ 0
5 / 51
Review: Maximum Power Transfer Theorem
ZS

Suppose that a voltage source with a given (fixed)

vs ZL source impedance ZS is connected to a load ZL .
What is the maximum power we can extract from
the source given that we can choose any (passive)
load ?
Fixed Source
The solution is easily derived and the optimum load is the conjugate matched
load:
ZL,opt = ZS∗

Under a matched condition, the power available from the source is the maximum
available power:
|VS |2
Pav ,S = PL |ZL =ZL,opt =
8ℜ(ZS )
6 / 51
Power Gain (part 2)

The available power gain is defined as follows

Pav ,L
Ga = = f (YS , Yij ) ̸= f (YL )
Pav ,S

The available power from the two-port is denoted Pav ,L whereas the power
available from the source is Pav ,S .
Finally, the transducer gain is defined by
PL
GT = = f (YL , YS , Yij )
Pav ,S

This is a measure of the efficacy of the two-port as it compares the power at the
load to a simple conjugate match.

7 / 51
Derivation of Available Gain

IS Y11 Y12
YS Ieq Yeq
Y21 Y22

To derive the available power gain, consider a Norton equivalent for the two-port
where (short port 2)

−Y21
Ieq = −I2 = Y21 V1 = IS
Y11 + YS

The Norton equivalent admittance is simply the output admittance of the two-port
Y21 Y12
Yeq = Y22 −
Y11 + YS

8 / 51
Available Gain (cont)

The available power at the source and load are given by

|IS |2 |Ieq |2
Pav ,S = Pav ,L =
8ℜ(YS ) 8ℜ(Yeq )

2
Ieq ℜ(YS )
Ga =
IS ℜ(Yeq )

2
Y21 ℜ(YS )
Ga = = f (Yi,j , YS )
Y11 + YS ℜ(Yeq )

9 / 51
Transducer Gain Derivation
The transducer gain is given by
1 2
PL ℜ(YL )|V2 |2 V2
GT = = 2 |I |2 = 4ℜ(YL )ℜ(YS )
Pav ,S S IS
8ℜ(YS )

We need to find the output voltage in terms of the source current. Using the
voltage gain we have and input admittance we have
V2 Y21
=
V1 YL + Y22

IS = V1 (YS + Yin )

V2 Y21 1
=
IS YL + Y22 |YS + Yin |

10 / 51
Transducer Gain (cont)

Y12 Y21
|YS + Yin | = YS + Y11 −
YL + Y22

We can now express the output voltage as a function of source current as

2
V2 |Y21 |2
=
IS |(YS + Y11 )(YL + Y22 ) − Y12 Y21 |2

And thus the transducer gain

4ℜ(YL )ℜ(YS )|Y21 |2

GT = = f (Yi,j , YS , YL )
|(YS + Y11 )(YL + Y22 ) − Y12 Y21 |2

11 / 51
Power Gain in Other Two-Port Parameters

4ℜ(YL )ℜ(YS )|Y21 |2

GT =
|(YS + Y11 )(YL + Y22 ) − Y12 Y21 |2
4ℜ(ZL )ℜ(ZS )|Z21 |2
GT = = f (Zi,j , ZS , ZL )
|(ZS + Z11 )(ZL + Z22 ) − Z12 Z21 |2

It’s interesting to note that all of the gain expression we have derived are in the
exact same form for the impedance, hybrid, and inverse hybrid matrices.
This is true since power is a product of current and voltage, so by duality, if we
replace voltage with current and current with voltage, we end up with the same
expressions.

12 / 51
Which Power Gain is Best?

Like most things in life, there’s no “best” definition of power gain. It all depends
on your perspective.
If you’re trying to design a low noise amplifier, it turns out that you are very much
concerned about the source impedance, and so Ga is a convenient gain to consider.
On the other hand, if you’re concerned with a power amplifier, the load is the key
parameter as it determines both power gain and efficiency, so Gp is very
convenient.
Transducer power gain is most relevant when you have freedom to optimize both
the source impedance.
But as far as optimizing the power gains is concerned, we’ll shortly show that all
three roads lead to the same result !

13 / 51
Maximum Power Gain and the Bi-Conjugate Match

14 / 51
Comparison of Power Gains

In general, PL ≤ Pav ,L , with equality for a matched load. Thus we can say that

GT ≤ Ga

The maximum transducer gain as a function of the load impedance thus occurs
when the load is conjugately matched to the two-port output impedance
∗ )
PL (YL = Yout
GT ,max,L = = Ga
Pav ,S

15 / 51
Comparison of Power Gains (cont)

Likewise, since Pin ≤ Pav ,S , again with equality when the the two-port is
conjugately matched to the source, we have

GT ≤ Gp

The transducer gain is maximized with respect to the source when

GT ,max,S = GT (Yin = YS∗ ) = Gp

16 / 51
Bi-Conjugate Match
When the input and output are simultaneously conjugately matched, or a
bi-conjugate match has been established, we find that the transducer gain is
maximized with respect to the source and load impedance

GT ,max = Gp,max = Ga,max

This is thus the recipe for calculating the optimal source and load impedance in to
maximize gain
Y12 Y21
Yin = Y11 − = YS∗
YL + Y22
Y12 Y21
Yout = Y22 − = YL∗
YS + Y11

Solution of the above four equations (real/imag) results in the optimal YS,opt and
YL,opt .
17 / 51
Calculation of Optimal Source/Load
Another approach is to simply equate the partial derivatives of GT with respect to
the source/load admittance to find the maximum point
∂GT
=0
∂GS
∂GT
=0
∂BS
∂GT
=0
∂GL
∂GT
=0
∂BL

Again we have four equations. But we should be smarter about this and recall
that the maximum gains are all equal. Since Ga and Gp are only a function of the
source or load, we can get away with only solving two equations.
18 / 51
Calculation of Optimal Source/Load
Working with available gain

∂Ga
=0
∂GS
∂Ga
=0
∂BS
∗ we can find the Y
This yields YS,opt and by setting YL = Yout L,opt .
Likewise we can also solve

∂Gp
=0
∂GL
∂Gp
=0
∂BL

And now use YS,opt = Yin∗ .

19 / 51
Optimal Power Gain Derivation
Let’s outline the procedure for the optimal power gain. We’ll use the power gain
Gp and take partials with respect to the load. Let
Yjk = gjk + jbjk Y12 Y21 = P + jQ = Le jϕ

YL = GL + jBL |Y21 |2
Gp = GL
D

ℜ(Y12 Y21 (YL + Y22 )∗ )

 
Y12 Y21
ℜ Y11 − = m11 −
YL + Y22 |YL + Y22 |2

D = g11 |YL + Y22 |2 − P(GL + g22 ) − Q(BL + b22 )

∂Gp |Y21 |2 GL ∂D
=0=−
∂BL D 2 ∂BL

20 / 51
Optimal Load (cont)
Solving the above equation we arrive at the following solution
Q
BL,opt = − b22
2g11

In a similar fashion, solving for the optimal load conductance

1
q
GL,opt = (2g11 b22 − P)2 − L2
2g11

If we substitute these values into the equation for Gp (lot’s of algebra ...), we
arrive at
|Y |2
Gp,max = p 21
2g11 g22 − P + (2g11 g22 − P)2 − L2

21 / 51
Final Solution
Notice that for the solution to exists, GL must be a real number. In other words
(2g11 g22 − P)2 > L2 (2g11 g22 − P) > L

2g11 g22 − P
K= >1
L

This factor K plays an important role as we shall show that it also corresponds to
an unconditionally stable two-port. We can recast all of the work up to here in
terms of K
√
Y12 Y21 − 2ℜ(Y11 )ℜ(Y22 ) + |Y12 Y21 |(K + K 2 − 1)
YS,opt = −jℑ(Y11 ) +
2ℜ(Y22 )
√
Y12 Y21 − 2ℜ(Y11 )ℜ(Y22 ) + |Y12 Y21 |(K + K 2 − 1)
YL,opt = −jℑ(Y22 ) +
2ℜ(Y11 )
Y21 1
Gp,max = GT ,max = Ga,max = √
Y12 K + K 2 − 1
22 / 51
Stability of a Two-Port

23 / 51
Stability of a Two-Port
A two-port is unstable if the admittance of either port has a negative conductance
for a passive termination on the second port. Under such a condtion, the two-port
can oscillate.
Consider the input admittance:
Y12 Y21
Yin = Gin + jBin = Y11 −
Y22 + YL

Using the following definitions:

Y11 = g11 + jb11 Y12 Y21 = P + jQ = L∠ϕ

Y22 = g22 + jb22 YL = GL + jBL

Now substitute real/imag parts of the above quantities into Yin

P + jQ
Yin = g11 + jb11 −
g22 + jb22 + GL + jBL
24 / 51
Input Conductance
Taking the real part, we have the input conductance
P(g22 + GL ) + Q(b22 + BL )
ℜ(Yin ) = Gin = g11 −
(g22 + GL )2 + (b22 + BL )2
P Q
(g22 + GL )2 + (b22 + BL )2 − g11 (g22 + GL ) − g11 (b22 + BL )
=
D

Since D > 0 if g11 > 0, we can focus on the numerator. Note that g11 > 0 is a
requirement since otherwise oscillations would occur for a short circuit at port 2.
The numerator can be factored into several positive terms
P Q
N = (g22 + GL )2 + (b22 + BL )2 −
(g22 + GL ) − (b22 + BL )
g11 g11
2  2
P2 + Q2
  
P Q
= GL + g22 − + BL + b22 − − 2
2g11 2g11 4g11
25 / 51
Input Conductance (cont)
Now note that the numerator can go negative only if the first two terms are
smaller than
 the last term. To minimize the first two terms, choose GL = 0 and
BL = − b22 − 2gQ11 (reactive load)

P 2 P2 + Q2
 
Nmin = g22 − − 2
2g11 4g11

And thus the above must remain positive, Nmin > 0, so

2
P2 + Q2

P
g22 + − 2
>0
2g11 4g11

P +L L
g11 g22 > = (1 + cos ϕ)
2 2

26 / 51
Linvill/Llewellyn Stability Factors
Using the above equation, we define the Linvill stability factor

L < 2g11 g22 − P

L
C= <1
2g11 g22 − P

The two-port is stable if 0 < C < 1.

It’s more common to use the inverse of K = 1/C as the stability measure

2g11 g22 − P
K= >1
L

27 / 51
Stability (cont)

The above definition of stability is perhaps the most common

2ℜ(Y11 )ℜ(Y22 ) − ℜ(Y12 Y21 )

K= >1
|Y12 Y21 |

The above expression is identical if we interchange ports 1/2. Thus it’s the
general condition for stability.
Note that K > 1 is the same condition for the maximum stable gain derived
earlier. The connection is now more obvious. If K < 1, then the maximum gain is
infinity!

28 / 51
Maximum Gain

The maximum gain is usually written in the following insightful form

Y21 p
Gmax = (K − K 2 − 1)
Y12

For a reciprocal network, such as a passive element, Y12 = Y21 and thus the
maximum gain is given by the second factor
p
Gr ,max = K − K 2 − 1

Since K > 1, |Gr ,max | < 1. The reciprocal gain factor is known as the efficiency of
the reciprocal network.
The first factor, on the other hand, is a measure of the non-reciprocity.

29 / 51
Maximum Stable Gain
We have seen that for a stable two port, K > 1 and the maximum stable gain is
well defined:
Y21 p
Gmax = (K − K 2 − 1)
Y12

The peak value occurs when K = 1, which is the boundary of stability. At this
value, define
Y21
GMSG = Gmax |K =1 =
Y12

The larger K , the more gain we give up compared to GMSG . If the two-port in
inherently stable, then this is not something under our control. But what if the
two-port is unstable?
Since K < 1, the above equation is not valid. We actually know that for an
unstable two-port, the maximum gain is infinity. In this case the output can be
non-zero for a zero source, which implies infinite gain (it’s basically an oscillator).
30 / 51
Stabilizing An Amplifier

When a two-port is not unconditionally stable, we can still build an amplifier with
it by carefully choosing the source and load. This is something we will learn about
in 242B. For now, suppose that we wish to make an amplifier unconditionally
stable. How can we do this ? It’s simple, you just need to add loss to the system.
This can come in the form of series or shunt resistors, or even feedback resistors
used to stabilize the bias.
Even in the stable case, if K is close to unity, we may find that over
process/temperature variations there’s a chance for instability. In this case, we
may intentionally add loss to the two-port to make it more stable and robust,
giving up some gain.

31 / 51
Stabilizing An Amplifier (cont)
(Yout ) < 0S
(Yout ) > 0S

Y11 Y12
Gloss
Y21 Y22

Note that if Yin has an imaginary part, we simply can add a shunt resistor to
make it stable and to create a new unconditionally stable two-port:
ℜ(Yin′ ) = ℜ(Yin ) + Gloss > 0S

Gloss > |ℜ(Yin )|

Keep in mind that the K factor (and the Y parameters) are a function of bias,
temperature, and frequency. An unconditionally stable amplifier needs to be stable
under all conditions. You need to plot K versus frequency to ensure this is true. 32 / 51
Gmax Plot
100
"fetsparam.gain" using 1:2
"fetsparam.gain" using 1:4

K<1 K>1

10
GM SG
U

Gmax

1
1e+11
fmax

The maximum gain of a device is then dependent on the value of K . For K < 1,
the maximum gain is obtained by stabilizing the device and is given by MSG . For
K > 1, the maximum gain is given by the expression presented above.
U is the maximum unilateral gain, something we’ll soon cover.
33 / 51
Unilateral Maximum Gain
For a unilateral network, the design for
YS maximum gain is trivial. For a
bi-conjugate match
+
Y11 0
vs YL ∗
Y21 Y22 YS = Y11
−

Y12 = 0S ∗
YL = Y22

|Y21 |2
GT ,max =
4g11 g22

An interesting idea is to somehow make a two-port unilateral by using

feedback/feedforward, in other words a feed a signal that can cancel the feedback
signal. We’ll return to this concept later.
34 / 51
Ideal MOSFET

+
Cgs vin gm vin ro Cds
−

The AC equivalent circuit for a MOSFET at low to moderate frequencies is shown

above. Since |S11 | = 1, this circuit has infinite power gain. This is a trivial fact
since the gate capacitance cannot dissipate power whereas the output can deliver
real power to the load.

35 / 51
Real MOSFET
Ri Ri

+ +
vs Cgs vin gm vin R ds Cds R ds
− −

A more realistic equivalent circuit is shown above. If we make the unilateral

assumption, then the input and output power can be easily calculated. Assume we
conjugate match the input/output
The most common figure of merit for a transistor high frequency performance is
the maximum frequency of oscillation, fmax , or equivalently, the highest frequency
that we can obtain power gain from a transistor.
Include gate resistance and neglect Cµ (for simplicity), and due to the unilateral
nature (Y12 = 0) we can simply find the maximum gain by impedance matching
the source and load directly
36 / 51
The Maximum Unity Power Gain Frequency (fmax )
 ∗
1
ZS = Zin∗ = Rg + = Rg + jωLs (1)
jωCgs
∗
YL = Yout = (Go + jωCds )∗ = Go + jωLd (2)

Under such bi-conjugate matched conditions, we have

|VS |2
Pavs =
8Ri
2
gm V1
PL = ℜ( 12 IL VL∗ ) = 1
2 Rds
2
2
2 V1
GTU,max = gm Rds Ri
VS
37 / 51
Real MOSFET (cont)
At the center resonant frequency, the voltage at the input of the FET is given by
1 VS
V1 =
jωCgs 2Ri

Rds (gm /Cgs )2

GTU,max =
Ri 4ω 2

This can be written in terms of the device unity gain frequency fT

1 Rds fT 2
 
GTU,max =
4 Ri f

The above expression is very insightful. To maximum power gain we should

maximize the device fT and minimize the input resistance while maximizing the
output resistance.
38 / 51
fmax for Ideal Transistor
Taking the ratio, and noting that gm /Cgs ≈ ωT , we have a simple expression for
the power gain
 ω 2 R 1
T ds
PL = v2 (3)
ω Ri2 32 s
 
PL 1 Rds  ωT 2
Gp = = (4)
Pin 4 Ri ω

Now we are in a position to find the maximum frequency fmax for which the
transistor provides power gain
fT 2
  
1 Rds
Gp = 1 = (5)
4 Ri fmax
s r
fT Rds fT ro
fmax = = (6)
2 Ri 2 Ri
39 / 51
Gate Resistance

e
at
Rg
Rsrc Rdrn
Rchannel

Despite the simplicity of our transistor model, this equation is very insightful as it
connects the maximum power gain to the device fT , or unity gain frequency. This
affirms our faith in fT as an important metric for RF and analog circuits, but it
also shows that fT is not the complete story. The device fmax may in fact be
larger than fT if the ratio of output resistance ro is a large factor bigger than the
device input resistance Ri . 40 / 51
Limit for fmax
Ri depends on the gate polysilicon resistance and the channel resistance as seen
from the gate terminal (gate AC current travels through the gate oxide and flows
out through the channel and into the source and drain terminals). In the limit, if
we layout the device with many fingers to minimize the physical gate resistance,
only the channel resistance contributes to Ri
1
Ri ≈ (7)
5gm

An ideal FET with no Cµ and gate resistance coming only from the channel:
s
fT ro fT p fT p
fmax = 1
= 5g m ro = 5A0 (8)
2 5g
2 2
m

Since for any respectable transistor A0 > 1, we have that fmax > fT .
41 / 51
fmax for Practical Transistor
Source Gate Drain

L
WF
Rg

Cgso Cgdo
Cgs
Rs Ids Rd

Csb gds Cdb

Rsb Rbb Rdb

p-sub

Bulk

fT
fmax ≈ p (9)
2 Rg (gm Cgd /Cgg ) + (Rg + rch + Rs ) gds

This equation highlights the importance of minimizing the loss in the device, such
as the drain/source resistance Rs , Rd , and the gate resistance Rg (part of Ri in
our hybrid-pi model, the rest coming from rch ). Check limit as Cgd = 0F.
42 / 51
Can we just cancel Cµ with an Inductor?
−iµ
−
Cn vo
+
C∞ +
iµ
vo
−iµ iµ
−

In RF circuits we can neutralize this capacitance by connecting an inductor Lµ in

parallel to resonate it out at any given frequency and over a narrow bandwidth. In
differential circuits, we can neutralize the capacitance with a cross-coupled
matching capacitor. In fact, is the optimal Lµ the value that completely cancels
the capacitance? This question can be answered in a very general way by
consideration of the Unilateral Gain.
43 / 51
Differential Neutralization
vd

µ
ωC
+

d ))j
−vd

−v
−(
ω Cµ 2Cmu
− v d)j

(vg
(v g
vg

Notice that in a differential circuit, the drain voltage with opposite polarity is
available for “free” using the other side of the diff pair. In a single-ended
amplifier, a transformer can invert the polarity of the input.
The additional feedback current cancels out with the original internal feedback
due to Cµ . From this perspective, it’s a feedforward current.
The net result is an increase in the input capacitance to 2Cµ , but a cancellation of
the feedback capacitor Cµ .
44 / 51
Model for Neutralization 93

gg C gs V gs 2 g mV gs 2 g ds Cds

d1 d2 C gd
Lg Ld

Cn k k M = k Lg Ld
Cn

Lg C gd Ld
g1 g2

gg C gs V gs 1 g mV gs 1 g ds Cds

Figure 5.3: The differential-mode small-signal model of the proposed layout structure
In practice, the inmutual
Fig. 5.2. inductance between the lines is small and can be ignored.
With this simplifying assumption, the MSG is given by
Power Gain [dB]

M SG
s G max
(n , G ) 1 max1
g 2 (n , G ) 2 max2
U m
MSG = 2
(1, U )
2
+ 1
ω (Cgd − Cn )
0
0 n1 1 n2 2
n = C /C
Ref: Zhimingn Deng’s
gd
dissertation.
tor K

K = 1@n1 < 1
K = 1@n2 > 1 45 / 51
Stability of Neutralization

Since neutralization is a feedback operation, we have to examine the stability

carefully. The stability factor is given by
 
2gg gds
K = 1+ 2 · MSG −1
ω (Cgd − Cn )2

For K < 1, the maximum gain is just MSG . If we completely neutralize, we

eliminate the feedback and the system becomes unilateral. Let’s call this gain U
2
gm
U = Gmax|Cn =Cgd =
4gg gds

46 / 51
 Figure 5.3: The differential-mode small-signal model of the proposed layout structure
Maximum Obtainable
in Fig. 5.2. Gain with Neutralization

Power Gain [dB]

M SG
Gmax
(n1 , Gmax1 )
(n2 , Gmax2 )
U (1, U )

0
0 n1 1 n2 2
n = Cn /Cgd

Stability Factor K
K = 1@n1 < 1
K = 1@n2 > 1

0 n1 1 n2 2
n = Cn /Cgd

Figure 5.4: MSG, Gmax and the stability factor K vary with neutralization capacitor
The plots above show
Cn (Mutual the power
inductance gain relative to the amount of neutralization,
M ignored).
n = Cn /Cgd . As discussed previously, when n = 1, we unilaterize the device and
obtain a gain of U. But it seems that we can obtain even higher gain, in
particular two values of n result in K = 1 and higher gain.
47 / 51
Neutralization and Gmax
Therefore U is not the maximum gain (this is a common mistake people make).
Recall that with some positive feedback (loop gain less than 1), we can obtain
higher gain.
The peak gain happens when K = 1 (conditionally stable) and this occurs for two
values of n = Cn /Cgd r
1 gg gds
n =1±
ωCgd U − 1

For these values of n, which we call the optimal under- and over-neutralized
designed, the maximum gain is given by

Gmax = 2U − 1

Can we do even better ?

48 / 51
Mason’s Unilateral Gain U
four-port Y0
loss-less

Ia,1 I1 I2 Ia,2
+ + + +

Va,1 V1 Y V2 Va,2

− − two-port − −

One of the most important metrics in high frequency transistor characterization is

U, or Mason’s Unilateral Gain. The definition of U is the power gain for a
two-port under a general 4-port lossless embedding shown. The idea is to provide
lossless “feedback” to unilaterize the two-port, and then under these conditions U
is the gain we obtain from the two-port
|Y21 − Y12 |
U= (10)
4(ℜ(Y11 )ℜ(Y22 ) − ℜ(Y12 )ℜ(Y21 )) 49 / 51
Properties of U

The U function has several important properties:

1 If U > 1, the two-port is active. Otherwise, if U ≤ 1, the two-port is passive.
2 U is the maximum unilateral power gain of a device under a lossless reciprocal
embedding.
3 U is the maximum gain of a three-terminal device regardless of the common
terminal.
These properties have contributed to the widespread use of U as a metric to test
a transistor power gain
We find that the less loss there is in a device, the more gain we can extract, in
stark contrast to MSG , which in fact requires us to add loss to stabilize the device
when K < 1.

50 / 51
Is U the gain limit?

Is U the maximum possible power gain we can obtain?

In fact it is not the maximum, and as we’ve seen, through neutralization we can
get a power gain as high as ∼ 2U, and in general one can show that the gain can
be as high as ∼ 4U.
p
Gmax = 2U − 1 + 2 U(U − 1) ≈ 4U

Link: Niknejad, Ali, and Siva Thyagarajan. “Maximum Achievable Gain of a Two
Port Network.” (2016). Berkeley Reports (UCB/EECS-2016-15)

51 / 51