522 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-17, NO.

3, JUNE 1982

Adaptive Biasing CMOS Amplifiers

MARC G. DEGRAUWE, JOZEF RIJMENANTS, ERIC A. VITTOZ, MEMBER, IEEE, AND HUGO J. DE MAN, MEMBER, IEEE

Abstract–Two transconductance amplifiers are presented in which

the concept of an input dependent bias current has been introduced.
As a result, these amplifiers combine a very low standby power dissipa-
tion with a high driving capability. The first amplifier, suited for SC
.13E2!!Lv+
I& $JN+ 4n

W
OUT
filters, is fairly small (0.075 mm2 ) and has a slew rate which is more IPI 1I,ut
than an order of magnitude better than micropower amplifiers pre-
CL
sented earlier. The second amplifier can be used as a micropower “_
buffer. Nearly the whole supply current is used to charge the load ca-
pacitor so that this amplifier has a high efficiency. Fig. 1. Basic transconductance amplifier.

The gain-bandwidth product (GBW) of the amplifier is given

1. INTRODUCTION
by (1), where gm is the sum of the transconductances of the
N recent years much effort has been made to reduce the
I power dissipation
amplifiers
of amplifiers. The reported micropower
using classical schemes [1] - [3] have good small sig-
input transistors,
ond and the first
b is the ratio between
stage, and Cl is the load capacitor
the current in the sec-

nal characteristics but their slew rate is too small for many ap- GBW=gm .b/4. n.C1. (1)
plications. Therefore, dynamic amplifiers were introduced. When the input transistors are operating in the weak inver-
Some of them [4] - [6] are based on a simple inverter. They sion region the largest transconductance for a given current is
are not generally applicable since they are not differential. reached [7] . Under these conditions the maximum achievable
Other dynamic amplifiers [5] are based on classical op amp GBW for a given current is obtained as well as the maximum
schemes where the tail current source was replaced by a pulsed possible gain [1] . The GBW is then given by (2)
current source.
This paper presents two amplifiers, the bias current of which GBW=b”lP/(n 4-n” Cl” VT) (2)
is made signal dependent so that the power consumption is re-
where n = slope factor in weak inversion
duced further.
Section II describes the characteristics of a basic transcon- VT=k” T/q.
ductance amplifier (OTA) on which the adaptive biasing ampli-
The slew rate (SR) of the amplifier is given by (3)
fiers are based. In Sections III and IV these amplifiers are
described and experimental results are given. SR = b “IPIC1. (3)

By eliminating the current from (2) and (3), the relationship

II. THE TRANSCONDUCTANCE AMPLIFIER AND
between SR and GBW is obtained in (4). An amplifier with a
ITS LIMITATIONS
GBW of 500 kllz will thus have a slew rate of only 300 mV/#s
The transconductance amplifier (presented in Fig. 1) con-
sists of a differential input stage and a double to single ended SR=4. m.rZ. VT. GBW
output stage.
s 600 mV” GBW. (4)
This OTA has two important poles: the dominant pole,
formed by the high output impedance and a load capacitor, This means that the amplifier cannot handle large signals as
and the second pole formed by the transconductance of the fast as small signals.
load transistors of the input stage and the internal capacitors. Note that (4) has also been given by Solomon [8] for bi-
The ratio between the two poles is mainly determined by the polar amplifiers where n = 1. To increase the slew rate in those
capacitive load and the ratio of the currents in the first and amplifiers, and keeping the GBW constant, the gn/IP ratio is

second stage. As will be discussed below, in order to obtain decreased [9], [10] . In MOS amplifiers this can easily be

enough phase margin for small capacitive loads this current done by using the input transistors in strong inversion. How-

ratio should be close to unity. ever, this solution is not satisfactory for micropower applica-
tions where one wants to have the maximum GBW with the

Manuscript received October 13, 1981. This work was supported in minimal possible current.
part by IWONL, Belgium, and also by Magnavox, USA. Since the slew rate is caused by the fact that the tail current
M. G. Degrauwe, J. Rijmenants, and H. J. De Man are with Katholieke source is limited, the slew rate can be improved by using a tail
Universiteit Leuven, ESAT Laboratory, Heverlee, Belgium.
E. A. Vittoz is with the Centre Electronique Horloger S.A., Neuch&el, current source, the current of which increases as the distur-
CH-2000 Switzerland. bance of the virtual ground becomes larger. This principle

0018 -9200/82/0600 -0522 $00.75 @ 1982 IEEE

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DEGRAUWE et al.: ADAPTIVE BIASING CMOS AMPLIFIERS 523

then leads to the so-called adaptive biasing amplifier of which 12 A.(12-1,)

two possible realizations are discussed in Sections 111 and IV. I I

III. DIFFERENTIAL FEEDBACK AMPLIFIER i!_bE!4

A. Principle Fig. 2. Current subtracter realizing A . (12 -11).

When a voltage is applied across the inputs of the OTA (Fig.

,,+
v
1) the currents II and 12 become different. The bias current
M8 ,+MILL , M5
of the amplifier is made signal dependent by adding an addi-
tional current source to the main tail current source which re-
1P
—.—
alizes A -111-121. “A” will be called the current feedback +n
1----” :
factor. The additional current source is realized by two sub- OUT
tracters (Fig. 2).
Only if Iz becomes larger than 11, will the subtracter draw a
current A “ (12 - ll). O@erwise the subtracter keeps drawing
zero current. I ~
I
By putting the subtracters in the scheme of the simple OTA, Fig. 3. Differential feedback amplifier.
where the currents at the inputs of the subtracters are pro-
vided by means of current mirrors, we obtain the circuit in Iryj/Ip
Fig. 3, which we define as a differential feedback amplifier. 2

If there is no disturbance at the virtual ground, the currents A.2

11 and 12 are equal and the total bias current is thus 1P. When
a signal is applied, the total bias current will be 1P + A .111 - Iz 1.

B. Available Output Current

By using the current formula for the weak inversion region 1-
proposed by Vittoz and Fellrath [11] and by applying
Kirchhoff’s current law, (5) and (6) can be derived. fin is the
voltage across the inputs of the amplifier (V& = fi~ - fi~).

11 = Iz . exp (~n/(n . VT)) (5)

0
1P . exp (fifl/(rt “ VT)) 0 1 2
(6) Vinl nVT
11= (A+ 1)- (A - 1) “ exp (~n/(n ~VT))”
Fig. 4. Calculated output current versus input signal.
The current flowing in the load capacitor (lOUt) is b times
determined by the beta’s of the transistors and the supply
the difference between II and 12, This current can be calcu-
voltage.
lated from (5) and (6) and is given in (7)

C. Effects of Mismatch
1P” (exp (Kn/(n - VT))- 1)
1 (7) The previous analysis was based on ideally matched sub-
0’”= (A + 1) - (A - 1). exp (fin/(n “ VT))” b“ ‘
tracters. Now the effect of mismatching in the current mirrors
Fig. 4 shows the ratio 10Ut/lP as a function of ~~/(n” VzT)’ will be investigated. When taking all possible mismatches into
(b= 1) for different current feedback factors. In Fig. 4 A account the subtractw equations become
equals zero represents the case of the simple OTA. The load
A’ “ (11 - c1 “12)
current cannot become larger than 1P and thus the amplifier
will slew for large input steps. For A between O and 1, the A“ o(12 - C2 . 11),

maximum possible output current is limited to the value of

A‘ and A” are the effective current feedback factors, c1 and C2
lP/(l - A). For a current feedback factor of 0.9 the slew rate
are mismatch factors. For the ease of derivation it will be sup-
improves by a factor 10. If A is larger than unity the maxi-
posed that A’=A’’#Aandcl =C2 =c.
mum load current becomes unlimited, so that the amplifier
For c larger than unity, the current feedback circuit will not
will never slew. The output current tends to infinity for a
operate until the input voltage exceeds the minimum indi-
wel.hknown value of the input signal. This voltage will be
cated by
called the escape voltage and is given in (8).
Vmi~ = -n - Vr “ in (c). (9)
v .,CaPe= n o VT oin ((A + 1)/(A - l)). (8)
For a mismatch of 20 percent (c= 1.2) the input voltage dif-
The current, of course, will not reach infinity. The input ference must be larger than 7 mV before the amplifier starts
transistors will leave the weak inversion region and (7) is no operating in the adaptive mode. This has, however, no effect
longer valid. The maximum possible output current will be on the driving capability of the amplifier since for such a small

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524 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-17, NO. 3, JUNE 1982

TABLE I
MASK DEVICE DIMENSIONSDIFFERENTIALFEEDBACKAMPLIFIER

Dimension Weak-inversion limit

Device WX 2 [pm] P. V$ [nA]

3,4,11,12,13,14 20x 10 20
1,2 120 x 10 264
5,8 60 X 30 20
6.7 60 X 30 44
Fig. 5. Allowed feedback factors versus mismatch. 9,10 10 x 40 5
15, 16, 17, 20, 21,22 14x 18 17
18, 19 28x 18 34
signal the amplifier does not slew. The designer can volun-
tarily introduce a c larger than unity in order to reduce the
distortion of small signals.
For c’s smaller than unity, the steady-state bias current is
modified to

Ibis, = Ip/(l - A’ “(1 - c)). (lo)

For some combinations of the effective current feedback

factor A‘ and the mismatch factor c, the bias current becomes
infinite, which means that the amplifier is dc unstable. The
allowed values of A‘ to insure dc stability are shown in Fig. 5
as a function of the mismatch factor. For a mismatch of 20
percent (c= 0.8), the effective current feedback factor A‘
Fig. 6. Photograph of differential feedback amplifier.
should be smaller than 5.

D. Smbiliry In order to obtain good matching between the current

Since there is no dc current flowing through the transistors mirrors, the layout was made as symmetrical as possible.
ikfl 8 and lkf19, gn,, and gm,, are zero and no current is fed Further, all transistors of a current mirror have 1) the same
back. As a result the small signal scheme of the simple OTA is geometry, 2) the same neighborhood, and 3) the same orien-
obtained but with larger internal capacitance due to the gate tation on the chip. Only the current mirror of the tail current
and overlap capacitance of the transistors Ml 1, ilfl 2, Ml 3, source makes an exception to the last rule.
and kf14. There is no static bias current source provided on chip; the
The amplifier is designed to be stable for small capacitive bias current can therefore be set externally.
loads and to have a gain of 60 dB for 1P = 1 PA. A small signal
analysis shows that for a current ratio b of unity a minimal F. Experimental Results
capacitive load of 5 pF is sufficient for compensation. For In order to measure the escape voltage and the total power
current ratios b larger than one, the dominant pole moves to consumption as a function of the input voltage difference Vi~,
higher frequencies so that a larger capacitive load is needed. the configuration of Fig. 7(a) was used. The measured load
When large steps are applied the nonlinearity of the amplifier current loUt as a function of fin is given in Fig. 8 for 1P = O
becomes important. and V+ - V- = 5 V, For zero Vin, only leakage currents are
Since in nonlinear systems it no longer makes sense to speak flowing through the amplifier. When a voltage difference is
about poles, bode diagram, settling time, etc., the stability of applied, those leakage currents are fed back so that the cur-
the amplifier cannot be studied by using classical tools. It is rent level in the amplifier increases. Once the escape voltage
shown in the Appendix that the system has a single point of of about 40 mV is exceeded, the current level increases very
natural equilibrium to which the system always returns inde- drastically.
pendently of the input signal amplitude. The total supply current, as a function of fin, is represented
in Fig. 9 for three different values of bias current 1P. Biased
E. Layout
at 30 nA, the input transistors are operating in weak inversion.
The amplifier is integrated in a low voltage 5 pm CMOS An input voltage difference of only 50 mV causes the total
technology. The total area is 0.075 mmz, which is comparable current consumption to increase to about 65 I.LA. Then the
to that of state of the art CMOS op amps, and this in spite of input transistors cease to operate in weak inversion so that the
the fact that the adaptive biasing part takes about 20 percent current will increase less than exponentially. For input signals
of the total amplifier area. Table I shows the device dimen- exceeding a few hundred millivolts the total power consumpt-
sions and the corresponding weak inversion limits. Fig. 6 ion becomes almost independent of the bias current 1P. The
shows a photograph of the amplifier. The dimensions of the maximum supply current, determined by the supply voltage
transistors of the subtracter were chosen to minimize the total and the beta’s of the transistors, is about 300 MA. This maxi-
amplifier size. The current feedback factor A of the amplifier mum supply current determines the maximum rate of change
equals 2. of the output voltage.

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DEGRAUWE et al.: ADAPTIVE

f BIASING

v+
CMOS AMPLIFIERS

TABLE II
525

&
SMALL SIGNAL CHARACTERISTICS
I~Up

lP=l PA v ~up’sv
(a) vm ~ OUT
+ Gain 64 dB
7 IOU+
Offset 3.68 mV+4mV
A“- Noise 1 kHz 190 nV/@
10 kHz 60 nV/@
CMRR 62 dB
PSRR V+ 63 dB
v_
44 dB
“SR” (Cload = 470 PF) 0.25 V/I.M
(b) DUT

GBW
Fig. 7. (a) Measurement configuration for obtaining ~~up – Tin curves.

F
[Hz]
(b) Measurement configuration for determining ac characteristics.
1P=3PA
>IP=IPA
IOU+ [PAI IP=0.3PA
0.1-- lOOkI
o 0.5 1.0 5
vi” [Vp+-pl

Fig. 10. Measured –3 dB breakpoint as a function of input amplitude

0.05..
(unity gain feedback).
IP=O
Measured values of the most important small signal charac-
o
teristics of the amplifier are listed in Table II. The negative
0 40
Vin
power supply rejection ratio can be improved by putting the
[mVl input transistors in a separate p-well and by using an on-chip
-0.05- bias current source which is independent of the supply voltage.
Fig. 10 shows the gain-bandwidth product of the amplifier
as a function of the amplitude of the sine wave input signal.
-0.1- The -3 dB breakpoint frequency was measured using an os-
cilloscope, so these figures must be interpreted carefully since
they include the higher harmonics of the output signal. How-
Fig. 8. Measured output current for 1P = O.
ever, one can see that the gain-bandwidth product increases
with the amplitude of the input signal up to a certain maxi-
‘r%~
.. mum. This maximum occurs when the maximum current is
flowing through the amplifier. For a classical fixed bias cur-
10-4,
rent amplifier, the gain-bandwidth product decreases with in-
creasing input amplitude.

IV. DIRECT FEEDBACK AMPLIFIER

10+ ,
The direct feedback amplifier is designed to be used as a
micropower buffer for large capacitive loads. The design is
made so that nearly the whole supply current is used to charge
10-6- the load capacitor.

A. Principle
Fig. 11(a) represents the scherhe of the amplifier. Thick lines
show the simple transconductance amplifier discussed above.
The amplifier is split up in two symmetrical parts. Then,
Fig. 9. Supply current as a function of the input signal. without making a subtraction, @ each input stage the current
of one branch is directly fed back to the tail current source.
With the amplifier connected in voltage follower configura- When the differential input voltage ~n equals zero, the cur-
tion as shown in Fig. 7(b) and with a capacitive load of 470 rents II and 12 are equal and givenby(11) and (12).
pF, a slew rate of 0.25 V/IM is measured. For a capacitive load
lI(Z) = ~ (lP +A “~1(2)) (11)
of 10 pF, the slew rate is more than 10 V/I..M independent of
the bias current 1P. 11 =12 =10 =IP/(2- A). (12)
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526 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-17, NO. 3, JUNE 1982

t%
z
(a)

v+
M2 M6 F18 ~
P Fig. 13. Chip photograph of direct feedback amplifier.
,+ jlOAI1 /11
+ n
AI1j ‘j!j ~7 ~9 ~N-
TABLE III
I- IOAI1 poIp
I MASK DEVICE DIMENSIONSDIRECT FEEDBACKAMPLIFIBR
]AII llP
Ml M13
~_ M3 M5 Mll Dimension Weak-inversion limit
Device WX 1 [~m] B“ v; [nAl
(b)
Fig. 11. (a) Direct feedback amplifier. (b) Realized scheme. 1, 13 100 x 12 200
3,5,11 lox 12 20
7,9 50x6 200
2 300X 12 200
4 30X 12 20
6, 8 21 x 12 14

ing two halves. Fig. 13 is a photograph of the amplifier. It is

integrated in the same technology as the first amplifier. The
device dimensions and the corresponding weak inversion limits
are given in Table III. The total size of the amplifier is about
,’ nvT 400 X 190 pm.
,’
1 The amplifier is designed to charge large capacitive loads
Fig. 12. Calculated currents as a function of the input signal. (>100 pF). This makes a large width to le~gth ratio of the
output stage transistors possible without running into stability
problems. The current flowing in the output stage is about 15
Stability is ensured if the current feedback factor is smaller
times the internal current resulting in a high efficiency.
than two. When Vin is larger than zero, the current 11 in-
creases. Due to positive feedback the current may reach a
C, Experimental Results
value much larger than 10 which results in a high driving capa-
bility. This is true as well for 12 when ~n is negative. Simple The measured supply and output current as a function of
calculations yield that II (a) is @ven by (13) which is repre- the input signal are represented in Fig. 14(a). One can see that
sented in Fig. 12 for various values of the current feedback almost the whole supply current is available at the output.
factor A . (b = 1) The maximum output current, which is determined by the
beta’s of the transistors and the supply voltage, is about 50 vA.
1P Fig. 14(b) is a detail of Fig. 14(a) for small input signals.
(13)
11 (2)= ~~~+ exp (- (+) fi./(n “ VT))” Biased at 2 X 10 nA, a transconductance of 20 vA/V is mea-
sured. Under these conditions and with a capacitive load of
The available cmtput current, which equals 11-12, is ghen by
100 pF the amplifier has a GBW of 30 kHz. The measured
(14) and is represented in dotted lines in Fig. 12
output current for zero 1P is shown in dotted lines in Fig.
1P” (exp (~n/(n “ VT))- 1) .~ 14(b). Once the escape voltage is exceeded, the output cur-
I= (14)
‘UT 1- (A - 1) “ exp (~n/(rr “ VT)) “ rent increases very drastically.

Notice that, just as in the case of the differential feedback

V. CONCLUSIONS
amplifier, this amplifier also has a well-determined escape
voltage. In this paper two amplifiers are presented which regulate
their own bias current. If no signal is applied the amplifiers
B. Layout operate at a very low current level. Only when a signal is ap-
Orily half of the amplifier was integrated [see Fig. 1 l(b)] plied the current in the amplifiers increases so that these
since the amplifier can easily be realized by properly connect- amplifiers have a high driving capability.

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DEGRAUWE et al.: ADAPTIVE BIASING CMOS AMPLIFIERS 527

V(n , ,C V.

ancmc
I [pA] T
..------ kup
,.-
50. ,., I OUt

------- . .
-------- -- 0
-1oo 0 100
V,n Fig. 15. SC integrator during integrating phase.
[mV]

(a)

1
Fig. 16. Behavior of input of nonlinear amplifier in SC integrator.

(b)
havior of the integrator is fully described by the following pair
Fig. 14. Measured supply and output current versus input signal.
(b) Detail of (a) for small input signals. of differential equations:

~ d(vo - If.) dfin

‘ain” C.— (A2)
The first amplifier has a slew rate which is more than an dt dt
order of magnitude better than earlier presented micropower
amplifiers [2], [3]. Since this amplifier is fairly small it is ~.d(vo- ~n)+uo.c.~+~+~(vin)=o
(A3)
well suited for the use in large micropower sampled data dt dt R
falters.
where
The second amplifier is well suited for use as a micropower
buffer since it does not slew and has a high efficiency. f(Vin)= b . (beta . I fin 1/2 +~m) “ fin

beta = beta of input transistor.

APPENDIX
For a step input (A3) is then of the form
In order to be able to study the step response of the differ-
ential feedback amplifier some assumptions have to be made. dljn _ .—v& (A4)
1) The internal time constants of the amplifier can be ne- dt ‘a’+a’”nn+a’ /qnl
glected with respect to the time constant of the output stage.
where
2) The current feedback factor is close to one. (This guaran-
tees a sufficient “slew rate” and results in a small size amplifier.)
al = ‘step “ ‘Early
3) For an increasing current level, the input transistors will I.C1
work most of the time in strong inversion. Therefore, the in-
VEarlY + b . beta

(
.1P
put transistors are assumed to always work in strong inversion.
4) The output resistance of the amplifier can be modeled by a2=- I.C1 (1+CZin)
“C’I)
b . beta
a3=-————_
‘Early
R=— (Al) 2.C,
I+i

where I represents the dc current and i the ac current flowing Cl=c.

(ao+z%)
through the output stage.
An SC integrator, during the integrating phase, using a differ- This formula, represented in Fig. 16 has only one point
ential feedba~k amplifier ‘can be modeled by Fig. 15. The be- - where the derivate is equal to zero. This is an equilibrium

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528 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. SC-17, NO. 3, JUNE 1982

point since for Vin larger than Veq the derivate is smaller than Jozef Rijmenants was born in Nijlen, Belgium,
on May 30, 1956. He received the electrical
zero and thus the input will decrease until Ve~ is reached. For
engineering degree from the Katholieke Uni-
Vin smaller than Veq, the derivate is larger than zero and thus versiteit Leuven, Heverlee,Belgium, in 1979.
the input will increase until V,q is reached. After graduation, he worked on an industrial
project in the field of switched capacitor filters
at ESAT Laboratories, Heverlee, Belgium. In
REFERENCES
January 1982 he joined the CAD software com-
[1] W. Steinhagen and W. L. Engl, “Design of integrated analog pany Silvar-Lisco, Belgium.
CMOS circuits-A multichannel telemetry transmitter,” IEEE J.
Solid-State Circuits, vol. SC-13, pp. 799-805, Dec. 1978.
[2] F. Krummenacher and J.-L. Zufferey, “High gain CMOS cascode
operational amplifier,” Electron. Lett., vol. 16, pp. 232-233,
Mar. 1980.
[3] F. Krummenacher, “High gain CMOS OTA for micro-power SC-
filters,” EZectron. Lett., vol. 17, pp. 160-162, Feb. 1981.
[4] M. A. Copeland and J. M. Rabaey, “Dynamic amplifier for M.O.S. Eric A. Vittoz (A’63-M’72) was born in Lau-
technology,” Electron. Lett., vol. 15, pp. 301-302, May 1979. sanne, Switzerland, on May 9, 1938. He re-
[5] B. J. Hosticka, “Dynamic CMOS amplifiers,” lEEE J. Solid- ceived the M. S. and Ph.D. degrees in electrical
State Circuits, vol. SC-15, pp. 887-894, Oct. 1980. engineering from the Federal Institute of Tech-
[6] F. Krummenacher, E. Vittoz, and M. Degrauwe, “Class AB nology, Lausanne, in 1961 and 1969, respec-
CMOS amplifier for micropower SC-filters,” Electron. Lett., vol. tively.
17, pp. 433-435, June 1981. After spending one year as a Research Assis-
[7] J. Fellrath and E. Vittoz, “Small signal model of MOS transistors tant, he joined the Centre Electronique Horloger
in weak inversion,” Proc. Journees d’Electronique, Modelling S.A., Neuch~tel, Switzerland, in 1962, where
Semiconductor Devices, pp. 315-324, Oct. 1977. he became involved in micropower integrated
[8] J. E. Solomon, “The monolithic op amp: A tutorial study,” circuit developments for the watch, while pre-
IEEE J. Solid-State Circuits, vol. SC-9, pp. 314-332, Dec. 1974. paring a thesis in the same field. Since 1971 he has been Associate Di-
[9] J. E. Solomon, W. R. Davis, and P. L. Lee, “A self compensated rector of this Laboratory, supervising advanced developments in elec-
monolithic op amp with low input current and high slew-rate, ” in tronic watches and other micropower systems. His field of personal
ISSCC Dig, Tech. Papers, 1969, pp. 14-15. research is in very low-power CMOS integrated analog circuits. He also
[10] W. E. Hearn, “A fast slewing monolithic operational amplifier,” lectures and supervises student work in integrated circuit design at the
IEEE J. Solid-State Circuits, vol. SC-6, pp. 20-24, Feb. 1971. Federal Institute of Technology, Lausanne.
[11] E. Vittoz and J. Fellrath, “CMOS analog integrated circuits based
on weak inversion operation, ” IEEE J. Solid-State Circuits, VOL
SC-12, pp. 224-231, June 1977.

Hugo J. De Man (M’81) was born in Boom, Bel-

gium, on September 19, 1940. He received the
electrical engineering degree and the Ph.D. de-
gree in applied science from the Katholieke
Universiteit Leuven, Leuven, Belgium, in 1964
and 1968, respectively.
Marc G. Degrauwe was born in Brussels, Bel- In 1968 he became a Member of the Staff of
gium, on August 16, 1957. He received the the Laboratory for Physics and Electronics of
E.E. degree from the Katholieke Universiteit Semiconductors at the University of Leuven,
Leuven, Herverlee, Belgium, in 1980. working on integrated circuit technology. From
During the summer of 1980 he was on leave 1969 until 1971, he was at the Electronic Re-
at Centre Electronique Horloger S.A., Neu- search Laboratory, University of California, Berkeley, as an ESRO-
ch~tel, Switzerland, where he was involved in NASA Postdoctoral Research Fellow, working on computer-aided
the development of micropower amplifiers. devices and circuit design. In 1971 he returned to the University of
He is working towards a Ph.D. degree on micro- Leuven as a Research Associate of the Belgian National Science Founda-
power sample data filters. He also has an tion (NFWO). In 1974 he became a Professor at the University of
LW.O.N.L. Fellowship which allows him to Leuven. From 1974-1975, he was Visiting Associate Professor at the
work as a Research Assistant at the ESAT Laboratory, Katholieke Uni- University of California, Berkeley. His current field of research is the
versiteit Leuven. design of integrated circuits and computer-aided design.

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