®

RT2515H

2A, Low Input Voltage, Ultra-Low Dropout LDO Regulator

with Enable
General Description Features
The RT2515H is a high performance positive voltage  Input Voltage as Low as 1.4V
regulator designed for use in applications requiring ultra-  Ultra-Low Dropout Voltage 400mV @ 2A
low input voltage and ultra-low dropout voltage at up to 2  Over-Current Protection
amperes. It operates with an input voltage as low as 1.4V,  Over-Temperature Protection
with output voltage programmable as low as 0.5V. The  μA Input Current in Shutdown Mode
1μ
RT2515H features ultra low dropout, ideal for applications  Enable Control
where output voltage is very close to input voltage.  RoHS Compliant and Halogen Free
Additionally, the RT2515H has an enable pin to further
reduce power dissipation while shutdown. The RT2515H
Applications
provides excellent regulation over variations in line, load  Telecom/Networking Cards
and temperature. The RT2515H is available in the SOP-8  Motherboards/Peripheral Cards
(Exposed Pad) package. The output voltage can be set  Industrial Applications
by an external divider depending on how the FB pin is  Wireless Infrastructure
configured.  Set Top Box
 Medical Equipment
 Notebook Computers
Ordering Information  Battery Powered Systems
RT2515H
Package Type Pin Configuration
SP : SOP-8 (Exposed Pad-Option 2)
(TOP VIEW)
Lead Plating System
G : Green (Halogen Free and Pb Free) NC 8 GND
Note : EN 2 7 ADJ
GND
VIN 3 6 VOUT
Richtek products are : 9
NC 4 5 NC
 RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020. SOP-8 (Exposed Pad)
 Suitable for use in SnPb or Pb-free soldering processes.

Marking Information
RT2515HGSP : Product Number
RT2515H YMDNN : Date Code
GSPYMDNN

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1
RT2515H
Typical Application Circuit
RT2515H
3 6
VIN VIN VOUT VOUT
C1 C2
10µF R1
10µF
Chip Enable ADJ 7
2
EN R2
GND
8,
0.5(R1+R2) 9 (Exposed Pad)
VOUT = (V)
R2

Figure 1. Adjustable Voltage Regulator

Functional Pin Description

Pin No. Pin Name Pin Function
1, 4, 5 NC No internal connection.
Chip enable (Active-High). Pulling this pin below 0.4V turns the regulator off,
2 EN reducing the quiescent current to a fraction of its operating value. The device will
be enabled if this pin is left open. Connect to VIN if not being used.
Input voltage. For regulation at full load, the input to this pin must be between
(VOUT + 0.5V) and 6V. Minimum input voltage is 1.4V. A large bulk capacitance
3 VIN should be placed closely to this pin to ensure that the input supply does not sag
below 1.4V. Also a minimum of 10F ceramic capacitor should be placed directly at
this pin.
6 VOUT Output voltage. A minimum of 10F capacitor should be placed directly at this pin.
If connected to the VOUT pin, the output voltage will be set at 0.5V. If external
7 ADJ feedback resistors are used, the output voltage will be determined by the resistor
ratio.
8, Ground. The exposed pad must be soldered to a large PCB and connected to GND
GND
9 (Exposed pad) for maximum power dissipation.

Functional Block Diagram

RSENSE
VIN VOUT
VPUMP

- - ADJ
+ +

VIN

0.5µA
0.5V
EN
Reference
Thermal VIN
Generator
Shutdown

VOUT + GND
VIN -
Reverse Voltage
Shutdown

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 RT2515H
Absolute Maximum Ratings (Note 1)
 Supply Voltage, VIN ------------------------------------------------------------------------------------------------------ −0.3V to 7V
 Other I/O Pin --------------------------------------------------------------------------------------------------------------- −0.3V to 6V
 Power Dissipation, PD @ TA = 25°C
SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------------- 2.04W
 Package Thermal Resistance (Note 2)
SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------------- 49°C/W
SOP-8 (Exposed Pad), θJC --------------------------------------------------------------------------------------------- 15°C/W
 Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------- 260°C
 Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
 Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Model) ---------------------------------------------------------------------------------------------- 2kV

Recommended Operating Conditions (Note 4)

 Supply Voltage, VIN ------------------------------------------------------------------------------------------------------ 1.4V to 6V
 Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 1.4V to 6V, IOUT = 10μA to 2A, VADJ = VOUT , −40°C ≤ TA ≤ 85°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Quiescent Current IQ VIN = 3.3V, IOUT = 0A -- 0.7 1.5 mA
Shutdown Current ISHDN VIN = 6V, VEN = 0V -- 1.5 10 A
VIN = VOUT + 0.5V, IOUT = 10mA,
TA = 25C 2 -- 2
Output Voltage VOUT %
VIN = 1.8V, IOUT = 0.8A, T A = 25C
1.4V  VIN  6V, IOUT = 10mA 3 -- 3
Line Regulation VLINE IOUT = 10mA -- 0.2 0.4 %/V
Load Regulation VLOAD IOUT = 10mA to 2A -- 0.5 1.5 %
IOUT = 1A, VIN  1.6V -- 120 200
IOUT = 1A, 1.4V < VIN < 1.6V -- -- 400
IOUT = 1.5A, VIN  1.6V -- 180 300
Dropout Voltage VDROP mV
IOUT = 1.5A, 1.4V < VIN < 1.6V -- -- 500
IOUT = 2A, VIN  1.6V -- 240 400
IOUT = 2A, 1.4V < VIN < 1.6V -- -- 600
Current Limit ILIM VIN = 3.3V 2.3 3 4.4 A

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RT2515H
Parameter Symbol Test Conditions Min Typ Max Unit
Feedback
VIN = 3.3V, VADJ = VOUT,
0.495 -- 0.505
IOUT = 10mA, TA = 25C
ADJ Reference Voltage VADJ V
VIN = 3.3V, VADJ = VOUT,
0.49 -- 0.51
IOUT = 10mA
ADJ Pin Current IADJ VADJ = 0.5V -- 20 200 nA
Enable
EN Pin Current IEN VEN = 0V, VIN = 6V -- 1 10 A
EN Threshold Logic-High VIH VIN = 3.3V 1.6 -- --
V
Voltage Logic-Low VIL VIN = 3.3V -- -- 0.4
Over Temperature Protection
OTP Trip Level -- 160 -- °C
Hysteresis -- 30 -- °C

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is
measured at the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

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 RT2515H
Typical Operating Characteristics
Reference Voltage vs. Temperature Quiescent Current vs. Temperature
0.520 1.15

0.515

Quiescent Current (mA)

Reference Voltage (V)

0.510 0.95
VIN = 5V
0.505
VIN = 5V
0.500 0.75
VIN = 3.3V VIN = 3.3V
0.495

0.490 0.55

0.485
VOUT = 2.52V
0.480 0.35
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Shutdown Current vs. Temperature UVLO vs. Temperature

1.20 1.50

1.05 1.40
Shutdown Current (µA)1

VIN = 5V 1.30 Logic-High

0.90
UVLO (V)

1.20
0.75
VIN = 3.3V 1.10
Logic-Low
0.60
1.00

0.45 0.90
VEN = 5V
0.30 0.80
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature (°C) Temperature (°C)

Dropout Voltage vs. Load Current EN Threshold Voltage vs. Temperature

350 1.3

300 Logic-High
EN Threshold Voltage (V)

1.2
Dropout Voltage (mV)

125°C
250
25°C 1.1
200
1.0
150
−40°C Logic-Low
0.9
100

50 0.8

VOUT = 2.5V VIN = 5V

0 0.7
0 0.5 1 1.5 2 -50 -25 0 25 50 75 100 125
Load Current (A) Temperature (°C)

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RT2515H

Load Transient Response Line Transient Response

VOUT
(20mV/Div)

VIN
(1V/Div)
IOUT VOUT
(1A/Div) (10mV/Div)

VIN = 3.3V, VOUT = 2.5V, IOUT = 1A to 2A VIN = 3.3V to 4.3V, VOUT = 2.5V, IOUT = 2A

Time (50μs/Div) Time (500μs/Div)

Power On from EN Power Off from EN

VEN VEN
(5V/Div) (5V/Div)

VOUT VOUT
(2V/Div) (2V/Div)

I IN I IN
(2A/Div) (2A/Div)

VIN = 3.3V, VOUT = 2.5V, IOUT = 2A VIN = 3.3V, VOUT = 2.5V, IOUT = 2A

Time (250μs/Div) Time (250μs/Div)

PSRR
0

-10 IOUT = 1mA

IOUT = 100mA
-20 IOUT = 300mA
PSRR (dB)

-30

-40

-50

-60

-70
VIN = 3.25V to 3.35V, VOUT = 2.5V
-80
100 1000 10000 100000 1000000
Frequency (Hz)

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 RT2515H
Application Information
The RT2515H is a low voltage, low dropout linear regulator Chip Enable Operation
with an external bias supply input capable of supporting The RT2515H goes into sleep mode when the EN pin is in
an input voltage range from 1.4V to 6V with a fixed output a logic low condition. In this condition, the pass transistor,
voltage from 1V to 2V in 0.1V increments. error amplifier, and band gap are all turned off, reducing
the supply current to only 10μA (max.). The EN pin can
Output Voltage Setting
be directly tied to VIN to keep the part on.
The RT2515H output voltage is adjustable from 1.4V to
6V via the external resistive voltage divider. The output UVLO Protection
voltage is set according to the following equation : The RT2515H provides an input Under Voltage Lockout

VOUT = VADJ   1+ R1 
protection (UVLO). When the input voltage exceeds the
 R2  UVLO rising threshold voltage (1.2V typ.), the device
For ADJ pin noise immunity, the resistive divider total value resets the internal circuit and prepares for operation. If
of R1 and R2 are suggested not over 100kΩ, where VADJ the input voltage falls below the UVLO falling threshold
is the reference voltage with a typical value of 0.5V. voltage during normal operation, the device will be shut
down. A hysteresis (140mV typ.) between the UVLO rising
Feed-Forward Capacitor (CFF) and falling threshold voltage is designed to avoid noise.
The RT2515H is designed to be stable without the external
feed-forward capacitor (CFF). However, an external feed- Current Limit
forward capacitor between VOUT and ADJ pin is often The RT2515H contains an independent current limit
adoptd to optimizes the transient, noise, and PSRR circuitry, which monitors and controls the pass transistor's
performance. Regarding to the resistance value of the gate voltage, limiting the output current to 3A (typ.).
voltage divider, the recommended CFF values are as below :
CIN and COUT Selection
CFF = 1nF, for both R1 and R2 are larger than 1kΩ
The RT2515H is designed specifically to work with low
CFF = 10nF, for both R1 and R2 are smaller than 1kΩ ESR ceramic output capacitor for space saving and
performance consideration. Using a ceramic capacitor with
RT2515H
VOUT
effective capacitance range from 10μF to 47μF on the
VIN VIN VOUT
CIN COUT
output ensures stability.
R1

*CFF The input capacitor must be located at a distance of no

EN ADJ more than 0.5 inch from the input pin of the chip. However,
R2 a capacitor with larger value and lower ESR (Equivalent
GND
Series Resistance) is recommended since it will provide
better PSRR and line transient response. For general
Figure 2. Application Circuit with CFF applications, an input capacitor of at least 10μF or greater
is highly recommended.

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RT2515H
Thermal Considerations thermal test board. The maximum power dissipation at TA
Thermal protection limits power dissipation in the = 25°C can be calculated by the following formula :
RT2515H. When the operation junction temperature P D(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W for
exceeds 160°C, the OTP circuit starts the thermal SOP-8 (Exposed Pad) package
shutdown function and turns the pass element off. The
The maximum power dissipation depends on the operating
pass element turns on again after the junction temperature
ambient temperature for fixed T J(MAX) and thermal
cools by 30°C.
resistance, θJA. The derating curve in Figure 4 allows the
The RT2515H output voltage will be closed to zero when designer to see the effect of rising ambient temperature
output short circuit occurs as shown in Figure 3. It can on the maximum power dissipation.
reduce the IC temperature and provides maximum safety
3.2
to end users when output short circuit occurs. Four-Layer PCB

Maximum Power Dissipation (W)

VOUT Short to GND 2.8

2.4

2.0
VOUT
1.6
ILIM
ILIM’
1.2
IOUT
0.8

0.4
IC Temperature
0.0
0 25 50 75 100 125
Ambient Temperature (°C)
Figure 3. Short Circuit Protection when Output Short
Circuit Occurs Figure 4. Derating Curve of Maximum Power Dissipation

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
SOP-8 (Exposed Pad) package, the thermal resistance,
θJA, is 49°C/W on a standard JEDEC 51-7 four-layer

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 RT2515H
Outline Dimension
H
A

EXPOSED THERMAL PAD Y

(Bottom of Package)
J X B

C
I
D

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
X 2.000 2.300 0.079 0.091
Option 1
Y 2.000 2.300 0.079 0.091
X 2.100 2.500 0.083 0.098
Option 2
Y 3.000 3.500 0.118 0.138

8-Lead SOP (Exposed Pad) Plastic Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify
that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek
product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;
nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent
or patent rights of Richtek or its subsidiaries.
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