IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

5, MAY 2014 2307

Novel Bidirectional Snubberless Naturally

Commutated Soft-Switching Current-Fed Full-Bridge
Isolated DC/DC Converter for Fuel Cell Vehicles
Pan Xuewei, Student Member, IEEE, and Akshay K. Rathore, Senior Member, IEEE

Abstract—A novel naturally clamped zero-current commutated

soft-switching bidirectional current-fed full-bridge isolated dc/dc
converter is proposed. This proposed secondary-modulation tech-
nique naturally clamps the voltage across the primary-side de-
vices with zero-current commutation, eliminating the necessity
for active-clamp circuit or passive snubbers. Switching losses are
reduced significantly owing to zero-current switching of primary-
side devices and zero-voltage switching of secondary-side devices.
Soft switching and voltage clamping are inherent and load inde-
pendent. The voltage across primary-side devices is independent
of duty cycle with varying input voltage and output power and
clamped at rather low reflected output voltage, enabling the use
of semiconductor devices of low voltage rating. These merits make
the converter promising for fuel cell vehicles application, front-end
dc/dc power conversion for fuel cell inverters, and energy storage.
Steady-state operation, analysis, design, simulation results using Fig. 1. Architecture of a fuel cell car.
PSIM 9.0.4, and experimental results are presented.
Index Terms—Bidirectional, current-fed converter, fuel cell ve- achieving good transient performance. As illustrated in Fig. 1,
hicle (FCV), natural clamping, soft switching. a bidirectional dc/dc converter is needed to interface the low-
voltage energy storage (battery) of 12 V with a variable fuel cell
I. I NTRODUCTION stack dc bus of 150–300 V. High-frequency (HF) transformer
isolated topologies [6]–[19] are more suitable for this applica-
T RANSPORTATION electrification has become a clear
tendency owing to lower emission, better vehicle perfor-
mance, and higher fuel economy than conventional internal-
tion owing to merits of high step-up ratio, galvanic isolation,
and flexibility of system configuration [12]. For the past two
combustion engine-based vehicles. Battery-based electric decades, voltage-fed isolated bidirectional converters such as
vehicles (EVs) and fuel cell vehicles (FCVs) are emerging dual active bridge (DAB) [6], [7] and resonant topologies [8]–
means of transportation using a three-phase electric motor for [10] have been popular among researchers. Various duty cycle
propulsion. Compared with pure battery-based EVs, FCVs do modulation techniques and other hybrid modulation strate-
not have limitations of short driving range and long refu- gies [8]–[10] have been introduced to extend soft-switching
eling (charging) time, thus providing significant potential in range and improve efficiency of voltage-fed DAB converters.
transportation [1]. The typical architecture of a fuel cell car In [11], a DAB converter, a series resonant converter, and
is illustrated in Fig. 1 [2]–[5]. The fuel cell stack converts two multistage topologies are compared for wide input and
hydrogen gas stored onboard with oxygen from the air into elec- output voltage ranges. However, voltage-fed converters suffer
tricity to drive the electric motor. However, FCVs suffer from from several limitations of high input pulsating current, limited
slow dynamic response to load variation and therefore need soft-switching range, high circulating current through devices
a supplement source of energy. An auxiliary energy storage and magnetics, and relatively low efficiency for high voltage
device such as a battery or a supercapacitor is usually utilized amplification and high-input-current applications.
for cold startup, absorbing the regenerative braking energy and Current-fed converters have been justified and demonstrated
meritorious over voltage-fed converters for such applications
owing to lower input current ripple, lower HF transformer turns
Manuscript received November 22, 2012; revised January 28, 2013 and
April 14, 2013; accepted May 13, 2013. Date of publication June 28, 2013; ratio, negligible diode ringing, no duty cycle loss, and easier
date of current version October 18, 2013. This work was supported by the current control ability. Usually, current-fed converters employ
Singaporean Ministry of Education Academic Research Fund (AcRF) Tier 1 a resistor–capacitor–diode (RCD) snubber [12], [13], an active
under Grant R-263-000-627-133.
The authors are with the Department of Electrical and Computer Engineer- clamp [14]–[17], or other snubbers to absorb device turn-off
ing, National University of Singapore, Singapore 117576 (e-mail: a0082351@ voltage spike. RCD snubber leads to low efficiency owing to
nus.edu.sg; eleakr@nus.edu.sg). clamping energy dissipated in snubber resistor. Active clamp
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. results in high efficiency and achieves zero-voltage switching
Digital Object Identifier 10.1109/TIE.2013.2271599 (ZVS) of switches. However, it needs floating active devices
0278-0046 © 2013 IEEE
2308 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

(NVC) concept have been explained. Before turning off the

diagonal switch pairs of primary-side switches (e.g., S1 –S4 ),
the other pair (e.g., S2 –S3 ) is turned on. Reflected output
voltage Vo /n appears across the transformer primary. It diverts
the current from one switch pair to the other pair through a
transformer, causing the current through just-triggered switch
pair to rise and the current through conducting switch pair to
fall to zero naturally resulting in ZCC. Later, the body diodes
Fig. 2. Proposed ZCS CFDAB dc/dc converter.
across switching pairs start conducting and their gating signals
and a large HF capacitor for accurate and effective clamping are removed leading to ZCS turnoff of the devices. Commutated
and suffers from demerits of high current stress, higher circulat- device capacitance starts charging with NVC.
ing current at light load, duty-cycle-dependent device voltage, The following assumptions are made to study the operation
and reduced boost capacity. In [18]–[23], the leakage induc- and explain the analysis of the converter.
tance and the parasitic capacitance of the HF transformer were 1) Boost inductor L is large enough to maintain constant
utilized to achieve zero-current switching (ZCS) soft switch- current through it.
ing, thus eliminating the need of a snubber circuit. However, 2) All the components are ideal.
resonant current is much higher than the input current, which 3) Inductor Llk includes the leakage inductance of the
increases the current stress of devices and magnetics requiring transformer.
higher VA rating components [24]. In addition, the variable- 4) Magnetizing inductance of the transformer is infinitely
frequency control scheme makes it difficult to optimize the large.
design of magnetics with respect to volume and efficiency.
The steady-state operating waveforms are shown in Fig. 3.
A dual half-bridge bidirectional dc/dc converter is proposed
Primary switch pairs S1 –S4 and S2 –S3 are operated with
[25]. However, this topology requires four split capacitors that
identical gating signals phase-shifted by 180◦ with an overlap.
occupy a considerable volume of the converter. It may need
The duty cycle should be kept above 50%. The steady-state
an additional control to avoid any voltage imbalance across
operation of the converter during different intervals in a one-
the capacitors. In addition, the topology is not modular and
half HF cycle is explained using the equivalent circuits shown in
is not easily scalable for higher power. Peak currents through
Fig. 4. For the remaining half cycle, the intervals are repeated in
the primary switches are > 2.5× the input current, and top and
the same sequence with other symmetrical devices conducting
bottom switches share unequal currents.
to complete the full HF cycle.
In this paper, a novel secondary-modulation-based naturally
Interval 1 (see Fig. 4(a); to < t < t1 ): In this interval,
clamped soft-switching bidirectional snubberless current-fed
primary-side H-bridge switches S2 and S3 and antiparallel
DAB (CFDAB) converter is proposed, as shown in Fig. 2.
body diodes D6 and D7 of secondary-side H-bridge switches
Natural commutation or voltage clamping with ZCS of primary
are conducting. The current through inductor Llk is negative
devices is achieved and therefore avoids the need of a pas-
and constant. Power is transferred to the load through the
sive or active-clamp snubber making it snubberless and novel.
HF transformer. Nonconducting secondary devices S5 and S8
Switching losses are reduced significantly owing to soft switch-
are blocking output voltage Vo , and nonconducting primary
ing of semiconductor devices, i.e., ZCS of primary switches
devices S1 and S4 are blocking reflected output voltage Vo /n.
and ZVS of secondary switches. In the reverse direction, the
The values of current through various components are iS2 =
converter acts as a standard voltage-fed full-bridge isolated
iS3 = Iin , iS1 = iS4 = 0, ilk = −Iin , and iD6 = iD7 = Iin /n.
dc/dc converter with inductive output filter. Standard phase-
Voltage across switches S1 and S4 VS1 = VS4 = Vo /n. Voltage
shift modulation can be employed to achieve ZVS of high-
across switches S5 and S8 VS5 = VS8 = Vo .
voltage side and ZCS of low-voltage side with relatively low
Interval 2 (see Fig. 4(b); t1 < t < t2 ): At t = t1 , primary
circulating current. It has been reported in [26], and therefore,
switches S1 and S4 are turned on. Snubber capacitors C1 and
this paper does not emphasize on it.
C4 discharge in a very short period of time.
The objectives of this paper are to explain steady-state op-
Interval 3 (see Fig. 4(c); t2 < t < t3 ): Now, all four primary
eration and analysis, illustrate design, and demonstrate exper-
switches are conducting. Reflected output voltage Vo /n appears
imental performance of the proposed converter. Steady-state
across leakage inductance Llk and causes its current to increase
operation of the converter is explained in Section II. A detailed
linearly. It causes currents through previously conducting de-
converter design is illustrated in Section III. The analysis and
vices S2 and S3 to reduce linearly. It results in conduction
design are verified by simulation results using PSIM 9.0.4 in
of switches S1 and S4 that started conducting with zero cur-
Section IV. Experimental results on a laboratory prototype of
rent, which helps reduce associated turn-on loss. The currents
250 W are demonstrated to validate and show the converter
through various components are given by
performance in Section IV.
Vo
ilk = − Iin + · (t − t2 ) (1)
II. O PERATION AND A NALYSIS OF C ONVERTER n · Llk
In this section, steady-state operation and analysis with zero- Vo
iS1 = iS4 = · (t − t2 ) (2)
current commutation (ZCC) and the natural voltage clamping 2n · Llk
XUEWEI AND RATHORE: SNUBBERLESS SOFT-SWITCHING FULL-BRIDGE ISOLATED DC/DC CONVERTER FOR FCVS 2309

Fig. 3. Operating waveforms of the proposed ZCS CFDAB converter, as

shown in Fig. 2.

Vo
iS2 = iS3 = Iin − · (t − t2 ) (3)
2n · Llk
Iin Vo
iD6 = iD7 = − 2 · (t − t2 ). (4)
n n · Llk
Since the antiparallel body diodes D6 and D7 are conducting,
switches S6 and S7 can be gated for ZVS turn-on. At the end of
this interval t = t3 , D6 and D7 commutate naturally. Primary
current reaches zero and ready to change polarity. Current
through all primary devices reaches Iin /2. Final values are
ilk = 0, iS1 = iS2 = iS3 = iS4 = Iin /2, and iD6 = iD7 = 0.
Interval 4 (see Fig. 4(d); t3 < t < t4 ): In this interval, sec-
ondary H-bridge devices S6 and S7 are turned on with ZVS.
Currents through all the switching devices continue increasing
or decreasing with the same slope as interval 3. At the end of Fig. 4. Equivalent circuits during different intervals of operation of the
this interval, primary devices S2 and S3 commutate naturally proposed converter for the waveforms shown in Fig. 3.
2310 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

with ZCC and their respective currents iS2 and iS3 reach zero of the secondary switches D5 and D8 is Iin /n. The final values
obtaining ZCS. The full current, i.e., input current Iin , is taken are iS1 = iS4 = ilk = Iin , iS2 = iS3 = 0, and iD5 = iD8 =
over by other devices S1 and S4 , and the transformer current Iin /n.
changes polarity. Final values are ilk = Iin , iS1 = iS4 = Iin , Voltage across switches S2 and S3 VS2 = VS3 = Vo /n.
iS2 = iS3 = 0, and iS6 = iS7 = Iin /n. In this half HF cycle, current has transferred from one
Interval 5 (see Fig. 4(e); t4 < t < t5 ): In this interval, the diagonal switch pair to the other diagonal switch pair, and the
primary current or leakage inductance current ilk further in- transformer current has reversed its polarity.
creases with the same slope. Antiparallel body diodes D2 and
D3 start conducting, causing extended zero voltage to appear III. D ESIGN OF C ONVERTER
across the outgoing or commutated switches S2 and S3 to
ensure ZCS turnoff. Now, secondary devices S6 and S7 are In this section, converter design procedure is illustrated
turned off. At the end of this interval, currents through the by a design example for the following specifications: In-
transformer and switches S1 and S4 reach their peak value. This put voltage Vin = 12 V, output voltage Vo = 150–300 V,
interval should be very short to limit the peak current through nominal output voltage = 288 V, output power Po = 250 W,
the transformer and switches, and thus their kilovoltampere and switching frequency fs = 100 kHz. The design equations
ratings. are presented to determine the components’ ratings. It helps the
The currents through operating components are given by selection of the components, as well as the prediction of the
converter performance theoretically.
Vo
ilk = Iin + · (t − t4 ) (5) 1) Average input current is Iin = Po /(ηVin ). Assuming an
n · Llk
ideal efficiency value η of 95%, Iin = 21.9 A.
Vo 2) Maximum voltage across the primary switches is
iS1 = iS4 = Iin + · (t − t4 ) (6)
2n · Llk
Vo
Vo VP,SW = . (13)
iD2 = iD3 = · (t − t4 ) (7) n
2n · Llk
Iin Vo 3) Voltage conversion ratio or input and output voltages are
iS6 = iS7 = + 2 · (t − t4 ). (8) related as
n n · Llk
n · Vin
Interval 6 (see Fig. 4(f); t5 < t < t6 ): During this interval, Vo = (14)
secondary switches S6 and S7 are turned off. Antiparallel body 2 · (1 − d)
diodes of switches S5 and S8 take over the current immediately. where d is the duty cycle of primary switches.
Therefore, the voltage across the transformer primary reverses 4) The leakage inductance of the transformer or series in-
polarity and the current through it starts decreasing. The cur- ductance Llk is calculated by
rents through switches S1 and S4 and body diodes D2 and D3
also start decreasing. Vo · (d − 0.5)
Llk = . (15)
The currents through operating components are given by 2 · n · Iin · fs
Vo
ilk = Ilk,peak − · (t − t5 ) (9) 5) RMS current through the primary switches is given by
n · Llk 
2−d
Vo IP,rms = Iin . (16)
iS1 = iS4 = Isw,peak − · (t − t5 ) (10) 3
2n · Llk
Selection of transformer turns ratio is associated with
Vo
iD2 = iD3 = ID2,peak − · (t − t5 ) (11) device RMS current and conduction losses, particularly
2n · Llk primary-side semiconductor devices because they carry
Ilk,peak Vo higher currents. Higher value of turns ratio reduces the
iD5 = iD8 = − 2 · (t − t5 ). (12) maximum voltage across the primary switches that permit
n n · Llk
the use of low-voltage devices with low ON-state resis-
At the end of this interval, currents through D2 and D3 reduce tance [from (13)]. However, selection of higher value of
to zero and are commutated naturally. Currents through S1 and turns ratio yields higher switch RMS current [from (14)
S4 and the transformer reach Iin . and (16)]. Maximum duty cycle is obtained accordingly
Final values are ilk = iS1 = iS4 = Iin , iD2 = iD3 = 0, and from (14). Therefore, an optimal value of n should be
iD5 = iD8 = Iin /n. selected to limit the conduction losses to obtain the
Interval 7 (see Fig. 4(g); t6 < t < t7 ): In this interval, snub- best converter efficiency and components’ utilization. An
ber capacitors C2 and C3 charge to Vo /n in a short period of optimum value of n = 10 at d = 0.8 is selected to achieve
time. Switches S2 and S3 are in forward blocking mode now. low overall conduction losses for the given specifications.
Interval 8 (see Fig. 4(h); t7 < t < t8 ): In this interval, cur- Output voltage can be regulated from 150 to 300 V by
rents through S1 and S4 and the transformer are constant at modulating the duty ratio between 0.6 and 0.8. Leakage
input current Iin . The current through antiparallel body diodes inductance from (15) is calculated as Llk = 2.05 μH.
XUEWEI AND RATHORE: SNUBBERLESS SOFT-SWITCHING FULL-BRIDGE ISOLATED DC/DC CONVERTER FOR FCVS 2311

6) RMS current through the transformer primary is given by


5 − 4d
Ilk,rms = Iin . (17)
3
7) The value of the boost inductor is given by
Vin · (d − 0.5)
L= (18)
ΔIin · fs
where ΔIin is the boost inductor ripple current. For
ΔIin = 1 A, L = 36 μH.
8) Average current through secondary devices is given by

Iav = P0 /(2V0 ). (19)

Here, Iav ∼
= 0.42 A. Voltage rating of secondary-side
devices = Vo = 300 V.
9) Average current through the antiparallel body diodes of
secondary devices is given by
Iin · (7 − 6d)
īD = . (20)
8n
10) RMS current through the secondary-side switches is
given by
 Fig. 5. Current waveforms through input inductor I(L) and leakage in-
Iin 2d − 1 ductance I(Llk ), voltage waveform across leakage inductance V (Llk ), and
Is,rms = . (21) voltage waveform VAB .
2n 3
11) VA rating of the HF transformer is given by IV. S IMULATION AND E XPERIMENTAL R ESULTS

Vo · Iin 2 · (5 − 4d) · (1 − d) The proposed converter has been simulated for given spec-
VAx−mer = . (22) ifications and calculated components’ values using software
n 3
package PSIM 9.0.4 for input voltage Vin = 12 V, nominal
The calculated value is VAx−mer = 321.9 VA. output voltage Vo = 288 V, output power Po = 250 W, and
These equations are derived with the condition that device switching frequency fs = 100 kHz. Simulation results
body diode conduction time (interval 6) is quite short are illustrated in Figs. 5 and 6.
and negligible with the intention to ensure ZCS of pri- Figs. 5 and 6 coincide exactly with theoretically predicted
mary switches without significantly increasing their peak waveforms. They verify the steady-state operation and analysis
current. However, at light load of the converter (fuel cell of the converter and proposed secondary-modulation technique
stack is supplying most of the power to motor), the body presented in Section II.
diode conduction time is relatively large and (14) is not Current waveforms through the input inductor L and trans-
valid any more. Due to the longer extended body diode former leakage inductance Llk are shown in Fig. 5. The ripple
conduction, the output voltage is boosted to a higher value frequency of input inductor current iL is 2× device switching
than that of the nominal boost converter. For such cases, frequency fs , resulting in a reduction in size. The peak current
(14) is modified into following equation: through inductor Llk above the constant value is caused by the
n · Vin extended conduction of antiparallel body diode of the corre-
Vo = (23) sponding primary switch to ensure ZCS turnoff. The current
2 · (1 − d − d )
is continuous and has low peak value. Voltage waveform VAB
where d is given by in Fig. 5 shows that voltage across the primary switches is
naturally clamped at low voltage, i.e., Vo /n. Leakage induc-
2 · n · Iin · Llk · fs
d = d − 0.5 − . (24) tance voltage VLlk clearly justifies the change in slopes of the
Vo transformer primary current ilk waveform.
From (24), it can be observed that, for a given value of Fig. 6 shows current waveforms through primary switches S1
Llk and Vo , d increases as the load is decreased. At full and S2 and secondary switches S5 and S6 , including the
load, d = 0 and (23) is converted to (14). currents flowing through their respective body diodes. The
12) The relation between output power and duty cycle is current waveforms of two diagonal pairs on primary and sec-
given by ondary sides (S1 versus S2 and S5 versus S6 ) are phase-
shifted with each other by 180◦ due to modulation signals.
n · vin
2
− vo · vin · (3 − 4 · d) Owing to the proposed novel secondary-side modulation, the
P = . (25)
4 · n · Llk · fs currents through primary switches S1 and S2 naturally decrease
2312 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

TABLE I
M AJOR C OMPONENTS ’ PARAMETERS OF E XPERIMENTAL P ROTOTYPE

through the primary winding ilk (50 A/div); (c) and (d) gate-
to-source voltage Vgs (10 V/div) and drain-to-source voltage
Vds (50 V/div) of primary-side devices and currents through
them (20 A/div); and (e) and (f) gate-to-source voltage Vgs
Fig. 6. Current waveforms through primary switches I(S1 ) and I(S2 ) and
secondary switches I(S5 ) and I(S6 ). (10 V/div) and drain-to-source voltage Vds (500 V/div) across
secondary-side devices and currents through them (5 A/div).
Experimental results for output power of 100 W at 300 V
are shown in Fig. 9: (a) boost inductor current iL (5 A/div);
(b) voltage across the transformer vAB (50 V/div) and current
through primary winding ilk (50 A/div); (c) and (d) gate-to-
source voltage Vgs (10 V/div) and drain-to-source voltage Vds
(20 V/div) across primary-side devices and currents through
them (20 A/div); and (e) and (f) gate-to-source voltage Vgs
(10 V/div) and drain-to-source voltage Vds (500 V/div) across
secondary-side devices and currents through them (5 A/div).
Experimental results match closely with the theoretical operat-
ing waveforms (see Fig. 3) and the simulation results.
Experimental waveforms clearly demonstrate ZVS of sec-
ondary switches and ZCS of primary switches. Figs. 8(a) and
9(a) show the boost inductor current waveforms with 2× device
Fig. 7. Photograph of the laboratory prototype. switching frequency and low ripple magnitude. Figs. 8(b) and
9(b) show the transformer primary voltage VAB that is the
to zero and then corresponding antiparallel body diodes start voltage across primary devices (i.e., positive for Vds,S2 and
conducting before the switches are turned off (i.e., gate signal negative for Vds,S1 ).
removed), which ensures ZCS turnoff. As shown in the current The device voltage is clamped at a low voltage, which allows
waveforms of S5 and S6 in Fig. 6, the antiparallel diodes the use of low-voltage devices. Primary current ilk is con-
of switches conduct prior to the conduction of corresponding tinuous, unlike traditional hard-switching and active-clamped
switches, which verifies ZVS of the secondary-side switches. A converters, and, as expected, has low peak as discussed in the
laboratory prototype of the proposed converter rated at 250 W, analysis and simulation results.
as shown in Fig. 7, has been developed to demonstrate its Figs. 8(c) and (d) and 9(c) and (d) show that the gating
performance experimentally. Details of the experimental con- signals to primary switches Vgs,S1 (top switch S1 ) and Vgs,S2
verter are given in Table I. Gating signals for the devices have (bottom switch S2 ) are removed first before voltages Vds,S1
been generated using a Xilinx Spartan-3 field-programmable and Vds,S2 across them, respectively, start rising. There is a
gate-array (FPGA) board. Two IR2181 are used to drive clear gap between these two waveforms that is caused by
primary-side MOSFETs, and two IR21814 are used to drive conduction of the antiparallel body diode of respective switch
secondary-side MOSFETs. ensuring their ZCS turnoff. The switch current naturally falls
Experimental results for output power of 250 W at 300 V to zero because of the proposed modulation and then becomes
are shown in Fig. 8: (a) boost inductor current iL (5 A/div); negative due to antiparallel body diode conduction confirming
(b) voltage across the transformer vAB (50 V/div) and current the ZCC of primary switches. Figs. 8(e) and (f) and 9(e) and (f)
XUEWEI AND RATHORE: SNUBBERLESS SOFT-SWITCHING FULL-BRIDGE ISOLATED DC/DC CONVERTER FOR FCVS 2313

Fig. 9. Experimental results for output power of 100 W at 300 V.

obviously show the ZVS turn-on of the secondary switches.

Gating signals to secondary switches Vgs,S5 (top switch S5 )
Fig. 8. Experimental results for output power of 250 W at 300 V. and Vgs,S6 (bottom switch S6 ) appear when voltages Vds,S5
2314 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

TABLE II devices reduce the switching losses significantly. Soft switching

L OSS D ISTRIBUTION E STIMATION F ROM L OSS M ODEL
is inherent and is maintained independent of the load. Once
ZCC, NVC, and soft switching are designed to be obtained at
rated power, it is guaranteed to happen at reduced load, unlike
voltage-fed converters. Hence, maintaining soft switching of
all devices substantially reduces the switching loss and allows
higher switching frequency control of the converter to achieve
a compact and high-density design. The proposed secondary
modulation achieves natural commutation of primary devices
and clamps the voltage across them at low voltage (reflected
output voltage) independent of duty cycle. It therefore elimi-
nates the requirement of an active-clamp or passive snubber.
Usage of low-voltage devices results in low conduction losses
and Vds,S6 across them, respectively, are zero already. In ad- in primary devices, which is significant due to higher currents
dition, its body diode conducts prior to switch conduction, on the primary side. The proposed modulation method is simple
causing zero voltage across the secondary switches confirming and easy to implement. Topology is modular, simple to be
their ZVS. interleaved, and scalable for higher power applications. These
On the other hand, the turn-on procedure of primary switches merits make the converter promising for interfacing a low-
is also demonstrated in waveforms shown in Figs. 8(c) and voltage dc bus with a high-voltage dc bus for higher current
(d) and 9(c) and (d). Before turning on, the voltage across applications such as FCVs, front-end dc/dc power conversion
primary switch is clamped at Vo /n = 30 V. When this switch for renewable (fuel cells/photovoltaic) inverters, uninterruptible
is gated on, the current through it is rising at a slope of di/dt = power system, microgrid, V2G, and energy storage.
7.5 A/μs from zero.
With this limited di/dt and low voltage across it, the turn-
on switching transition loss (due to overlap of switch voltage ACKNOWLEDGMENT
and current during switching transition time) is negligible. Any opinions, findings, conclusions, or recommendations
Considering ZCS turnoff of the primary switches and ZVS expressed herein are those of the authors and do not necessarily
turn-on of the secondary-side switches mentioned previously, reflect the views of the Ministry of Education of Singapore.
the total switching losses are reduced enormously. In addition,
primary switches of low voltage rating (< 100 V) and low ON-
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HF transformer consume a large percentage of total loss. A [7] H. Zhou and A. M. Khambadkone, “Hybrid modulation for dual active
considerable part of total loss is conduction loss of devices. bridge bi-directional converter with extended power range for ultracapac-
itor application,” IEEE Trans. Ind. Appl., vol. 45, no. 4, pp. 1434–1442,
Compared to similar topologies with active clamping or RCD Jul./Aug. 2009.
snubber, efficiency can be improved by nearly 2%. [8] L. Corradini, D. Seltzer, D. Bloomquist, R. Zane, D. Maksimovic, and
B. Jacobson, “Minimum current operation of bidirectional dual-bridge
series resonant DC/DC converters,” IEEE Trans. Power Electron., vol. 27,
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[9] X. Li and A. K. S. Bhat, “Analysis and design of high-frequency iso-
This paper has presented a novel soft-switching snubberless lated dual-bridge series resonant DC/DC converter,” IEEE Trans. Power
Electron., vol. 25, no. 4, pp. 850–862, Apr. 2010.
bidirectional CFDAB isolated dc/dc converter for FCVs. The [10] W. Chen, P. Rong, and Z. Lu, “Snubberless bidirectional dc–dc converter
steady-state operation, analysis, and design are illustrated. Sim- with new CLLC resonant tank featuring minimized switching loss,” IEEE
ulation and experimental results clearly confirm and demon- Trans. Ind. Electron., vol. 57, no. 9, pp. 3075–3086, Sep. 2010.
[11] F. Krismer, J. Biela, and J. W. Kolar, “A comparative evaluation of iso-
strate the claimed ZCC and NVC of primary devices without lated bi-directional DC/DC converters with wide input and output voltage
any snubber. ZCS of primary devices and ZVS of secondary range,” in Conf. Rec. 40th IEEE IAS Annu. Meeting, 2005, pp. 599–606.
XUEWEI AND RATHORE: SNUBBERLESS SOFT-SWITCHING FULL-BRIDGE ISOLATED DC/DC CONVERTER FOR FCVS 2315

[12] T.-F. Wu, Y.-C. Chen, J.-G. Yang, and C.-L. Kuo, “Isolated bidirectional Pan Xuewei (S’12) received the B.E. degree in
full-bridge DC–DC converter with a flyback snubber,” IEEE Trans. Power electronic engineering from the University of Elec-
Electron., vol. 25, no. 7, pp. 1915–1922, Jul. 2010. tronic Science and Technology of China, Chengdu,
[13] L. Zhu, “A novel soft-commutating isolated boost full-bridge ZVS-PWM China, in 2011. He is currently working toward the
DC–DC converter for bi-directional high power applications,” IEEE Ph.D. degree in the area of power electronics in the
Trans. Power Electron., vol. 21, no. 2, pp. 422–429, Mar. 2006. Department of Electrical and Computer Engineering,
[14] Y. Miura, M. Kaga, Y. Horita, and T. Ise, “Bidirectional isolated dual National University of Singapore, Singapore.
full-bridge dc–dc converter with active clamp for EDLC,” in Proc. IEEE His research interests include soft-switching
ECCE, 2010, pp. 1136–1143. methods and modulation techniques for high-
[15] K. Wang, F. C. Lee, and J. Lai, “Operation principles of bi-directional frequency power conversion for renewable energy.
full-bridge DC/DC converter with unified soft switching scheme and soft-
starting capability,” in Proc. 15th IEEE APEC, 2000, pp. 111–118.
[16] G. Chen, Y. Lee, S. Hui, D. Xu, and Y. Wang, “Actively clamped bi-
directional flyback converter,” IEEE Trans Ind. Electron., vol. 47, no. 4,
pp. 770–779, Aug. 2000.
[17] R. J. Wai, C. Y. Lin, and Y. R. Chang, “High step-up bidirectional isolated
converter with two input power sources,” IEEE Trans. Ind. Electron.,
vol. 56, no. 7, pp. 2629–2643, Jul. 2009.
[18] R. Y. Chen, R. L. Lin, T. J. Liang, J. F. Chen, and K. C. Tseng, “Current-
fed full-bridge boost converter with zero current switching for high volt-
age applications,” in Conf. Rec. IEEE 40th IAS Annu. Meeting, 2005,
pp. 2000–2006. Akshay K. Rathore (M’05–SM’12) received the
[19] S. Jalbrzykowski and T. Citko, “Current-fed resonant full-bridge boost M.Tech. degree in electrical machines and drives
DC/AC/DC converter,” IEEE Trans. Ind. Electron., vol. 55, no. 3, from the Indian Institute of Technology (Banaras
pp. 1198–1205, Mar. 2008. Hindu University), Varanasi, India, in 2003 and the
[20] C. S. Leu, P. Y. Huang, and M. H. Li, “A novel dual-inductor boost con- Ph.D. degree in power electronics from the Univer-
verter with ripple cancellation for high-voltage-gain applications,” IEEE sity of Victoria, Victoria, BC, Canada, in 2008.
Trans. Ind. Electron., vol. 58, no. 4, pp. 1268–1273, Apr. 2011. He had two subsequent postdoctoral appointments
[21] A. K. Rathore, A. K. S. Bhat, and R. Oruganti, “Analysis, design and with the Electrical Machines and Drives Laboratory,
experimental results of wide range ZVS active-clamped L-L type current- University of Wuppertal, Wuppertal, Germany, from
fed dc–dc converter for fuel cell to utility interface application,” IEEE September 2008 to August 2009 and with the Univer-
Trans. Ind. Electron., vol. 59, no. 1, pp. 473–485, Jan. 2012. sity of Illinois at Chicago, Chicago, IL, USA, from
[22] R. L. Andersen and I. Barbi, “A ZVS-PWM three-phase current-fed September 2009 to September 2010. Since November 2010, he has been an
push–pull dc–dc converter,” IEEE Trans. Ind. Electron., vol. 60, no. 3, Assistant Professor in the Department of Electrical and Computer Engineering,
pp. 838–847, Mar. 2013. National University of Singapore, Singapore. He has contributed to 70 research
[23] U. R. Prasanna and A. K. Rathore, “Extended range ZVS active-clamped papers and delivered three tutorials on current-fed soft-switching converters.
current-fed full-bridge isolated dc/dc converter for fuel cell applications: His research interests include current-fed topologies, soft-switching techniques,
Analysis, design and experimental results,” IEEE Trans. Ind. Electron., high-frequency power conversion, modulation techniques, and electric and fuel
vol. 60, no. 7, pp. 2661–2672, Jul. 2013. cell vehicles. He is pioneering the research on current-fed converters.
[24] B. Yuan, X. Yang, X. Zeng, J. Duan, J. Zhai, and D. Li, “Analysis and Dr. Rathore is an Associate Editor of the IEEE T RANSACTIONS ON I NDUS -
design of a high step-up current-fed multiresonant dc–dc converter with TRY A PPLICATIONS , the IEEE T RANSACTIONS ON P OWER E LECTRONICS ,
low circulating energy and zero-current switching for all active switches,” and the IEEE Journal on Emerging Selected Topics in Power Electronics
IEEE Trans. Ind. Electron., vol. 59, no. 2, pp. 964–978, Feb. 2012. (JESTPE). He is also an Editor of Electric Power Components and Systems
[25] F. Z. Peng, H. Li, G. J. Su, and J. S. Lawler, “A new ZVS bidirectional and a Guest Associate Editor for two special issues on transportation electrifi-
dc–dc converter for fuel cell and battery application,” IEEE Trans. Power cation and vehicle systems in the IEEE T RANSACTIONS ON P OWER E LEC -
Electron., vol. 19, no. 1, pp. 54–65, Jan. 2004. TRONICS and IEEE JESTPE. He was a recipient of Thouvenelle Graduate
[26] I. O. Lee, S. Y. Cho, and G. W. Moon, “Phase-shifted dual H-bridge Scholarship and University fellowship during his Ph.D. study and of a gold
converter with a wide ZVS range and reduced output filter,” in Proc. 38th medal for securing the highest academic standing in M.Tech. electrical engi-
IEEE IECON, 2012, pp. 656–661. neering specialization.