This article has been accepted for publication in a future issue of this journal, but has not been

fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2360404, IEEE Transactions on Power Electronics

Hybrid-type Full-bridge DC/DC Converter

with High Efficiency
Sung-Ho Lee, Chun-Yoon Park, Jung-Min Kwon, Member, IEEE, and Bong-Hwan Kwon, Member,
IEEE

 extend ZVS range or reduce the circulating current by utilizing

Abstract— This paper presents a hybrid-type full-bridge dc/dc additional passive or active auxiliary circuits. However, the
converter with high efficiency. Using a hybrid control scheme additional circuits result in complicated circuit configuration,
with a simple circuit structure, the proposed dc/dc converter has complex control strategy, and extra power losses [13]. In
a hybrid operation mode. Under a normal input range, the addition, some PSFB converters still require the extra snubber
proposed converter operates as a phase-shift full-bridge series- to prevent serious voltage ringing problem across rectifier
resonant converter that provides high efficiency by applying soft
switching on all switches and rectifier diodes and reducing
diodes. In [14], [15], the PSFB converters employing a series-
conduction losses. When the input is lower than the normal input resonant converter have been introduced, namely, the PSFB
range, the converter operates as an active-clamp step-up series-resonant converters; they have many advantages such as
converter that enhances an operation range. Due to the hybrid soft switching techniques of all primary switches and rectifier
operation, the proposed converter operates with larger phase- diodes, elimination of circulating current, reduction of voltage
shift value than the conventional converters under the normal stress on rectifier diodes, and a simple circuit structure.
input range. Thus, the proposed converter is capable of being However, when all aforementioned PSFB converters are
designed to give high power conversion efficiency and its required to guarantee a wide operation range, they still operate
operation range is extended. A 1kW prototype is implemented to with the small phase-shift value under the normal input range.
confirm the theoretical analysis and validity of the proposed
converter.
The operation with the small phase-shift value generally gives
high conduction losses by high peak current; it results in low
Index Terms— Full-bridge circuit, phase-shift control, active- power efficiency. To achieve high efficiency under the normal
clamp circuit. input range and cover the wide input range, the different
techniques are suggested. The converters in [16], [17] change
the turn ratio of the transformer by using additional switching
I. INTRODUCTION devices. Although the approach achieves high efficiency and
ensures the wide input range, these techniques give circuit
complexity and reduction of the transformer utilization.
N owadays, demands on dc/dc converters with a high power
density, high efficiency, and low electromagnetic
Active-clamp circuits have been commonly used to absorb
surge energy stored in leakage inductance of a transformer.
interference (EMI) have been increased in various industrial Moreover, the circuits provide a soft switching technique [18],
fields. As the switching frequency increases to obtain high [19]. Some studies have introduced dc/dc converters
power density, switching losses related to the turn-on and combining the active-clamp circuit and voltage doubler or
turn-off of the switching devices increase. Because these mulitpler rectifier [20], [21]. The circuit configuration allows
losses limit the increase of the switching frequency, soft to achieve a step-up function like a boost converter. The
switching techniques are indispensable. voltage stresses of rectifier diodes are also clamped at the
Among previous dc/dc converters, a phase-shift full-bridge output voltage and no extra snubber circuit is required.
(PSFB) converter is attractive because all primary switches are In this paper, a novel hybrid-type FB dc/dc converter with
turned on with zero-voltage switching (ZVS) without high efficiency is proposed; the converter is derived from a
additional auxiliary circuits [1]. However, the PSFB converter combination of a PSFB series-resonant converter and an
has some serious problems such as narrow ZVS range of active-clamp step-up converter with a voltage doubler circuit.
lagging-leg switches, high power losses by circulating current, Using a hybrid control scheme with a simple circuit structure,
and voltage ringing across rectifier diodes. Especially, with a the proposed converter has two operation modes. Under the
requirement of wide input range, the PSFB converter is normal input range, the proposed converter operates as a
designed to operate with small phase-shift value under the PSFB series-resonant converter. The proposed converter
normal input range; the design of the PSFB converter yields high efficiency by applying soft switching techniques
lengthens the freewheeling interval and causes the excessive on all the primary switches and rectifier diodes and by
circulating current which increases conduction losses [2], [3]. reducing conduction losses. When the input voltage is lower
Recently, the various PSFB converters using auxiliary than the normal input range, the converter operates as an
circuits have been introduced [4]-[12]. The PSFB converters active-clamp step-up converter. In this mode, the proposed
converter provides a step-up function by using
Manuscript received March 25, 2014; revised July 27, 2014.

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Fig. 1. Circuit diagram of the proposed hybrid-type full-bridge dc/dc converter.

the active-clamp circuit on the primary side and the voltage 4) The capacitance of the resonant capacitors Cr1 and Cr2 is
doubler rectifier on the secondary side. Due to the hybrid identical. Thus, Cr1=Cr2.
operation, the proposed converter operates with larger phase-
shift value than the conventional PSFB converters under the
A. PSFB Series-resonant Converter Mode
normal input range. Thus, the proposed converter has the
following advantages: Under the normal input voltage range, the proposed
1) Under the normal input range, the proposed converter converter is operated by phase-shift control. In this mode, Vc is
can be designed to optimize power conversion efficiency. the same as the input voltage Vd and DB is conducted. All
2) When the input is lower than the normal input range, the switches are driven with a constant duty ratio 0.5 and short
proposed converter performs a step-up function, which dead time. Fig. 2 and 3 show the operation waveforms and
enhances the operation range. equivalent circuits, respectively. A detailed mode analysis is
3) Without complex circuit structures, the converter has given as four modes.
high efficiency under the normal input range and extends Mode 1 [t0, t1]: Prior to t0, the switches S1 and S2 are in on-
the operation range. state and the secondary current is is zero. The primary current
The principle operation of the proposed converter is ip flows through DB, S1, S2, and Lm. During this mode, the
represented in Section II. The relevant analysis is given in primary voltage vp and secondary voltage vs of the transformer
Section III. Finally, a 1kW prototype of the proposed T are zero. Thus, the magnetizing current im is constant and
converter is implemented to confirm its theoretical analysis satisfies as follows:
and validity.
im (t )  i p (t )  im (t0 ). (1)
II. PRINCIPLE OPERATION OF THE PROPOSED CONVERTER Mode 2 [t1, t2]: At t1, S2 is turned off. Because ip flowing
through S2 is very low, S2 is turned off with near zero-current.
Fig.1 shows a circuit diagram of the proposed converter. On In this mode, ip charges CS2 and discharges CS4.
the primary side of the power transformer T, the proposed Mode 3 [t2, t3]: At t2, the voltage across S4 reaches zero. At
converter has a FB circuit with one blocking diode DB and one the same time, ip flows through the body diode DS4. Thus, S4 is
clamp capacitor Cc. On the secondary side, there is a voltage turned on with zero-voltage while DS4 is conducted. In this
doubler rectifier. The operation of the proposed converter can mode, vs is nVd where the turn ratio n of the transformer is
be classified into two cases. The one is a PSFB series-resonant given by Ns/Np and the secondary current is begins to flow
converter mode and the other is an active-clamp step-up through D1. The state equation of this mode is written as
converter mode. follows:
To analyze the steady-state operation of the proposed
converter, several assumptions are made. dis (t )
Llk  nVd  vcr1 (t )
1) All switches S1, S2, S3, and S4 are considered as ideal dt (2)
switches except for their body diodes and output capacitors. dv (t ) dv (t )
2) The clamp capacitor Cc and output capacitor Co are large is (t )  Cr1 cr1  Cr 2 cr 2 (3)
enough, so the clamp capacitor voltage Vc and output dt dt
voltage Vo have no ripple voltage, respectively.
3) The transformer T is composed of an ideal transformer where vcr1 and vcr2 are the voltages across Cr1 and Cr2,
with the primary winding turns Np, the secondary winding respectively. Since Vo is constant, the secondary current is can
turns Ns, the magnetizing inductance Lm, and the leakage be obtained as
inductance Llk.

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10.1109/TPEL.2014.2360404, IEEE Transactions on Power Electronics

DB
S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
Ns Llk
Lm Cc Co Ro

D2 Cr2
S3 S4

DS3 CS3 DS4 CS4

Mode 1

DB
S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
Ns Llk
Lm Cc Co Ro

D2 Cr2
S3 S4

DS3 CS3 DS4 CS4

Mode 2

DB
S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
Ns L lk
Lm Cc Co Ro

D2 Cr2
S3 S4

DS3 CS3 DS4 CS4

Mode 3

DB
S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
Ns L lk
Lm Cc Co Ro

Fig. 2. Operation waveforms in the PSFB series-resonant converter mode.

D2 Cr2
S3 S4

dvcr1 (t ) d (Vo  vcr1 (t )) dv (t ) DS3 CS3 DS4 CS4

is (t )  Cr1  Cr 2  Cr cr1 (4) Mode 4
dt dt dt
Fig. 3. Equivalent circuits during half period in the PSFB series-resonant
converter mode.
where the equivalent resonant capacitance Cr is Cr1+Cr2. Using
Eqns. (2) and (4), the secondary current is can be calculated as In this mode, power is transferred from the input to the output.
Mode 4 [t3, t4]: This mode begins when S1 is turned off. The
nVd  vcr1 (t2 ) primary current ip charges CS1 and discharges CS3. When the
is (t )  sin r (t  t2 ). voltage across S3 becomes zero, ip flows through the body
Zr (5)
diode DS3. Thus, S3 is turned on with zero-voltage while DS3 is
conducted. When vp is zero, D1 is still conducted and -vcr1 is
The angular frequency ωr and characteristic impedance Zr are applied to Llk. Thus, the secondary current is goes to zero
given by rapidly. End of this mode, since the secondary current is close
to zero before D1 is reverse bias, the losses by the reverse
1 Llk recovery problem are small as negligible.
r  , Zr  .
Llk Cr Cr (6) Since operations during the next half switching period are
similar with Mode 1-4, explanations of Mode 5-8 are not
presented.
Meanwhile, the magnetizing current im increases linearly as
follows:
B. Active-clamp Step-up Converter Mode
V As the input voltage decreases up to a certain minimum
im (t )  im (t2 )  d (t  t2 ).
Lm (7) value of the normal input range, the phase-shift value φ
increases up to its maximum value, 1. If the input voltage is

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on off DB
S1 S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
off on Np
S2 Ns Llk
Lm Cc Co Ro
off on
S3
D2 Cr2
S3 S4
S4 on off
DS3 CS3 DS4 CS4
Mode 1

is DB
S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
im Ns Llk
Lm Cc Co Ro

ip
D2 Cr2
S3 S4

DS3 CS3 DS4 CS4

Mode 2

iS1,
DB
iS4 S1 S2
D1 Cr1
ZVS DS1 CS1
Np
DS2 CS2
iS2, Ns Llk
iS3 Lm Cc Co Ro

D2 Cr2
S3 S4
t0 t1 t2 t3 t4
Mode 1 2 3 4 DS3 CS3 DS4 CS4
Mode 3
DTs
DB
Fig. 4. Operation waveforms in the active-clamp step-up converter mode. S1 S2
D1 Cr1
DS1 CS1 DS2 CS2
Np
lower than the minimum value of the normal input range, the Ns Llk
proposed converter is operated by dual asymmetrical pulse Lm Cc Co Ro

width modulation (PWM) control. The switches (S1, S4) and

(S2, S3) are treated as switch pairs and operated S3 S4
D2 Cr2

complementarily with short dead time. The duty D over 0.5 is DS3 CS3 DS4 CS4
based on (S1, S4) pair. In this situation, the clamp capacitor Mode 4
voltage Vc is higher than Vd. Then, the blocking diode DB is Fig. 5. Equivalent circuits during a switching period in the active-clamp
reverse biased and the proposed converter operates as the step-up converter mode.
active-clamp step-up converter. Fig. 4 and 5 show the
operation waveforms and equivalent circuits in the active- From Eqns. (9) and (10), the secondary current is can be
clamp step-up converter mode, respectively. calculated as
Mode 1 [t0, t1]: At t0, S1 and S4 are turned on. Since Vd is
applied to Lm, the magnetizing current im is linearly increased nVc  vcr 2 (t3 )
and is expressed as is (t )  is (t3 ) cos r (t  t3 )  sin r (t  t3 ). (11)
Zr
Vd
im (t )  im (t0 )  (t  t0 ). (8) In this mode, power is transferred from the input to the output.
Lm Mode 2 [t1, t2]: At t1, S1 and S4 are turned off. The primary
current ip charges and discharges the output capacitors of the
D1 is conducted and the secondary current is begins to resonate switches during very short time.
by Llk, Cr1, and Cr2. In this mode, the state equation is written Mode 3 [t2, t3]: This mode begins when the voltages across
as follows: S2 and S3 are zero. At the same time, ip flows through DS2 and
DS3. Thus, S2 and S3 are turned on with zero-voltage. Since the
dis (t ) negative voltage -Vc is applied to Lm, the magnetizing current
Llk  nVd  vcr1 (t ) im decreases linearly as
dt (9)
dv (t ) dv (t ) dv (t )
is (t )  Cr1 cr1  Cr 2 cr 2  Cr cr1 . (10) V
dt dt dt im (t )  im (t3 )  c (t  t3 ). (12)
Lm

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In this mode, the secondary current is begins to second

resonance and the state equation is written as follows:
di
Llk s  vcr 2 (t )  nVc
dt (13)
dv (t ) dv (t ) dv (t )
is (t )  Cr1 cr1  Cr 2 cr 2  Cr cr 2 . (14)
dt dt dt Vo
2nVd

Using Eqns. (13) and (14), the secondary current is given by

nVc  vcr 2 (t3 )

is (t )  is (t3 ) cos r (t  t3 )  sin r (t  t3 ). (15)
Zr
φ
Mode 4 [t3, t4]: At t3, S2 and S3 are turned off. The primary Q
current ip charges CS2, CS3 and discharges CS1, CS4 during very
short time. Fig. 6. Normalized voltage gain at F=1.05 in the PSFB series-resonant
converter mode.

From Eqns. (16) and (18), the voltage gain in the PSFB series-
III. ANALYSIS OF THE PROPOSED CONVERTER
resonant converter mode can be derived as follows:

In the PSFB series-resonant converter mode, Mode 4 is Vo 2n

neglected since the duration of Mode 4 is relatively very short.  .
Vd Q  Q 
During Mode 3, the secondary current is in Eqn. (5) flows  1 (19)
through D1; the current is the same as sum of the current   2 F 
F (1  cos )
charging Cr1 and current discharging Cr2. As shown in Fig.3, F
during the half switching period Ts/2, Cr2 is discharged as
much as the load current io while Cr1 is charged. Thus, the Fig. 6 shows the normalized voltage gain in the PSFB series-
average value of the current flowing through D1 is the same as resonant converter mode.
twice the load current during Ts/2. Due to the symmetric In the active-clamp step-up converter mode, the average
operation, the average value of the current flowing through D2 voltage Vc for D > 0.5 is obtained as
is also twice the load current during the next half switching
period. Both average values of vcr1 and vcr2 are Vo/2 and vcr1(t2) D
Vc  Vd . (20)
in Eqn. (5) is obtained from the ripple voltage ᇞvcr1 of Cr1 as 1 D

Vo vcr1 Vo 1 By the volt-second balance law for the magnetizing

2 2Cr1 
vcr1 (t2 )     icr1 ( )d
2 2 inductance Lm, the following equations are derived as
(16)
Vo  Ts  Vo  Q 
 1   1   n 2 Lm
2  2C r1 Ro  2  2F  nVd DTs  Vcr 2 (1  D )Ts (21)
n 2 Lm  Llk
where the frequency ratio F and quality factor Q are given by n 2 Lm
Vcr1DTs  nVc (1  D )Ts (22)
n 2 Lm  Llk
fs 4 L 4
F , Q  r lk  . (17)
fr Ro r Cr Ro where Vcr1 and Vcr2 are the average values of the voltages
across Ccr1 and Ccr2, respectively. The sum of Vcr1 and Vcr2 is
Because the average value of the current flowing through D1 Vo. From Eqns. (21) and (22), the average values Vcr1 and Vcr2
during Ts/2 is the same as 2io and is zero during next half are obtained as
switching period, the average value of the current flowing
through D1 during Ts is equal to io. Thus, the load current io
n 2 Lm  Llk
can be derived as Vcr1  Vd  (1  D )Vo (23)
nLm
V 1  t T /2 nVd  vcr1 (t2 )  n 2 Lm  Llk D
io  o    2 s sin r (  t2 )d  Vcr 2  Vd  DVo . (24)
Ro Ts  t2 Zr  nLm 1 D
(18)
 nV  vcr1 (t2 )  
F d (1  cos )  . Assuming Llk is much smaller than Lm, the voltage gain in the
 2 Z r F 
active-clamp step-up converter mode can be derived as
follows:

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Vo n TABLE I
 . (25) PARAMETERS OF THE PROTOTYPE
Vd 1  D
Parameters Symbols Value
The voltage gain becomes that of an isolated boost converter. Input voltage Vd 250-350V
It means that the proposed converter performs step-up Output voltage Vo 200V
function in the active-clamp step-up converter mode.
Switching frequency fs 50kHz
In the PSFB series-resonant converter, the leading-leg
switches S1 and S3 can be easily turned on with zero-voltage Primary winding turns Np 24turns
by the reflected secondary current. However, when the state of Secondary winding turns Ns 8turns
the lagging-leg switches S2 and S4 are changed, the secondary Magnetizing inductance Lm 695μH
current is zero. Thus, only the energy stored in Lm is involved Leakage inductance Llk 8.3μH
in ZVS of the lagging-leg switches condition; it is obtained as
Clamp capacitor Cc 11μF
Resonant capacitors Cr1,Cr2 680nF
1 i 1 Vd 2 4
Lm ( m )2  Lm ( )  CmVd 2 (26) Output capacitor Co 680μF
2 2 2 4 Lm f s 3
Switches S1, S2, S3, S4 STW26NM60
Blocking diode DB FFAF40U60DN
where Cm is the output capacitance of the MOSFET switches.
From Eqn. (26), the magnetizing inductance Lm can be decided Output diodes D1, D2 FFPF15U40S
as
3min 2
Lm  (27)
128Cm f s 2

where φmin is the minimum value of φ. The ZCS condition of

the lagging-leg switches is related to the frequency ratio. As F
increases, the ZCS range decreases [15]. Therefore, to
guarantee both ZVS of all primary switches and ZCS of the
lagging-leg switches, F should be selected to be slightly more
than one. In the active-clamp step-up converter mode, S2 and
S3 can achieve ZVS turn-on naturally from the asymmetrical
PWM operation.
As shown in Fig.2, in the PSFB series-resonant converter
mode, Llk performs as the output inductor and all energy stored
in Llk is delivered to the load until the secondary current is (a)
zero. Then, only small magnetizing current flows on the
primary side. In the active-clamp step-up converter, the
proposed converter is operated by dual asymmetrical PWM
control scheme. In the PWM scheme, there is no circulating
current [22]. Thus, the proposed converter eliminates the
conduction loss by the circulating current in the entire
operation range.

IV. IMPLEMENTATION AND EXPERIMENTS

To evaluate a feasibility of the proposed converter, a 1kW

prototype was built and tested. The operation range of the
proposed converter is from 250V to 350V. The output voltage (b)
is designated as 200V and the normal input range is set up
from 320V to 350V. Fig. 7. Experimental waveforms for the gate signals and output voltage
according to the operation mode. (a) PSFB series-resonant converter mode
when Vd =350V. (b) Active-clamp step-up converter when Vd =250V.
A. Implementation of The Prototype
Considering power conversion efficiency under the normal slightly more than one. The quality factor Q is decided by Eqn.
input range, the proposed converter is designed. To obtain (17). If Q is too small, the proposed converter is operated with
ZVS turn-on of the switches, the switching frequency fs should small φ under the normal input range. Thus, Llk is selected as
be higher than the resonant frequency fr. By the design rule 8.3μH. From the normal input range, the turn ratio n is decided
proved in [15], the frequency ratio F (fs/fr) is selected to be by Eqn. (19) and Fig. 6. All switch stresses are determined by

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(a) (a)

vgs_S2►
vgs_S2 [25V/div.]

iS2 ►
iS2 [5A/div.]

time [4μs/div.]
(b) (b)

Fig. 8. Experimental waveforms for soft switching in the PSFB series- Fig. 9. Experimental waveforms for the current stress when Vd =350V. (a)
resonant converter mode. (a) ZVS turn-on of S1. (b) ZVS turn-on and ZCS Conventional PSFB series-resonant converter. (b) Proposed converter.
turn-off of S2.

the input voltage in the PSFB series-resonant converter mode.

On the other hand, in the active-clamp step-up converter mode,
the voltage stress of the switches S1 and S2 are the same as the
input voltage and those of S3 and S4 are determined by Eqn. (20).
In both the operation modes, voltage stresses of the rectifier
diodes are clamped at the output voltage Vo. The major
experimental parameters are presented in Table I. The
prototype is implemented using a single DSP chip,
dsPIC33EP512GM604 (Microchip) which provides both
phase-shift and asymmetrical PWM control.

B. Experimental Results
Fig. 7 shows waveforms for the gate signals and output
voltage in the proposed converter according to the operation Fig. 10. Experimental waveforms for the input voltage Vd and output
mode. vgs_S1 and vgs_S2 are each gate signal for S1 and S2, voltage Vo in the transition-state.
respectively. When the input voltage is 350V, the proposed
converter is operated by phase-shift control with the constant zero current as the theoretical analysis. Fig. 9 show waveforms
duty 0.5. On the other hand, when the input voltage is 250V, for the primary voltage vp and current ip of the conventional
the proposed converter is operated by the asymmetrical PWM PSFB series-resonant converter and the proposed converter at
control with the duty 0.61. In both operation modes, the full-load condition under the normal input range. In the
proposed converter regulates vo. Fig. 8 (a) and (b) show conventional PSFB series-resonant converter, to guarantee the
waveforms for the gate signals and currents of S1 and S2 at full designated operation range, higher turn ratio n (=0.417) is
load condition when Vd = 350V. When the switches are turned required than the proposed converter. Other parameters are
on, the currents flow through the body diode of each switch. It shown in Table I. When the input voltage Vd is 350V, the
is clear that all switches are turned on with zero-voltage. conventional converter operates with small φ (=0.5). On the
Furthermore, as shown in Fig. 8 (b), S2 is turned off with near other hand, the proposed converter is operated with larger φ

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condition when the input voltage Vd decreases from 250V to

200V. As shown in Fig. 12, in the below designated operation
range of the conventional converter, Vo decreases. In the
proposed converter, Vo is maintained as 200V although the
input voltage decreases below the designated operation range.
Fig. 13 shows the comparative plot of analytical and
experimental voltage gain of the proposed converter. When
the phase-shift value φ is expressed using the duty D, φ/2 can
be represented as D. The measured voltage gain is similar to
the theoretical analysis in Eqns. (19) and (25). As shown in the
Fig. 13, the proposed converter has both the step-down and
step-up functions.

Fig. 11. Measured efficiencies under the normal input range according to V. CONCLUSION
the output power

The novel hybrid-type full-bridge dc/dc converter with high

efficiency has been introduced and verified by the analysis and
experimental results. By using the hybrid control scheme with
the simple circuit structure, the proposed converter has both
the step-down and step-up functions, which ensure to cover
the wide input range. Under the normal input range, the
proposed converter achieves high efficiency by providing soft
switching technique to all the switches and rectifier diodes,
and reducing the current stress. When the input is lower than
the normal input range, the proposed converter provides the
step-up function by using the active-clamp circuit and voltage
doubler, which extends the operation range. To confirm the
validity of the proposed converter, 1kW prototype was built
and tested. Under the normal input range, the conversion
Fig. 12. Variation of output voltage in the below designated operation efficiency is over 96% at full-load condition, and the input
range.
range from 250V to 350V is guaranteed. Thus, the proposed
converter has many advantages such as high efficiency and
wide input range.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI
10.1109/TPEL.2014.2360404, IEEE Transactions on Power Electronics

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Since 1987, he has been with the Department of
Electronic and Electrical Engineering, Pohang University of Science and
Technology (POSTECH), Pohang, Korea, where he is currently a Professor.
His research interests include converters for renewable energy, high-
frequency converters, and switch-mode power supplies.

0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.