IPC J-STD-003C

September 2013
Supersedes
J-STD-003B March 2007

JOINT
INDUSTRY
STANDARD

Solderability
Tests for
Printed Boards
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problems for future improvement

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 IPC J-STD-003C
®

Solderability
Tests for
Printed Boards

Developed by the Printed Circuit Board Solderability Specifications

Task Group (5-23a) of the Assembly and Joining Committee (5-20)
of IPC

Supersedes: Users of this publication are encouraged to participate in the

J-STD-003B - March 2007 development of future revisions.
J-STD-003A - February 2003
J-STD-003 - April 1992 Contact:
IPC-S-804A - January 1987 IPC
IPC-S-803 3000 Lakeside Drive, Suite 309S
IPC-S-801
Bannockburn, IL 60015-1249
Phone ( 847) 615-7100
Fax (847) 615-7105
This Page Intentionally Left Blank
September 2013 IPC J-STD-003C

Acknowledgment
Any document involving a complex technology draws material from a vast number of sources. While the principal members
of the Printed Circuit Board Solderability Specifications Task Group (5-23a) of the Assembly and Joining Committee (5-20)
are shown below, it is not possible to include all of those who assisted in the evolution of this Standard. To each of them,
the members of IPC extend their gratitude.

Assembly and Joining Printed Circuit Board Technical Liaison of the

Committee Solderability Specifications IPC Board of Directors
Task Group

Chair Chair
Leo P. Lambert Gerard A. Obrien Bob Neves
EPTAC Solderability Testing & Solutions, Inc. Microtek Laboratories
Vice Chair Vice Chair
Renee J. Michalkiewicz Michah Pledger
Trace Laboratories - Baltimore Pledger Consulting

Printed Circuit Board Solderability Specifications Task Group

Douglas Schueller, AbelConn, LLC Peter Bratin, ECI Technology, Inc. Linda Woody, Lockheed Martin
Constantino Gonzalez, ACME Michael Pavlov, ECI Technology, Inc. Missile & Fire Control
Training & Consulting Julie Filips, Elbit Systems of America Beatriz Bennett, Lockheed Martin
Mitchell Holtzer, Alpha Jose Rios, Endicott Interconnect Missiles & Fire Control
Anna Lifton, Alpha Technologies Inc C. Don Dupriest, Lockheed Martin
Karen Tellefsen, Alpha Leo Lambert, EPTAC Corporation Missiles & Fire Control
Andrew Giamis, Andrew Corporation Terry Munson, Foresite, Inc. Steven Nolan, Lockheed Martin
Mission Systems & Training
George Wenger, Andrew Corporation Martin Bayes, Four Square
Consulting John Potenza, Lockheed Martin
Arnie Melby, Appareo Systems, LLC
Mission Systems & Training
Greg Alexander, Ascentech LLC Graham Naisbitt, Gen3 Systems
Limited Hue Green, Lockheed Martin Space
Fritz, Byle Astronautics Corp. of Systems Company
America Brian Wardhaugh, Gen3 Systems
Limited Dennis Fritz, MacDermid, Inc.
Christopher, Ryder, AT&S Austria
Gregg Klawson, General Dynamics - Lenora Toscano, MacDermid, Inc.
Technologie & Systemtechnik AG
C4 Systems Tom Fujikawa, Malcomtech
William Dieffenbacher, BAE Systems
Brian Toleno, Henkel Corporation International
Platform Solutions
Kristen Troxel, Hewlett-Packard Russell Shepherd, Microtek
Beverley Christian, BlackBerry
Company Laboratories Anaheim
Mary Bellon, Boeing Research &
Patrick O’Keefe, Holaday Circuits James, Clark Multek Flexible
Development
Inc. Circuits, Inc.
Todd MacFadden, Bose Corporation
Richard Davidson, Honeywell Christopher Hunt, National Physical
Louis Hart, Compunetics Inc. Laboratory
Aerospace
Israel Martinez, Continental Darrell Freiwald, Northrop Grumman
Automotive Nogales S.A. de C.V. Raiyomand Aspandiar, Intel
Corporation Mahendra Gandhi, Northrop
Mark Fulcher, Continental Grumman Aerospace Systems
Automotive Systems Jagadeesh Radhakrishnan, Intel
Corporation William Miller, Panasonic
Brian Madsen, Continental Automotive Systems Company
Automotive Systems Reza Ghaffarian, Jet Propulsion
Laboratory of America
David Corbett, Defense Supply Mumtaz Bora, Peregrine
Center Columbus Byron Case, L-3 Communications
Semiconductor
Lowell Sherman, Defense Supply Bradley Toone, L-3 Communications
Michah Pledger, Pledger Consulting
Center Columbus William Fox, Lockheed Martin
Missile & Fire Control Richard Kraszewski, Plexus Corp.
Glenn Dody, Dody Consulting
Vijay Kumar, Lockheed Martin Ursula Marquez de Tino, Plexus
Anne Lomonte, Draeger Medical Corporation
Systems, Inc. Missile & Fire Control

iii
IPC J-STD-003C September 2013

Bill Beair, Raytheon Company Srinivas Chada, Schlumberger Well Calette Chamness, U.S. Army
Richard Iodice, Raytheon Company Services Aviation & Missile Command
Roger Miedico, Raytheon Company Mary Petrusek, Schlumberger Well Crystal Vanderpan, UL LLC
Jeff Shubrooks, Raytheon Company Services Ty Gragg, Unicircuit Inc.
Bill Vuono, Raytheon Company Henry Rekers, Schneider Electric Donald Gudeczauskas, Uyemura
Martin Scionti, Raytheon Missile Gerard O’Brien, Solderability Testing International Corp.
Systems & Solutions, Inc. George Milad, Uyemura International
Wesley Wolverton, Raytheon Systems Stephen Meeks, St. Jude Medical Corp.
Company David Sommervold, The Bergquist Wendi Boger, Viasystems Group, Inc.
Jason Koch, Robisan Laboratory Inc. Company, Prescott Mike Hill, Viasystems Group, Inc.
Chris Mahanna, Robisan Laboratory Elizabeth Allison, Trace Randy Reed, Viasystems Group, Inc.
Inc. Laboratories - Baltimore Juan Vasquez, Viasystems Group, Inc.
David Adams, Rockwell Collins Renee Michalkiewicz, Trace Zhe (Jacky) Liu, ZTE Corporation
Laboratories - Baltimore
Robert Bagsby, Rockwell Collins Jianfeng Liu, ZTE Corporation
Debora Obitz, Trace Laboratories -
Rachel Grinvalds, Rockwell Collins Jiamin Zhang, ZTE Corporation
Baltimore
David Hillman, Rockwell Collins Gerard Donovan
James Monarchio, TTM
Gaston Hidalgo, Samsung Technologies, Inc. John Rohlfing
Telecommunications America

SPECIAL ACKNOWLEDGMENT
The author thanks the International Electrotechnical Commission (IEC) per permission to reproduce Figures 4-6 and 4-7
which include information from its International Standards IEC 60068-2-69 ed.2.0 (2007) and IEC 60068-2-54 ed.2.0
(2006). All such extracts are copyright of IEC, Genva, Switzerland. All rights reserved. Further information on the IEC is
available from www.iec.ch. IEC has no responsibility for the placement and context in which the extracts and contents are
reproduced by the author, nor is IEC in any way responsible for the other content or accuracy therein.

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September 2013 IPC J-STD-003C

Table of Contents
1 GENERAL ................................................................. 1 3.3.4 Dipping Equipment ............................................... 6
1.1 Scope ..................................................................... 1 3.3.5 Timing Equipment ................................................ 6
1.2 Purpose .................................................................. 1 3.4 Preparation for Testing ......................................... 6
1.3 Objective ............................................................... 1 3.4.1 Test Specimen Preparation and Conditioning
1.3.1 Definition of Requirements .................................. 1 for Test .................................................................. 6
1.3.2 Document Hierarchy ............................................. 1 3.4.2 Pretest Conditioning .............................................. 7
1.4 Classification ......................................................... 1 3.4.3 Steam Preconditioning Apparatus ........................ 7
1.5 Test Method Classification ................................... 2 3.4.4 Steam Conditioning .............................................. 7
1.5.1 Visual Acceptance Criteria Tests .......................... 2 3.4.5 Baking ................................................................... 8
1.5.2 Force Measurement Criteria Tests ........................ 2 3.5 Solder Bath Requirements .................................... 8
1.6 Test Method Selection .......................................... 2 3.5.1 Solder Temperatures ............................................. 8
1.6.1 New Surface Finishes Not Covered in 6010 3.5.2 Solder Contamination Control .............................. 8
or by 4500 Series Documents .............................. 2
4 TEST PROCEDURES ............................................... 8
1.7 Test Specimen Requirements ................................ 2 4.1 Test Procedure Limitations ................................... 8
1.8 Coating Durability – SnPb Containing 4.1.1 Application of Flux ............................................... 9
(HASL and Plated and Reflowed SnPb)
Surface Finishes .................................................... 3 4.2 Tests with Established Accept/Reject Criteria ..... 9
1.9 Coating Durability – Non-SnPb 4.2.1 Edge Dip Test ....................................................... 9
Surface Finishes .................................................... 4 4.2.2 Wave Solder Test: ............................................... 11
2 APPLICABLE DOCUMENTS .................................... 4 4.2.3 Surface Mount Simulation Test Tin/Lead
Solder .................................................................. 12
2.1 Industry .................................................................. 4
4.3 Tests with Force Measurement Criteria ............. 14
2.1.1 IPC ......................................................................... 4
4.3.1 Wetting Balance Test .......................................... 14
2.2 Joint Industry Standards ....................................... 4
4.4.1 Solder Float Test Tin/Lead Solder ..................... 17
3 REQUIREMENTS ...................................................... 5 4.4.2 Apparatus ............................................................ 17
3.1 Terms and Definitions ........................................... 5 4.4.3 Evaluation ............................................................ 17
3.1.1 Contact Angle, Soldering* .................................... 5
5 EVALUATION AIDS ................................................ 18
3.1.2 Dewetting* ............................................................ 5
5.1 Evaluation Aids – Surface .................................. 18
3.1.3 Dissolution of Component Metallization
(Leaching) ............................................................. 5 5.2 Evaluation Aids – For Class 3 Plated-
Through Holes .................................................... 19
3.1.4 Equilibrium Wetting .............................................. 5
3.1.5 Nonwetting, Solder* ............................................. 5 6 NOTES ..................................................................... 20
3.1.6 Pinhole* ................................................................. 5 6.1 Correction for Buoyancy .................................... 20
3.1.7 Solderability* ........................................................ 5 6.2 Preheat ................................................................. 20
3.1.8 Solder Connection Pinhole* ................................. 5 6.3 Prebaking ............................................................. 20
3.1.9 Wetting, Solder* ................................................... 5 6.4 Safety Note .......................................................... 20
3.2 Materials ................................................................ 5 6.5 Use of Nonactivated Flux ................................... 20
3.2.1 Solder .................................................................... 5 6.6 Solder Contact ..................................................... 20
3.2.2 Flux ........................................................................ 5 APPENDIX A Calculation of Maximum
3.2.3 Flux Removal ........................................................ 6 Theoretical Force for a
Rectangular Cross-Section ............... 21
3.3 Equipment ............................................................. 6
3.3.1 Pre-Conditioning Equipment ................................ 6 APPENDIX B Calculation of Area under the
Wetting Curve .................................... 23
3.3.2 Solder Pot/Bath ..................................................... 6
3.3.3 Optical Inspection Equipment .............................. 6 APPENDIX C Informative Annex ............................. 24

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IPC J-STD-003C September 2013

APPENDIX D Test Protocol for Wetting Balance Figure 4-12 Set B Wetting Curve ......................................... 16
Gauge Repeatability and Repro- Figure 5-1 I Sn Surface Finish Showing Uniform
ducibility (G R&R) Using Wetting .............................................................. 18
Copper Foil Coupons ........................ 26
Figure 5-2 I Sn Surface Finish Showing Chronic
APPENDIX E J-STD-002/J-STD-003 Activated Dewetting .......................................................... 18
Solderability Test Flux Rationale Figure 5-3 ENIG Exhibiting Nonwetting .............................. 18
Committee Letter ............................... 28
Figure 5-4 ENIG Exhibiting Nonwetting .............................. 18
Figures Figure 5-5 ENIG Exhibiting Dewetting ................................ 19
Figure 5-6 ENIG Exhibiting Dewetting ................................ 19
Figure 3-1 Contact Angle ...................................................... 5
Figure 5-7 HASL Surface Finish after Wetting Balance
Figure 3-2 Example Reticle .................................................. 6
Testing, showing Excellent Wetting and
Figure 4-1 Edge Dip Solderability Test ................................. 9 Positive Advancement of Solder ....................... 19
Figure 4-2 Suggested Test Specimen for Plated-
Through Holes ................................................... 10 Tables
Figure 4-3 Suggested Test Specimen for Surface Table 1-1 Solderability Test Method Selection .................... 3
Mount Features ................................................. 10
Table 1-2 Final Finish Conditioning/ Stress Testing for
Figure 4-4 Effectiveness of Solder Wetting of Plated- Category 3 Durability .......................................... 3
Through Holes – Class 3 below 3.0 mm .......... 12
Table 3-1 Flux Composition ................................................ 6
Figure 4-5 Examples of Solder Wetting of Plated-
Through Holes – Class 3 below 3.0 mm .......... 12 Table 3-2 Steam Temperature Requirements ..................... 7
Figure 4-6 Arrangement for the Test Apparatus (Solder Table 3-2 Maximum Limits of Solder Bath Contaminant .... 8
Bath Wetting Balance Method) ......................... 14 Table 4-1 Stencil Thickness Requirements ....................... 13
Figure 4-7 Arrangement for the Test Apparatus (Solder Table 4-2 Reflow Parameter Requirements – SnPb ......... 13
Globule Wetting Balance Method) .................... 14
Table 4-3 Lead-Free Reflow Parameter Requirements .... 13
Figure 4-8 Suggested Wetting Balance and Soldering
Immersion Test Specimens ............................... 14 Table 4-4 Pass/Fail Criteria for Specific Surface
Finishes Using Eutectic SnPb ........................... 15
Figure 4-9 Wetting Balance Test Soldering Immersion
at 90° for Double Sided Finishes ...................... 15 Table 4-5 Pass/Fail Criteria for Specific Surface
Finishes Using SAC305 Solder ........................ 16
Figure 4-10 Wetting Balance Test Soldering Immersion
at 20 to 40° for Single Sided Coupons/ Table 4-6 Wetting Balance Parameter and
Samples Removed from PB’s ........................... 15 Suggested Criteria ............................................ 16
Figure 4-11 Set A Wetting Curve .......................................... 16 Table E-1 Flux Compositions ............................................. 28

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September 2013 IPC J-STD-003C

Solderability Tests for Printed Boards

1 GENERAL

1.1 Scope This standard prescribes test methods, defect definitions, and illustrations for assessing the solderability of
printed wiring board surface conductors, attachment lands, and plated-through holes. This standard is intended for use by
both vendor and user.
This standard is not intended to verify the potential of successful processing at assembly or to evaluate design impact on
wettability. This specification describes procedures or methods to determine the acceptable wettability of a surface finish.
Wettability can be affected by handling, finish application, and environmental conditions.

1.2 Purpose This standard describes solderability determinations that are made to verify that the printed board fabrication
processes and subsequent storage have had no adverse effect on the solderability of those portions of the printed board
intended to be soldered. Reference coupons or representative portions of a printed board may be used. Solderability is deter-
mined by evaluation of a test specimen which has been processed as part of a panel of boards and subsequently removed
for testing per the method selected.

1.3 Objective To provide solderability test methods to determine the acceptance of printed board surface conductors,
attachment lands, and plated-through holes to wet easily with solder, and to withstand the rigors of the printed board assem-
bly processes.

1.3.1 Definition of Requirements The word ‘‘shall’’ is used in the text of this document wherever there is a requirement
for materials, preparation, process control, or acceptance of a soldered connection or a test method. The word ‘‘should’’
reflects ‘‘best processing techniques’’ and is used to reflect general industry practices and a suggestion for guidance only.

1.3.2 Document Hierarchy In the event of conflict, the following descending order of precedence applies:
a. Procurement documentation as agreed between user and supplier, which should include expected shelf life requirements
if stored and handled properly.
b. Master drawing or master assembly drawing reflecting the user’s detailed requirements.
c. When required by the customer or per contractual agreement, this document, J-STD-003.
d. Other documents, to the extent specified by the customer.

1.4 Classification Three general classes have been established to reflect progressive increases in sophistication, functional
performance requirements, and testing/ inspection frequency as defined in the IPC-6010 series of documents.
The user is responsible for defining the product class. The product class should be stated in the procurement documentation
package.

CLASS 1 General Electronic Products

Includes products suitable for applications where the major requirement is function of the completed assembly.

CLASS 2 Dedicated Service Electronic Products

Includes products where continued performance and extended life is required, and for which uninterrupted service is desired
but not critical. Typically the end-use environment would not cause failures.

CLASS 3 High Performance Electronic Products

Includes products where continued high performance or performance-on-demand is critical, equipment downtime cannot be
tolerated, end-use environment may be uncommonly harsh, and the equipment must function when required, such as life
support or other critical systems.
Circuit board performance classes do not dictate the surface finish durability rating that may be specified. Category 2/
Category A durability is the default coating durability rating.

1
IPC J-STD-003C September 2013

This specification relies on input from the 4-14 plating process subcommittee and the 4500 series of printed board surface
finish documents generated in that subcommittee to determine the durability rating potential for each specified finish. This
document and the appropriate 4500 series document should be considered complimentary to one another.

1.5 Test Method Classification This standard describes test methods by which the surface conductors, attachment lands,
and plated-through holes may be evaluated for solderability. Edge Dip, Wave Solder, Surface Mount Simulation, and Wet-
ting Balance testing can be used for both tin-lead (SnPb) and SAC 305 alloys.
Edge Dip and Surface Mount Simulation testing procedures are to be used as ‘‘default’’ solderability tests. Provisions are
made for this determination to be performed at the time of manufacture, at the receipt of the boards by the user, or prior to
assembly and soldering. User and vendor shall agree to the appropriate method and timing to be used as a representative
correlation and/or requirement.
Solder float testing has been shown, following extensive round robin testing, not to have an acceptable Gauge Repeat-
ability & Reproducibility (G R&R) value and the validity of the results achieved as part of conformance testing are consid-
ered questionable. It is strongly suggested to utilize the ‘‘solder sample’’ printed board (PB) sent by the board supplier for
wave solder testing at the production site to ensure an accurate result.
Standard dwell times are defined in some of the methods called out in this standard. It should be noted that these times are
a range based on a ‘‘thermal mass’’ demand of the sample being tested (see 6.2).
The following tests apply to both Tin Lead Solder Alloy (SnPb) and Lead Free (Pb-Free) Solder Alloy (SAC 305).
The following tests are considered destructive tests. Tested printed wiring boards (PWBs) should not be used in further
production steps.

1.5.1 Visual Acceptance Criteria Tests

Edge Dip Test For surface conductors and attachment lands only (see 4.2.1).
Wave Solder Test For plated-through holes, surface conductors and attachment lands, solder source side (see 4.2.2).
Surface Mount Simulation Test For surface conductors and attachment lands (see 4.2.3).
Solder Float Test For conformance testing only per the requirements of IPC-6010 series (see 4.4.1).

1.5.2 Force Measurement Criteria Tests

Wetting Balance Test For surface conductors and attachment lands (see 4.3.1). Through hole solderability may be evalu-
ated by wetting balance, but there are no defined pass/fail criteria for wetting force or wetting time.

1.6 Test Method Selection For appropriate test selection refer to 1.5 and Table 1-1. The test selection should consider the
final soldering process method and conditions (e.g., soldering alloy, temperature and dwell time). The results of the testing
should represent this process.

1.6.1 New Surface Finishes Not Covered in 6010 or by 4500 Series Documents The industry continues to develop new
and novel surface finishes that have been found in some instances not to be compatible with the liquid test fluxes #1 and
#2 for solderability evaluation. For surface finishes that fall into this category, the test method and flux used for solder-
ability evaluation shall be as agreed between user and supplier (AABUS).

1.7 Test Specimen Requirements The test specimen shall be a representative test specimen, a portion of the printed
board being tested, or a whole board if within size limits, such that the immersion depth defined in the individual method
is possible. The test specimen shall be representative of the lot being tested. When this test specimen is to be used as a
criterion for material acceptance, the number of test specimens shall be defined by agreement between the user and vendor.
Test specimens that may be used for rigid board surface solderability and plated-through hole solderability are detailed in
the paragraph sections under the individual test methods. Similar test specimens may be used provided they reflect the board
circuitry, hole, and construction and have been processed in conjunction with the printed board being evaluated. The test
specimen to be used should be AABUS.
Unless otherwise specified, the land associated with a plated-through hole shall be considered part of the plated-through hole
if it is used for through-hole attachment. In this case, only tests for hole solderability apply. If the land is used for surface
attachment of parts, then such lands shall be tested for both hole and surface solderability.

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September 2013 IPC J-STD-003C

Table 1-1 Solderability Test Method Selection

Pre-Conditioning Alternative Applies to Surface Plated Through
Test Method Surface Finish Default Conditioning Features Holes
Pb-Containing Steam exposurea NA Yes NA
Edge dip test Reflow Simulation
All other 8 hours (3.4.2)b Yes NA
2X (3.4.2)b
Yes (solder source
Pb-Containing Steam exposurea NA Yes
side only)
Wave solder
Reflow Simulation Yes (solder source
All other 8 hours (3.4.2)b Yes
2X (3.4.2)b side only)
Pb-Containing Steam exposurea NA Yes NA
Surface mount
simulation b Reflow Simulation
All other 8 hours (3.4.2) Yes NA
2X (3.4.2)b
Solder float test Yes (solder source
Pb-Containing Not applicable NA Yes
(compliance side only)
to IPC-601X Yes (solder source
series only) All other Not applicable NA Yes
side only)
Tests with Force Measurement Criteria (refer to 1.5.2)
Pb-Containing Steam exposurea NA Yes NA
Wetting balance Reflow Simulation
All other 8 hours (3.4.2)b Yes NA
2X (3.4.2)b
The use of the preconditioning stressing shall be restricted to the following:
a. Steam exposure precondition for Pb-bearing surface finish requirements only. The requirements should be listed in the procurement documentation.
b. PWBs that are less than eight weeks older than the date code on the lot, unless AABUS. Pb-containing surface finishes are HASL and reflowed plated
SnPb. All other surface finished currently include; ENIIS, ENEPIG, I Ag, I Sn, OSP, Pb-free, HAL, E Pd, NiAu, and Electroless AU.

1.8 Coating Durability – SnPb Containing (HASL and Plated and Reflowed SnPb) Surface Finishes Shelf life criteria is
applicable only to surface finishes that contain SnPb. Data exists to show that, for surface finishes containing SnPb, expo-
sure to 8 hours of steam equates to one year of shelf life, this primarily being a function of copper-tin (CuSn) intermetallic
growth within the structure. The use of the coating durability rankings with time as an integral component of the definition
can only be applied to them and are as follows:
Category 1: Minimum Coating Durability: Intended to be soldered within 30 days from the date of manufacture and are
likely to experience minimal thermal exposures, i.e., a single reflow or wave solder assembly.
Category 2: Average Coating Durability: Intended for boards likely to experience storage up to six months from the date
of manufacture and moderate thermal or solder exposures. This is the default coating rating.
Category 3: Maximum Coating Durability: Intended for boards likely to experience long storage (over six months) from
the date of manufacture, severe thermal or soldering process steps, or other extreme stresses. It should be recognized that
there may be a cost premium or delivery delay associated with boards ordered to this durability level. See Table 1-2 for final
finish stressing conditions.
Table 1-2 Final Finish Conditioning/ Stress Testing for Category 3 Durability
Surface Finish Default Stressing Acceptable Alternative
HASL (SnPb)/ Reflowed SnPb 8 hours of steam exposure 2X reflow per IPC-TM-650, 2.6.27
HAL (Pb-free) 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
ENIG 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
ENEPIG 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
I Ag 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
I Sn 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
OSP 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
E Pd 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
NiAu 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27
Other 8 hours of 72 °C [162 °F]/85% R.H 2X reflow per IPC-TM-650, 2.6.27

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IPC J-STD-003C September 2013

1.9 Coating Durability – Non-SnPb Surface Finishes There are no correlations between steam exposure and either shelf
life or processability with the alternate surface finishes currently in use. Steam exposure will render most of the alternate
surface finishes unsolderable after only 1 hour of exposure.
The robustness of the surface finish shall be defined in the appropriate IPC-4550 series document. It is noted that the 4-14
Plating Process Subcommittee usually specifies the surface finish for maximum coating durability and robustness as the
default, with some exceptions. Stressing of surface finishes prior to solderability testing is used to provide a determination
of robustness of the finish that may be used to evaluate the quality of a surface finish and the likelihood for assembly related
issues with multiple thermal excursions and/or complex assembly processes. It may also be used to compare the performance
of similar surface finishes from different suppliers. Exposure to the stressing protocols is not intended to predict shelf life
of a surface finish. It may be inferred that successful testing of a surface finish post stressing and stored according to the
manufacturers recommendations should allow the surface finish to meet industry requirements for one year of shelf life
unless otherwise stated in an appropriate IPC-4500 series document. Coating Durability A is considered the default condi-
tion.
Coating Durability A: Intended for boards likely to experience moderate assembly processes including Pb-free assembly,
typically a single reflow or wave assembly.
Coating Durability B: Intended for boards likely to experience multiple soldering and/or other process steps using SnPb
or Pb-free assembly profiles when defined in the procurement documentation.
Following stressing in humidity and/or steam exposure as appropriate, the boards shall be baked for 1 hour at 105 °C prior
to testing.
Requirement Post Stressing:
a. For the Edge Dip Test A: Each and every feature to exhibit wetting with the minimum of 95% of each feature show-
ing uniform smooth coverage. All holes shall show evidence of wetting.
b. For the Wave Solder Test: All SMT pads on the wave side of the board and holes shall wet and fill and meet the
requirements of the test.
c. For the Surface Mount Simulation Test: Where paste is applied, there shall be evidence of at least 95% of each pad
wetting.
d. For the Wetting Balance Test: There shall be evidence of positive wetting with an allowable increase in wetting time
of 2X that of the non-stressed samples. The final wetting force shall be at least 70% that of the non-stressed samples.
e. For IPC-6010 Compliance Testing: Holes shall show evidence of wetting and meet the fill percentage requirements of
Class 1, 2, or 3.

2 APPLICABLE DOCUMENTS
The following documents of the issue currently in effect form a part of this standard to the extent specified herein.

2.1 Industry

2.1.1 IPC1

IPC-T-50 Terms and Definitions

IPC-TM-650 Test Methods Manual
IPC-1601 Printed Board Handling and Storage Guidelines

2.2 Joint Industry Standards2

J-STD-002 Solderability Tests for Component Leads, Terminations, Lugs, Terminals and Wires
J-STD-005 Requirements for Soldering Pastes
J-STD-006 Requirements for Electronic Grade Solder Alloys and Fluxed and Non-Fluxed Solid Solders for Electronic Sol-
dering Applications

1. www.ipc.org
2. www.ipc.org

4
September 2013 IPC J-STD-003C

3 REQUIREMENTS

3.1 Terms and Definitions The definition of terms shall be

in accordance with IPC-T-50. Terms that have been repeated SOLDER
from IPC-T-50 for convenience are indicated by an asterisk LARGE CONTACT
(*). ANGLE
SMALL CONTACT
ANGLE
3.1.1 Contact Angle, Soldering* The angle of a solder fillet
that is enclosed between a plane that is tangent to the solder/ IPC-003c-3-1

basis-metal surface and a plane that is tangent to the solder/ Figure 3-1 Contact Angle
air interface (see Figure 3-1).

3.1.2 Dewetting* A condition that results when molten solder coats a surface and then recedes to leave irregularly-shaped
mounds of solder that are separated by areas that are covered with a thin film of solder and with the basis metal not exposed.

3.1.3 Dissolution of Component Metallization (Leaching) The loss or removal of metallization from an area on the basis
or substrate material after immersion in molten solder.

3.1.4 Equilibrium Wetting The degree of wetting in which the forces of wetting are in balance with the forces of gravity.

3.1.5 Nonwetting, Solder* The inability of molten solder to form a metallic bond with the basis metal.

3.1.6 Pinhole* An imperfection in the form of a small hole that penetrates through a layer of material.

3.1.7 Solderability* The ability of a metal to be wetted by molten solder.

3.1.8 Solder Connection Pinhole* A small hole that penetrates from the surface of a solder connection to a void of inde-
terminate size within the solder connection.

3.1.9 Wetting, Solder* The formation of a relatively uniform, smooth, unbroken, and adherent film of solder to a base
metal.

3.2 Materials

3.2.1 Solder For SnPb testing, the solder composition shall be Sn60Pb40 or Sn63Pb37 per J-STD-006. The composition
of the solder, including contamination levels, shall be maintained during testing per 3.5.2.
For Pb-free testing, the solder composition shall be Sn96.5Ag3.0Cu0.5 (SAC305), allowing variation of the Ag content
between 3.0-4.0 wt% and Cu content between 0.5-1.0 wt% with the balance being Sn per J-STD-006. If no Pb-free solder
alloy is specified, the default solder composition shall be Sn96.5Ag3.0Cu0.5 (SAC305) per J-STD-006. Other Pb-free sol-
der alloys may be used AABUS.
The composition of the SnPb solder paste to be used for surface mount simulation shall be Sn60Pb40 or Sn63Pb37 for SnPb
per J-STD-005, flux type ROL1. The solder paste shall meet the storage and shelf life requirements of the manufacturer’s
specification. The composition of the Pb-free solder paste to be used for surface mount simulation shall be
Sn96.5Ag3.0Cu0.5 (SAC305), allowing variation of the Ag content between 3.0 - 4.0 wt% and Cu content between 0.5 - 1.0
wt% with the balance being Sn per J-STD-005. If no Pb-free solder paste is specified, the default composition shall be
Sn96.5Ag3.0Cu0.5 (SAC305) per J-STD-005, flux type to be AABUS. Other Pb-free paste solder alloys may be used
AABUS. The solder paste shall meet the storage and shelf life requirements of the manufacturer’s specification.

3.2.2 Flux The flux for tin/lead solderability tests shall be standard activated rosin flux #1 having a composition of 25%
± 0.5% by weight of colophony and 0.15% ± 0.01% by weight diethylammonium hydrochloride (CAS 660-68-4), in 74.85%
± 0.5% by weight of isopropyl alcohol (see Table 3-1).
The flux for lead-free solderability tests shall be standard activated rosin flux #2 having a composition of 25% ± 0.5% by
weight of colophony and 0.39% ± 0.01% by weight diethylammonium hydrochloride (CAS 660-68-4), in 74.61% ± 0.5%
by weight of isopropyl alcohol (see Table 3-1).

5
IPC J-STD-003C September 2013

Table 3-1 Flux Composition

Composition by Weight Percent
Constituent Flux #1 Flux #2
Colophony 25 ± 0.5 25 ± 0.5
Diethylammonium Hydrochloride 0.15 ± 0.01 0.39 ± 0.01
Isopropyl Alcohol (IPA) Balance Balance
Weight of Chlorine as % of solids 0.2 0.5
Note: APPENDIX C: Informative Annex contains a listing of industry test flux product sources.

3.2.2.1 Flux Maintenance Standard activated rosin fluxes #1 and #2 shall be covered when not in use and discarded after
eight hours, or the flux shall be maintained to a specific gravity of 0.843 ± 0.005 at 25 ± 2 °C [77 ± 3.6 °F] and discarded
after one week of use.

3.2.3 Flux Removal Material used for cleaning printed boards after solderability testing and prior to solderability evalua-
tions shall be capable of removing visible flux residues.

3.3 Equipment The following criteria applies to all methods and equipment (see Appendix C for a list of equipment
sources). Equipment that is specific to any of the solderability test methods is described within the method details.

3.3.1 Pre-Conditioning Equipment The conditioning equipment shall be

capable of maintaining the temperature and humidity parameters specified in 20 15 10 5 0
3.4.2. The test specimens shall be suspended so that no portion of the test
specimen is within 40 mm [1.57 in] of the test chamber walls. The non- 0
metallic holders shall support the test specimens between vertical and a 45°
angle during exposure. Care shall be taken to not exceed the capacity of the 5
conditioning equipment. Excessive or improper loading will cause condensa-
tion on the surfaces of the test specimens. 10

When reflow simulation is required as a preconditioning requirement, the 15

minimum machine characteristics of the oven should be comparable to the
most current documentation in the IPC-TM-650, Test Method 2.6.27, Ther- 20
mal Stress, Convection Reflow Assembly Simulation.
25
3.3.2 Solder Pot/Bath A thermostatically controlled static solder bath
shall be used of adequate dimensions to accommodate the test specimens. 30
The solder bath shall contain enough solder to maintain the temperature dur-
ing testing within the specified temperature limits (see 3.5.1) and to prevent 35
exceeding the contamination levels (see 3.5.2). The solder pot temperature
‘‘limits’’ utilized for Wave Solder testing shall be defined by agreement 40
between the user and vendor. Precautions should be taken to avoid solder
pot/bath damage due to metal erosion when using lead-free solder alloys. 45

3.3.3 Optical Inspection Equipment All test methods requiring visual 50

inspection shall use equipment which is capable of 10X magnification (see IPC-003c-3-2

individual test methods). They may be equipped with reticles or equivalent Figure 3-2 Example Reticle
for measurement when applicable. An example of a reticle is shown in Fig-
ure 3-2. Shadowless lighting shall be used for proper inspection.

3.3.4 Dipping Equipment Solder dipping devices shall be mechanical or electromechanical and capable of controlling the
immersion/emersion rates, dwell time, and immersion depth as specified in 4.2 to 4.3.

3.3.5 Timing Equipment Timing equipment shall be automated and accurate to the extent specified by the test method.

3.4 Preparation for Testing

3.4.1 Test Specimen Preparation and Conditioning for Test Care shall be exercised to prevent contamination (by grease,
perspiration, etc.) of the surface to be tested. When agreed upon between user and vendor, the test specimen to be tested

6
September 2013 IPC J-STD-003C

may undergo other types of pretreatments such as degreasing, aqueous cleaning, copper and solder brightening, or baking.
For wetting balance testing, it is imperative that the conductors to be tested are exposed to the edge of the board and that
no epoxy material remains to prevent intimate contact with the solder.
The prescribed pretreatments should reproduce actual processing of the printed boards up to the time of assembly soldering
(see 6.3). If conditioning is performed, prebaking is not recommended.

3.4.2 Pretest Conditioning All test specimens identified as requiring stressing/conditioning shall be subjected to one of
the following prior to solderability testing. Following pretest conditioning using methods involving humidity, the samples
shall be baked per 3.4.3. The pretest conditioning shall be one of the following:
a. 72 °C ± 5 °C [162 °F ± 9 °F] and 85% ± 3% Relative Humidity [RH]. The test specimens shall be exposed for a test
duration of 8 hours ± 15 minutes. This is the default stressing condition.
b. Exposure to the standardized reflow temperature profiles detailed in IPC-TM-650, Test Tethod 2.6.27. Testing with
Eutectic SnPb solder shall be carried out using the lower peak temperature profile. Testing with SAC305 solder shall
determine the use of the higher peak temperature profile. The number of exposures to the appropriate profile shall be
two.
c. The use of 8 hours of steam exposure at the appropriate temperature may be used for SnPb surface finishes ONLY.
d. The water to be used for steam conditioning purposes shall be distilled or deionized.

3.4.3 Steam Preconditioning Apparatus The steam conditioning chamber shall be constructed of non-corrodible materi-
als such as borosilicate glass, quartz glass, stainless steel, or polytetrafluoroethylene (PTFE). The specimen holder shall be
non-reactive to prevent galvanic corrosion. The container should be insulated. The steam temperature at the conditioning
level shall be maintained per the requirements of Table 3-2.
Table 3-2 Steam Temperature Requirements
Altitude Average Local Boiling Point C [F] Steam Temperature Limits C [F]
0-305 m [0-1000.66 ft] 100 °C [212 °F] 93±3 °C [199.4 ±5.4 °F]
305-610 m [1000.66-2001.31ft] 99 °C [210.2 °F] 92±3 °C [197.6 ±5.4 °F]
610-914 m [2001.31-2998.69ft] 98 °C [208.4 °F] 91±3 °C [195.8 ±5.4 °F]
914-1219 m [2998.69-3999.34ft] 97 °C [206.6 °F] 90±3 °C [194 ±5.4 °F]
1219-1524 m [3999.34-5000ft] 96 °C [204.8 °F] 89±3 °C [192.2 ±5.4 °F]
1524-1829 m [5000-6000.66ft] 95 °C [203 °F] 88±3 °C [190.4 ±5.4 °F]

A safe means to prevent excessive pressure and a means of maintaining adequate water level shall be provided. Neither shall
cause the vapor to cool below the specified temperature. Condensate shall drip freely back to the water. Care should be taken
to minimize contact between the condensate and the specimens.

3.4.4 Steam Conditioning Before the application of flux and subsequent solderability testing, all specimens designated
Coating Durability Rating 3 (SnPb surface finishes) shall be conditioned in the device and under the conditions described
in 3.3.1 at a steam temperature which is 7 °C [12.6 °F] below the local boiling point (see Table 3-2).
All coupons to be tested shall be placed into the steam conditioning chamber such that no specimens have their pads/holes
touching, and that condensation forming will drain away from the solderable surface to the coupon body. Specimens shall
not be stacked in a manner which restricts their surface exposure to steam, nor shall they be placed closer than 10 mm
[0.39 in] from the outer chamber walls, and shall not touch the inner container walls. In addition, no portion of a specimen
shall be less than 40 mm [1.57 in] above the water level.

3.4.4.1 Post Steam Conditioning Drying After steam conditioning is complete; specimens shall be immediately removed
from the chamber and dried using ambient air for 15 minutes minimum. Drying may also be accomplished by baking at 105
± 5 °C [221 ± 9 °F] maximum for 1 hour maximum. Solderability testing shall be performed within 72 hours of removal
from the chamber.

3.4.4.2 Steam Equipment Maintenance Before use, the steam conditioning apparatus shall have been cleaned with
deionized or distilled water or dilute hydrogen peroxide (commercially available 2-3% by volume) to remove any accumu-
lated residues. This cleaning should be accomplished within five working days of the conditioning period.

7
IPC J-STD-003C September 2013

3.4.5 Baking Immediately after temperature/humidity conditioning and prior to solderability testing, all boards shall be
baked at 105 ± 5 °C [221 ± 9 °F] for 1 +1/-0 hours to remove surface moisture and other volatiles. Test specimens shall
be cooled to room temperature prior to fluxing and testing.

3.5 Solder Bath Requirements

3.5.1 Solder Temperatures Tin/lead solderability testing shall be performed at a solder temperature of 235 ± 5 °C [473
± 9 °F]. Lead-free solderability testing shall be performed at a solder temperature of 255 ± 5 °C [491 ± 9 °F].

3.5.2 Solder Contamination Control The solder in solder baths used for solderability testing shall be chemically or spec-
trographically analyzed or replaced each 30 operating days. Deviations to the 30 day limit shall be supported by historical
data. The levels of contamination and Sn content must conform to the limits shown in Table 3-3. The intervals between
analyses may be lengthened if the test results indicate that the contamination limits are not being approached. The compo-
sition of the lead-free solder, including contamination levels, shall be maintained during testing per Table 3-3 with the sil-
ver and copper element levels adjusted for alloy requirements.
Note: An operating day consists of any eight-hour period, or any portion thereof, during which the solder is liquefied and
used.
If contamination is found to exceed the limits specified in Table 3-3, then the solder shall be changed and the intervals
between analyses shall be shortened. A sampling plan shall be developed, implemented, and documented, demonstrating
solder contamination process control.
Table 3-2 Maximum Limits of Solder Bath Contaminant
Maximum Contaminant Maximum Contamination
Weight Percentage Limit Weight Percentage Limit
Contaminant Sn Pb Alloysa,b Pb Free Alloysa,c
Copper 0.300 0.800
Gold 0.200 0.200
Cadmium 0.005 0.005
Zinc 0.005 0.005
Aluminum 0.006 0.006
Antimony 0.500 0.500
Iron 0.020 0.020
Arsenic 0.030 0.030
Bismuth 0.250 0.250
Silver 0.100 4.000
Nickel 0.010 0.010
Lead N/A 0.100
Notes:
a. The tin content of the solder shall be maintained within ± 1% of the nominal alloy being used. Tin content shall be tested at the same frequency as testing
for copper/gold contamination. The balance of the bath shall be lead and/or the items listed above.
b. The total of copper, gold, cadmium, zinc, and aluminum contaminants shall not exceed 0.4%. Not applicable to lead-free alloys.
c. These Maximum Contamination Weight Percentage Limits apply for solderability testing using the SAC305 solder alloy. The use of other lead-free solder
alloys/maximum contamination weight percentage limits may be used upon agreement between user and vendor.

4 TEST PROCEDURES

4.1 Test Procedure Limitations The test procedures of this specification are applicable to most printed board construc-
tions typical of the industry. It is recognized that thick printed boards will not behave the same as thin printed boards due
to their increased thermal mass, aspect ratio, number of ground planes, and weight of the solder column within the hole.
Note: Increased dwell times may be necessary, depending on the board construction and copper weight. Solder test times
in excess of 30 seconds may be required.
The test procedures of this specification shall be followed. If it is determined by discussions between the user and vendor
that changes are necessary due to the physical characteristics of a particular test specimen and not the solderability of the
test specimen surface, a new procedure shall be documented and used only for the applicable test specimen. Changes in test
procedures and flux (see 3.2.2) shall take into account the wetting time and flux issues per 6.5 and 6.6.

8
September 2013 IPC J-STD-003C

4.1.1 Application of Flux The test specimens are to be dipped in the flux to the full depth to be soldered for 5-10 seconds.
The flux shall be maintained at the prescribed composition defined in 3.2.2. After withdrawal from the flux, the test speci-
men shall be allowed to drain vertically for a maximum of 60 seconds. Excess flux shall be removed by blotting the sur-
face to be tested with a piece of clean, absorbent material. The solderability test shall then be performed in not less than one
minute, and not more than five minutes, after blotting.

4.2 Tests with Established Accept/Reject Criteria

4.2.1 Edge Dip Test This test is for edge dip testing of surface conductors and attachment lands.

4.2.1.1 Apparatus

4.2.1.1.1 Solder Pot/Bath A solder vessel that meets the requirements of 3.3.2 shall be used. The solder shall meet the
requirements of 3.2.1. Solder bath temperatures and solder contamination control shall be in accordance with 3.5.1 and 3.5.2.

4.2.1.1.2 Dipping Device A dipping device as shown in Figure 4-1 shall be used. A similar device may be used provid-
ing that the rate of immersion, dwell time, and rate of withdrawal are within the test limits. Due to design considerations,
it may be necessary to immerse the sample at an angle smaller than 90°, for example 70°, to allow for flux outgassing to
occur and to allow solder to flow into mask defined features. When applicable, the changes to the standard 90° immersion
angle test shall be documented in the quality certificates. The dipping apparatus should minimize wobble, vibration, and
other extraneous movements that may have an impact on the outcome of the test.

Initial Step Final Step

Insert Withdraw Insert Withdraw

Specimen Specimen Specimen Specimen

Process Flow

Flux Solder
Station Station

IPC-003c-4-1

Figure 4-1 Edge Dip Solderability Test

4.2.1.2 Test Specimen The test specimen shall be a representative portion of the board, or a full board, whichever is
smaller, not to exceed 50 x 50 mm [1.97 x 1.97 in], or a test specimen that is representative of the common board features.
Figures 4-2 and 4-3 are suggested test specimen styles. Test specimen preparation shall be in accordance with 3.4.

9
IPC J-STD-003C September 2013

Layer 1 Only 27.5 mm

Appropriate [1.081 in]
Specimen 22.5 mm 9 Spaces @ 2.5 mm
Number [0.8858 in] [0.0984 in]
3.0 mm
[0.118 in] 2.0 mm
[0.0787 in]

2.5 mm [0.0984 in] S

7.5 mm [0.295 in]

2.5 mm [0.0984 in]

40 Plated Through-Holes
0.8 ± 0.0125 mm [0.031 ± 0.0004921 in]

Land Size 1.5 mm [0.0591 in] IPC-003c-4-2

Figure 4-2 Suggested Test Specimen for Plated-Through Holes

2.54 mm [0.1000 in]

0.94 mm [0.0370 in]

IPC-003c-4-2

Figure 4-3 Suggested Test Specimen for Surface Mount Features

A. Component Side View - Test Coupon Size - C. SMD Pad Size = 3.18 mm x 4.52 mm [0.125 in x 0.178 in]
25 mm x 15 mm [0.984 in x 0.591 in] Pads are extended 0.51 mm [0.02 in] beyond the edge
B. Pad Size (dia.) = 1.9 mm [0.0748 in] Pad to Pad Pitch = 4.0 mm [0.157 in]
Pad to Pad Pitch = 4.0 mm [0.157 in] Mask Clearance = 3.58 mm x 4.94 mm [0.141 in x 0.1945 in]
PTH Size = 1.15 mm [0.0453 in] finished Both Sides
Mask Clearance = 2.31 mm [0.0909 in]
Both Sides

10
September 2013 IPC J-STD-003C

Note: As shown in Figure 4-3, it is imperative that the metallization extends to the edge of the test specimen, in order to
guarantee a repeatable and accurate test. This may be achieved by imaging the test specimen larger in the multi-test speci-
men panel format than as it would otherwise have been done as an individual test specimen. The singulation process
(removing the individual test specimens from the multi-image panel) will have the scoring or routing path pass through the
oversized copper image, thus ensuring that the copper extends to the edge of the test specimen. Due to the relative softness
of the copper, the rough test specimen edge may need to be ‘‘dressed’’ using 600 grit sandpaper. An alternate method to
ensure that the copper extends fully to the edge of the test coupon is to pre-route the test specimen and edge plate. This
latter alternative is generally more costly and may not be available from all printed board fabricators.

4.2.1.3 Procedure Dross and burned/residual flux shall be completely removed from the surface of the molten solder
immediately prior to dipping. After fluxing and draining per 4.1.1, the test specimen shall be immersed into the molten sol-
der edgewise to a depth of 25 ± 2 mm [0.984 ± 0.08 in]. The dwell time in the molten solder shall be 10.0 ± 0.5 seconds.
Immersion time may have to be adjusted depending on the construction of the board. A dwell time of up to 30 seconds may
be required for heavy or high copper content boards. Immersion and emersion rates shall be 25 ± 2 mm [0.984 ± 0.08 in]
per second. After withdrawal, the solder shall be allowed to solidify by air cooling while the board is maintained in a ver-
tical position. Prior to examination, all test specimens shall have the flux removed using a cleaning agent in accordance with
3.2.3.
If using a fixed dipping apparatus, an angle of 70-80° may be used.
For Edge Dip Testing, where a mechanical dipping device is not used and is AABUS, it is suggested to gently move the
coupon side to side during the testing on coupons that have solder mask defined features.

4.2.1.4 Evaluation

4.2.1.4.1 Magnification Test specimens shall be examined at 10X using the equipment as specified in 3.3.3.

4.2.1.4.2 Surface Evaluation – Accept/Reject Criteria A minimum of 95% of each of the surfaces (i.e., each pad) being
tested shall exhibit good wetting. The balance of the surface may contain only small pin holes, dewetted areas, and rough
spots provided such defects are not concentrated in one area. For less critical applications, a smaller percent coverage limit
may be agreed between vendor and user. There shall be no nonwetting or exposed base metal within the evaluated area. An
area of 3.2 mm [0.126 in] width from the bottom edge of each test specimen shall not be evaluated. Areas contacted by
fixtures shall not be evaluated.

4.2.2 Wave Solder Test: This test is for wave solder testing of plated-through holes, surface conductors, and attachment
lands.

4.2.2.1 Apparatus A wave soldering system adjusted to provide the parameters of 4.2.2.3 shall be used.

4.2.2.2 Test Specimen The suggested test specimen shall be in accordance with 1.7 and will typically be a ‘‘solder
sample’’ from the printed board (PB) supplier. Where a selective wave or a solder fountain is used for assembly soldering,
the test specimen shall be adjusted accordingly. Test specimen preparation shall be in accordance with 3.4.

4.2.2.3 Procedure Test specimens shall be fixtured so as to be representative of the production setup without components
inserted. The fluxing unit should be filled with the specific (see 3.2.2) or agreed upon flux. If the unit contains other than
the specified or agreed upon flux then the fluxing unit shall be turned off, and the board test specimens fluxed separately
prior to placement on the conveyor per 4.1. The following parameters must be established and noted: board fixturing (if
required), conveyor speed, preheater, solder unit with or without oil intermix, machine process controls, incline, board pre-
heat temperature, and solder temperature. The application of solder shall meet the requirements of the applicable wave sol-
der equipment specifically for depth of contact, angle of contact, and duration of contact. Solder temperature shall be 235
± 5 °C [455 ± 9 °F] for Eutectic SnPb and 255 ± 5 °C [491 ± 9 °F] for SAC305 unless another temperature is agreed upon
by vendor and user. Prior to examination, all test specimens shall have the flux removed using a cleaning agent in accor-
dance with 3.2.3.

4.2.2.4 Evaluation

4.2.2.4.1 Magnification Test specimens shall be examined at 10X using equipment as specified in 3.3.3.

11
IPC J-STD-003C September 2013

4.2.2.4.2 Surface Evaluation – Accept/Reject Criteria An

Target Condition Acceptable Condition
area of 3.2 mm [0.126 in] width from the trailing edge of each
test specimen shall not be evaluated. Areas contacted by fix-
tures shall not be evaluated. A minimum of 95% of each of
the surfaces (i.e., each pad) being tested shall exhibit good
wetting. The balance of the surface may contain only small
pin holes, dewetted areas, and rough spots provided such
defects are not concentrated in one area. For less critical
applications, a smaller percent coverage limit may be agreed Mag
nified View
Ma g
nified View
between vendor and user. There shall be no nonwetting or
exposed base metal within the evaluated area.
Acceptable Condition
(for PCBs > 3.0 mm thk) Nonacceptable Condition
4.2.2.4.3 Plated-Through Hole Evaluation Only plated-
through holes that are at least 5.0 mm [0.197 in] from any
surface or fixturing structure supporting the test specimen dur-
ing the test shall be evaluated.

4.2.2.4.4 Accept/Reject Criteria

a. Coating Durability Rating 1, 2 and A Surface Fin-
Ma g M ag
ishes Solder shall fully wet the wall area of the plated- nified View nified View
IPC-003c-4-4
through holes, and plug holes less than 1.5 mm [0.0591 in]
diameter (complete filling is not necessary). Figure 4-4 Effectiveness of Solder Wetting of Plated-
b. Coating Durability Rating 3 and B Surface Fin- Through Holes – Class 3 below 3.0 mm
ishes The test specimen has soldered successfully if sol-
der has risen in all plated-through holes. The solder shall
have fully wetted the walls of the hole. There shall be no
nonwetting or exposed base metal on any plated-through
hole.
Accept/reject criteria for board thicknesses of <3.0 mm
[<0.118 in] shall be in accordance with 5.2 and Figures 4-4
and 4-5. The solder must have wetted over the knee of the
hole and out onto the land around the top of the hole, except
for boards whose thickness exceeds 3.0 mm [0.118 in].
On thick boards, i.e., greater than 3.0 mm [0.118 in], capillary
action forces may not be large enough to overcome the forces
exerted on the solder by its own weight. This may prevent
solder from filling the plated-through hole and wetting over
the knee of the hole and out onto the land area around the top
of the hole. As per the requirements of the IPC-6010 and
J-STD-001:
a. For Class I boards, the hole fill percentage shall be at least
50%.
b. For Class II and III Printed Boards, the minimum accept-
able hole fill shall be 75%.

4.2.3 Surface Mount Simulation Test Tin/Lead Solder

This test simulates surface mount printed board performance
in a reflow process.

4.2.3.1 Apparatus

4.2.3.1.1 Stencil/Screen A stencil or screen with pad

Figure 4-5 Examples of Solder Wetting of Plated-Through
geometry openings that are appropriate for the test specimen
Holes – Class 3 below 3.0 mm
shall be used. The use of the production stencil is recom- A. Acceptable Condition
mended for this test. If only a portion of the board or B. Defect Condition

12
September 2013 IPC J-STD-003C

some specific features are to be tested, the stencil thickness used shall be per the requirements of Table 4-1 otherwise it
should be AABUS.
Table 4-1 Stencil Thickness Requirements
Nominal Stencil Thickness Pitch
0.10 mm [0.00394 in] <0.50 mm [<0.0197 in]
0.15 mm [0.00591 in] 0.50-0.65 mm [0.0197-0.0256 in]
0.20 mm [0.00787 in] >0.65 mm [>0.0256 in]

4.2.3.1.2 Paste Application Tool A rubber or metal squeegee device shall be used to distribute paste across the stencil/
screen.

4.2.3.2 Test Specimen The test specimen shall be in accordance with 1.7 and will normally be the ‘‘solder sample’’ from
the PB supplier. The test specimen shall be tested in the condition that it would normally be in at the time of assembly sol-
dering. The test specimen surfaces to be tested shall not be handled in such a manner as to cause contamination, nor shall
the surfaces being tested be wiped, cleaned, scraped or abraded. If a portion of a PB is to be used for this test, care shall
be taken to ensure that the cutting of the sample does not affect the solderable surfaces to be tested and that there are no
rough edges that may prevent contact between the stencil and the PB.

4.2.3.3 Reflow Equipment An IR/convection reflow oven, vapor phase reflow system, or storage oven capable of reach-
ing the reflow temperature of the paste shall be used. The temperatures listed in Table 4-2 or 4-3 correspond to the
temperature/time duration of the reflow profile for the solder paste. Additional time may be required to allow the test speci-
men itself to reach the temperatures listed in Table 4-2. Unless otherwise agreed upon between vendor and user the reflow
parameters shall be per Table 4-2 or 4-3.
Table 4-2 Reflow Parameter Requirements – SnPb
Reflow Type Temperature Time
Vapor Phase Reflow 215-219 °C [419-426 °F] 30-60 seconds dwell at reflow
Preheat 150-170 °C [302-338 °F] 50-70 seconds
IR/Convection Reflow
Reflow 215-230 °C [419-446 °F] 50-70 seconds
Oven 215-230 °C [419-446 °F] 2-5 minutes (until reflow is assured)
Note 1: 2-5 minutes includes time for the oven and the board to get to reflow temperature, not the time at reflow temperature.

Table 4-3 Lead-Free Reflow Parameter Requirements

Reflow Type Temperature Time
Vapor Phase Reflow 217-240 °C [423-464 °F] 45-90 seconds dwell at reflow
150-180 °C [302-356 °F] Preheat 60-120 seconds
IR/Convection Reflow
230-250 °C [446-482 °F] Reflow 30-60 seconds
Oven 230-250 °C [446-482 °F] 2-5 minutes (until reflow is assured)
Note 1: 2-5 minutes includes time for the oven and the board to get to reflow temperature, not the time at reflow temperature.

4.2.3.4 Procedure Place the stencil/screen on the surface termination area of interest, apply solder paste (see 3.2.1) onto
the stencil/screen and print the stencil pattern onto the test substrate by wiping paste over the stencil/screen in one smooth
motion using a rubber or metal squeegee. Remove the stencil/screen carefully to avoid smearing the paste print. Place test
substrate in applicable reflow equipment and conduct reflow process. After reflow, carefully remove test specimen and allow
it to cool to room temperature. Prior to examination, all test specimens shall have the flux removed using a cleaning agent
in accordance with 3.2.3.

4.2.3.5 Evaluation

4.2.3.5.1 Magnification Test specimens shall be examined at 10X using the equipment as specified in 3.3.3.

4.2.3.5.2 Surface Evaluation – Accept/Reject Criteria A minimum of 95% of each of the surfaces (i.e., each pad) being
tested shall exhibit good wetting. The balance of the surface may contain only small pin holes, dewetted areas, and rough
spots provided such defects are not concentrated in one area. For less critical applications, a smaller percent coverage limit
may be agreed between vendor and user. There shall be no nonwetting or exposed base metal within the evaluated area.

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IPC J-STD-003C September 2013

4.3 Tests with Force Measurement Criteria

4.3.1 Wetting Balance Test This test is for Balance and Signal
Computer
wetting balance testing of surface conductors transducer conditioner
and attachment lands. This test method may
also be used for through hole evaluation but
there are currently no pass fail criteria devel-
oped for wetting time and/or forces. Specimen

4.3.1.1 Apparatus A solder meniscus force

measuring device (wetting balance) which
includes a temperature controlled solder pot
containing solder per 3.2.1 and maintained per Solder bath
3.5.1 and 3.5.2 shall be used. The equipment
shall have a means of recording force as a
function of time such as a chart recorder, data Bath lifting Control
logger, or computer. mechanism box
IPC-003c-4-6
4.3.1.1.1 Dipping Device A mechanical or
electromechanical dipping device incorporated Figure 4-6 Arrangement for the Test Apparatus (Solder Bath Wetting Bal-
in the wetting balance shall be used. The ance Method) Copyright © 2006 IEC Geneva, Switzerland. www.iec.ch
device shall be preset to produce an immersion
and emersion rate as specified in 4.3.1.3. The
test specimen dwell time is controlled to the Balance and Signal
Computer
transducer conditioner
time specified in 4.3.1.3 (see Figure 4-6 and
4-7).

4.3.1.2 Test Specimen The test specimen

shall be in accordance with 1.7. The test speci- Specimen
men shall either be a full board, a section of a
board, or a suggested test specimen as illus-
trated in Figure 4-8. Test specimen preparation
shall be in accordance with 3.4.
Globule block
4.3.1.3 Procedure After application of the
flux and partial drying per 4.1, the test speci-
men shall be mounted on the test equipment.
Lift Control
After blotting away excess flux from the test mechanism box
specimen with a piece of absorbent clean mate-
IPC-003c-4-7
rial, suspend it on the apparatus. The test shall
be started after clearing of the surface dross Figure 4-7 Arrangement for the Test Apparatus (Solder Globule Wetting
from the molten solder and a waiting period of Balance Method) Copyright © 2007 IEC Geneva, Switzerland. www.iec.ch
2-10 seconds for the bath to settle down.
The flux covered surface shall be immersed
only once in the molten solder to an appropri-
ate depth. The immersion depth shall not be
more than 1/3 of the pad length, this is to allow
for complete wetting of the pad or feature
being tested. The angle of immersion shall be
90° for purpose built coupons with features on
both sides (see Figure 4-9). The use of an
immersion angle of 20° - 40° shall be used for
coupons removed from actual circuits and/or Figure 4-8 Suggested Wetting Balance and Soldering Immersion Test
coupons with features present on only one side Specimens
(see Figure 4-10). The immersion/emersion
rate shall be 1 - 5 mm [0.039 - 0.20 in] per

14
September 2013 IPC J-STD-003C

second and the dwell time shall be 10.0 ± 0.5 seconds or as appropriate for thick, heavy copper or otherwise thermally
demanding coupons. Prior to examination, all test specimens shall have the flux removed using a cleaning agent in accor-
dance with 3.2.3.

Figure 4-9 Wetting Balance Test Soldering Immersion at 90° Figure 4-10 Wetting Balance Test Soldering Immersion at 20
for Double Sided Finishes to 40° for Single Sided Coupons/Samples Removed from PB’s

4.3.1.4 Evaluation The pass/fail criteria for standardized test coupons is found in Tables 4-4 and 4-5 below. As the 4-14
plating committee produces additional data for specific board surface finishes, this table will be amended accordingly. For
surface finishes without specified pass/fail criteria, see Table 4-6, evaluation of the wetting shall be as follows:
a. All pads immersed into the solder shall show evidence of wetting.
b. All pads immersed into the solder shall show evidence of solder advancement in excess of the immersion depth.
c. The time to produce positive wetting forces shall be as per Table 4-6 below.
d. There shall be no evidence of dewetting.
Table 4-4 Pass/Fail Criteria for Specific Surface Finishes Using Eutectic SnPb
Suggested Criteriaa
Parameter Description ENEPIG I Sn*
To ‘‘as received’’ Time to buoyancy corrected zero ≤2 seconds ≤2 second
To ‘‘post stressing’’ Time to buoyancy corrected zero ≤3 seconds ≤3seconds
≥25% of maximum theoretical 25% of maximum theoretical
Wetting force at two
F2 wetting force at or before wetting force at or before
seconds from start of test
two seconds two seconds
Wetting force at five
F5 At or above the value of F2 At or above the value of F2
seconds from start of test
Minimum force
At ten seconds >0.15mN/mm 0.14mN/mm
‘‘as received’’
Minimum force
At ten seconds >0.12mN/mm 0.10mN/mm
‘‘post stressing’’
Note:
a. These suggested criteria have been established in a two-tier evaluation format with Set A being more stringent. Components meeting Set A suggested
criteria are expected to have a Wider soldering process window than components meeting Set B suggested criteria. It should be recognized that components
meeting Set B suggested criteria may be completely acceptable for a large process window but the user must determine which criteria set best matches their
process.
b. See Appendix A for the method of calculating the maximum theoretical force.
c. See Appendix B for the method of calculation. (It is suggested that this method of calculation be programmed into the software used for control of the wetting
balance test equipment).
*Test flux #2 shall be used for testing I Sn as per IPC-4554 Amendment.

4.3.1.4.1 Magnification Test specimens shall be examined at 10X using the equipment as specified in 3.3.3.

4.3.1.4.2 Suggested Criteria The suggested criteria sets for solderability evaluation are listed in Table 4-5. In addition,
the area of the test sample with fresh solder adhesion shall be greater than the area that was immersed in the solder bath,
(i.e., the printed board shall exhibit positive solder wetting beyond its immersion depth).

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IPC J-STD-003C September 2013

Table 4-5 Pass/Fail Criteria for Specific Surface Finishes Using SAC305 Solder
Suggested Criteriaa
Parameter Description ENEPIG I Sn*
To ‘‘as received’’ Time to buoyancy corrected zero ≤1.5 seconds ≤2 second
To ‘‘post stressing’’ Time to buoyancy corrected zero ≤2.5 seconds ≤3 second
≥25% of maximum theoretical 25% of maximum theoretical
Wetting force at two
F2 wetting force at or before wetting force at or before
seconds from start of test
two seconds two seconds
Wetting force at five
F5 At or above the value of F2 At or above the value of F2
seconds from start of test
Minimum force
At ten seconds >0.19mN/mm 0.15mN/mm
‘‘as received’’
Minimum force
At ten seconds >0.17mN/mm 0.12mN/mm
‘‘post stressing’’
Note:
a. These suggested criteria have been established in a two-tier evaluation format with Set A being more stringent. Components meeting Set A suggested
criteria are expected to have a Wider soldering process window than components meeting Set B suggested criteria. It should be recognized that components
meeting Set B suggested criteria may be completely acceptable for a large process window but the user must determine which criteria set best matches their
process.
b. See Appendix A for the method of calculating the maximum theoretical force.
c. See Appendix B for the method of calculation. (It is suggested that this method of calculation be programmed into the software used for control of the wetting
balance test equipment).
*Test flux #2 shall be used for testing I Sn as per IPC-4554 Amendment.

Table 4-6 Wetting Balance Parameter and Suggested Criteria

Suggested Criteriaa
Parameter Description Set A Set B
To Time to buoyancy corrected zero ≤1 second ≤2 second
≥25% of maximum theoretical
Wetting force at two Positive value at or before
F2 wetting force at or before
seconds from start of test two seconds
two secondsb
Wetting force at five
F5 At or above the value of F2 At or above the value of F2
seconds from start of test
≥area calculated using sample
Integrated value of area of the
AA buoyancy and 50% maximum >zero (0)
wetting curve from start of test
theoretical forcec
Notes:
a. These suggested criteria have been established in a two-tier evaluation format with Set A being more stringent. Components meeting Set A suggested
criteria are expected to have a Wider soldering process window than components meeting Set B suggested criteria. It should be recognized that components
meeting Set B suggested criteria may be completely acceptable for a large process window but the user must determine which criteria set best matches their
process.
b. See Appendix A for the method of calculating the maximum theoretical force.
c. See Appendix B for the method of calculation. (It is suggested that this method of calculation be programmed into the software used for control of the wetting
balance test equipment).

4.3.1.5 Gauge Repeatability and Reproducibility (G R&R) Protocol Appendix D contains a suggested G R&R protocol
that may be used by the vendor and user to insure that the respective wetting balance equipment be correctly calibrated.
Figures 4-11 and 4-12 illustrate the suggested criteria contained in Tables 4-4, 4-5 and 4-6.

Equilibrium Wetting Force

AA Force / mm
Force / mm ( N / mm)
( N / mm) AA
F2

F2 F5
F5
0 Time
Time (sec.)
(sec.)
T0
Buoyancy Corrected Zero Axis
Buoyancy Corrected Zero Axis
T0
IPC-003c-4-11 IPC-003c-4-12

Figure 4-11 Set A Wetting Curve Figure 4-12 Set B Wetting Curve

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September 2013 IPC J-STD-003C

4.4.1 Solder Float Test Tin/Lead Solder This test is for solder float testing of plated-through holes, surface conductors,
and attachment lands for conformance requirement testing ONLY per the appropriate IPC-6010 document. This committee
advises that based on the results of extensive round robin testing that this test method does not meet current G R&R
requirements.

4.4.2 Apparatus

4.4.2.1 Solder Pot The solder pot shall meet the requirements of 3.3.2. In addition, the surface area of the pot shall be
great enough to float the test specimen without it touching the sides of the pot.

4.4.2.2 Test Specimen Handling Tool Stainless steel forceps, or other specially designed tools of stainless steel or
equivalent material, shall be used to handle the test specimen only by the edges.

4.4.2.3 Test Specimen The test specimen shall be in accordance with 1.7. The test specimen shall be a portion of the
printed board not greater than 50 x 50 mm [1.97 x 1.97 in], the suggested test specimen, or the complete board if it is smaller
than this size. The minimum number of holes to be tested is 30 per test lot. If there are not at least 30 holes in the test
specimen, additional specimens shall be tested until at least 30 holes have been tested (see Figure 4-2 Through-Hole Test
specimen). Test specimens containing interconnects will have a negative impact on the wetting times. It is strongly suggested
that a baseline be created for minimum wetting times versus layer count, copper weight, board thickness, and hole aspect
ratio. Dwell times on the solder surface may be in excess of thirty seconds, depending on the design. Test specimen prepa-
ration shall be in accordance with 3.4.

4.4.2.4 Procedure Dross and burned/residual flux shall be completely removed from the surface of the molten solder
immediately prior to floating. After fluxing and draining per 4.1, ensure that none of the holes in the coupons are ‘‘plugged’’
with flux prior to testing- gently tap the coupon on the absorbent material to ensure an open hole condition. Slide the test
specimen gently onto the molten solder. The thickness of the coupon and the number of copper planes in the coupon has a
direct impact on hole fill. A minimum of ten seconds shall be used initially to evaluate the hole fill characteristics. It may
be necessary to increase this time to thirty seconds or more for coupons with a significant number of inner layers. The test
specimen may be carefully depressed into the solder bath to a maximum of 50% of the test specimen thickness after it has
been initially floated on the solder bath (extreme care must be taken with boards that are less than 0.8 mm [0.031 in] thick).
After the elapsed time, slide the test specimen off the molten solder. Hold test specimen still and horizontal until the solder
solidifies. Prior to examination, all test specimens shall have the flux removed using a cleaning agent in accordance with
3.2.3.

4.4.3 Evaluation

4.4.3.1 Magnification Test specimens shall be examined at 10X using the equipment as specified in 3.3.3.

4.4.3.2 Surface Evaluation – Accept/Reject Criteria An area of 3.0 mm [0.118 in] width from the trailing edge of each
test specimen shall not be evaluated. Areas contacted by fixtures shall not be evaluated. A minimum of 95% of each of the
surfaces (i.e., each pad) being tested shall exhibit good wetting. The balance of the surface may contain only small pin holes,
dewetted areas, and rough spots provided such defects are not concentrated in one area. For less critical applications, a
smaller percent coverage limit may be agreed between vendor and user. There shall be no nonwetting or exposed base metal
within the evaluated area.

4.4.3.3 Plated-Through Hole Evaluation Only plated-through holes that are at least 3.0 mm [0.118 in] from any surface
or fixturing structure supporting the test specimen during the test shall be evaluated.

4.4.3.4 Accept/Reject Criteria

a. Class 1 and 2 Product Solder shall fully wet the wall area of the plated-through holes, and plug holes less than 1.5 mm
[0.0591 in] diameter (complete filling is not necessary).
b. Class 3 Product The test specimen has soldered successfully if solder has risen in all plated-through holes. The solder
shall have fully wetted the walls of the hole. There shall be no nonwetting or exposed base metal on any plated-through
hole.

17
IPC J-STD-003C September 2013

Accept/reject criterion for board thicknesses of <3.0 mm [<0.118 in] shall be in accordance with 5.2 and Figures 4-4 and
4-5. For SnPb surface finishes the solder must have wet over the knee of the hole and out onto the land around the top of
the hole, except for boards whose thickness exceeds 3.0 mm [0.118 in]. For alternate surface finishes such as ENIG, I Ag,
I Sn, and OSP, there shall be evidence of wetting over the knee, but there is no requirement to wet completely the top side
annular ring.
On thick boards, i.e., greater than 3.0 mm [0.118 in], capillary action forces may not be large enough to overcome the forces
exerted on the solder by its own weight. This may prevent solder from filling the plated-through hole and wetting over the
knee of the hole and out onto the land area around the top of the hole.

5 EVALUATION AIDS

5.1 Evaluation Aids – Surface Figures 5-1 through 5-7 provide aid to evaluation of the test results. This aid is to be used
primarily to illustrate types of defects rather than percentage of area covered.

Figure 5-1 I Sn Surface Finish Showing Uniform Wetting Figure 5-2 I Sn Surface Finish Showing Chronic Dewetting

Figure 5-3 ENIG Exhibiting Nonwetting Figure 5-4 ENIG Exhibiting Nonwetting

18
September 2013 IPC J-STD-003C

Figure 5-5 ENIG Exhibiting Dewetting Figure 5-6 ENIG Exhibiting Dewetting

Figure 5-7 HASL Surface Finish after Wetting Balance

Testing, showing Excellent Wetting and Positive Advance-
ment of Solder

5.2 Evaluation Aids – For Class 3 Plated-Through Holes Profile views of acceptable conditions are presented in Figure
4-4 for aid in visualizing all the common conditions. The following are also acceptable conditions for specific cases:
a. Solderability acceptance for plated-through holes with aspect ratios greater than 5:1 (board thickness: hole diameter)
shall be agreed upon by user and vendor.
b. Depressed fillets in holes are acceptable under the following condition: the solder in partially filled holes must exhibit a
contact angle less than 90° relative to the hole wall (see Figures 4-5 and 4-6).
c. All holes less than 1.5 mm [0.0591 in] diameter shall retain a solder plug after solidification. Holes greater than 1.5 mm
[0.0591 in] shall not be rejected for failure to retain a full solder plug provided that the entire barrel of the hole and the
surface of the top land have been wetted with solder (see Figures 4-5 and 4-6).

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IPC J-STD-003C September 2013

6 NOTES

6.1 Correction for Buoyancy For the wetting balance to obtain wetting force values that are comparable with one another,
it is necessary to correct for the variability in test specimen sizes, particularly width and thickness. This is done by correct-
ing for the volume of the sample immersed in the solder. The following formula may be used to calculate the buoyant force
correction:
Fb = ρ gV
Where:
ρ = Density of solder at 235 °C (8.12 g/cm) for Sn60/Pb40 Alloy
ρ = Density of solder at 255 °C (7.41 g/cm) for SAC305 Alloy
g = Acceleration of gravity (981 cm/sec2)
V = Immersed volume of the test specimen (cm3)
= width x thickness x immersion depth, for example.
When the buoyancy force is calculated, it should be used to correct the zero axis. This correction is required to obtain both
the proper measurement of wetting times, as well as wetting forces. All measurements of wetting times and wetting forces
must be made from the corrected zero axis. In the case of an upright curve, the new corrected zero axis will be below the
instrumental zero.

6.2 Preheat If the board test specimen does not pass the standard solderability test, then a uniform preheat of a second
test specimen may be used to determine if PB design/construction has impacted the solderability test (i.e., a thick board with
heavy internal ground planes). If this referee test specimen passes, then testing with preheat shall be the method of choice
for future testing of test specimens having that design/construction.

6.3 Prebaking The introduction of the IPC-1601 printed board handling and storage guideline has resulted in an increase
in the occurrence of baking prior to assembly to minimize outgassing, which may result in blowholes, measling, blisters, or
delamination especially with non dicyanodiamide (DICY) cured materials. Such baking may negatively impact solderabil-
ity and ultimately assembly soldering performance. Use of the baking protocols suggested in the IPC-1601 may require the
coating durability rating to be changed to a higher performance level to ensure that the surface finish is robust enough to
survive prebaking, subsequent multiple reflows, and other thermal exposures. The requirements of this document are to
evaluate the solderability of the surface finish as applied without any prebaking per the IPC-1601. If prebakes are used prior
to assembly, the solderability shall be evaluated using the prebake AABUS.
The time between baking and solderability testing should be kept to a minimum (not more than 24 hours) in order to pre-
vent re-absorption of water vapor into the laminate structure. The actual time limit is dependent upon local ambient tem-
perature and humidity levels.

6.4 Safety Note Care must be taken during both usage and storage to keep flammable solvents away from sparks or
flames. Refer to the Material Safety Data Sheets (MSDS) for all solvents. All chemicals shall be handled per appropriate
data sheets and disposed of per local regulations.

6.5 Use of Nonactivated Flux This standard specifies the use of a rosin-based flux with a specified quantity of activator.
The intent of requiring the use of a specified quantity of flux activator is to reduce the variability of test results that had
been seen when using pure rosin flux, to enable the solderability testing of non-tin component lead metallizations, and to
provide a realistic solderability testing safety factor by keeping the amount of activator both fixed and less than that used
for production soldering. The benefit of using this specified activated solderability testing flux composition has been dem-
onstrated by extensive testing, as reported in the J-STD-002 and J-STD-003 Activated Solderability Test Flux Rationale
Committee Letter (see Appendix E).

6.6 Solder Contact The solder applied during the solderability test must contact a feature in order for that feature to be
considered for evaluation. Small features surrounded by a thick solder mask may prevent solder contact.

20
September 2013 IPC J-STD-003C

APPENDIX A
Calculation of Maximum Theoretical
Force for a Rectangular Cross-Section
Maximum theoretical force for a test board with a ground plane surface is calculated using the procedure of Klein Wassink3.
The maximum force, in units of milliNewtons (mN), is defined as:
Force (Max. Theoretical) = (γ) (P) (cosine β) - (d)(g)(V) = [0.4P - 0.08V] mN (for SnPb solder)
Where:
P = the perimeter of the test specimen in millimeters, i.e., the length in millimeters of the solder/printed board or coupon
pad (or hole)/air interface as measured at maximum depth of immersion.
V = The volume in cubic millimeters of the test specimen that resides below the solder/board air interface as measured at
the maximum depth of immersion.
γ = Surface tension of solder = 0.4 mN/mm
γ = Surface tension of SAC305-405 solder = 0.5 mN/mm
α = Immersion angle of the board to the horizontal surface, i.e., α = 45°
β = Wetting angle of solder to the board under optimal conditions, i.e., β = 0, Therefore the cosine β = 1
d = Density of solder at 235 °C, = 8.120 kg/mm3 for Sn60/Pb40 Alloy
d = Density of solder at 255 °C = 7.410 kg/mm3 for SAC305 Alloy
g = Gravitational constant = 9.8 x 103 mm/s2
Periphery and volumes: Perimeter and volumes are to be calculated using the nominal values provided by the test board
supplier and the angles and depths of immersion as described in the specification above. The TOTAL perimeter (the length
in millimeters of all of the solder/coupon or coupon/pad (or hole)/air interfaces on the test coupon being immersed (e.g., if
there are five pads being immersed, then the sum of the widths of the five pads parallel to the solder surface) is to be used.
For the immersion volume, use the volume of the portion of the test coupon pushed below the surface of the solder and
NOT the entire volume of the whole test.
Where:
For Example:
For a tin/lead solder alloy: Width of coupon = 0.4 mm, Length = 9.2 mm, P = wetting perimeter = 10 mm, Immersion depth
= D = 0.2 mm
Hence for a dip at a 90° angle:
V = Total volume immersed = (10 - (2 x 0.4)) mm x 0.2 mm x 0.4 mm = 0.736 mm3
Therefore, the maximum theoretical wetting force is:
Maximum Force = (γ) (P) (cosine b) - (d) (g) (V) = (0.4 mN/mm x 10 mm x cosine 0) - (8.12 x 10-6 kg/mm3 x 9.8 x
103 mm/s2 x 0.736 mm3) = 3.94 mN
Finally, for a 10 mm perimeter, ideal wetting force per millimeter of perimeter for the sample is 0.394 mN/mm. From Table
4-4 (or 4-5) the force measured on a test specimen in the ‘‘preferred’’ class must be close to 0.394 mN/mm. (It CANNOT
be greater than 0.394 mN/mm.)
Theoretical force calculations are difficult for test specimens which do not have pads that reach the edge of the specimen.
Therefore, the best way to use the wetting balance test method is to separately set up a control value for a ‘‘Best Possible’’
sample; and compare other test pieces to this value for establishing accept/reject criteria.

3. R.J. Klein Wassink, ‘‘Soldering in Electronics,’’ 2nd Edition, Electrochemical Publications, Ayr, Scotland, 1989, pp 308-309

21
IPC J-STD-003C September 2013

Second Example:
The calculations for the same sample dipped into the same solder at a 45 angle.
For a tin/lead solder alloy:
Width of coupon = 0.4 mm, Length = 9.2 mm, Immersion depth = D = 0.2 mm, P = wetting perimeter = 10 mm
Hence for a dip at a 45° angle:
V = Total volume immersed = 0.5 x 9.2 mm x 0.283 mm x 0.283 mm = 0.368 mm3
(The 0.5 accounts for the fact that the dip is at a 45° angle). (Remember the area of a right angle triangle is one half times
the length of the two sides that are not the hypotenuse.) Still assuming perfect wetting (wetting angle = 0°) Cosine of
0° = 1
Therefore, the maximum theoretical wetting force is:
Maximum Force = (γ) (P) (cosine b) - (d) (g) (V) = (0.4 mN/mm x 10 mm x cosine 0) - (8.12 x 10-6 kg/mm3 x 9.8 x
103 mm/s2 x 0.368mm3) = 3.97 mN
Therefore, again for a 10 mm perimeter, ideal wetting force per millimeter of perimeter for the sample is 0.397 mN/mm,
slightly higher than in the previous example because the buoyancy correction is only half the size.

22
September 2013 IPC J-STD-003C

APPENDIX B
Calculation of Area under the Wetting Curve
The area is calculated using the maximum theoretical force (see Figure 4-11 or 4-12). Therefore, the area is given as:
Area = Wetting force x time - Buoyancy x time
Area = (3.0 sec. x Max. Theoretical Force) - 2.0 sec (ρ) (g) V
Area = (3.0 sec. x Max. Theoretical Force) - 2.0 sec x - (8.12 x 10-6 kg/mm3 x 9.8 x 103 mm/s2 x V)
The value V is the volume of the test specimen immersed in the solder bath as calculated in Appendix A. The maximum
theoretical force is calculated as per Appendix A. The following assumptions are made:

1. The maximum buoyancy force is maintained for the whole two (2) seconds, contributing a negative area of the buoyancy
force times two (2) seconds.
2. The test specimen essentially attains the full maximum theoretical force as it crosses the zero line at two (2) seconds and
holds that value for the duration of the test, i.e., three (3) seconds.
V = Total Volume = 0.4 mm3
Maximum Theoretical Force: 3.97 mN
Area = (3.0 sec. x 3.97mN) - (2.0 sec. x 0.08 (kg/mm3 x mm/s2) x 0.4 mm3) = 11.91 mN x seconds - 0.064 (kg/mm/sec)
Since F = ma, then mN = kg x mm/sec2 or kg = mNsec2/mm
Area = 11.91 mN x seconds - 0.064 (mNsec2/mm) x (mm/sec)
Area = 11.91 mN x seconds - 0.064 mN x seconds
Area = 11.85 mN x seconds

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IPC J-STD-003C September 2013

APPENDIX C
Informative Annex

C.1 Test Equipment Sources The equipment sources described below represent those currently known to the committee.
Users of this document are urged to submit additional source names as they become available, so that this list can be kept
as complete and current as possible.

C.1.1 Edge Dip Solderability Test Apparatus

GEN3 Systems Limited (Formerly Concoat Systems) Unit B2, Armstrong Mall, Southwood Business Park, Farnborough,
Hampshire GU14 0NR England. + 44 12 5252 1500 www.gen3systems.com
HMP Soldermatics, P.O. Box 948, Canon City, CO 81212, +1 (719) 275-1531
Robotic Process Systems, 23301 E. Mission Ave., Liberty Lake, WA 99019, +1 (509) 891-1680
Solderability Testing and Solutions Inc., 108 Rosedale Ave., Richmond KY 40475, +1 (859)353-5914 www.standsgroup.com
Malcom Co, Ltd Honmachi 4-15-10,Shibuya, Tokyo, Japan Tel +81 (3) 3320-5611 www.malcom.co.jp
Malcomtech International 26230 Industrial Blvd, Hayward, CA 94545 Tel +1 (510) 293-0580 www.malcomtech.com

C.1.2 Wetting Balance Test Apparatus

GEN3 Systems Limited (Formerly Concoat Systems) Unit B2, Armstrong Mall, Southwood Business Park, Farnborough,
Hampshire GU14 0NR England. + 44 12 5252 1500 www.gen3systems.com
Malcom Co, Ltd Honmachi 4-15-10,Shibuya, Tokyo, Japan Tel +81 (3) 3320-5611 www.malcom.co.jp
Malcomtech International 26230 Industrial Blvd, Hayward, CA 94545 Tel +1 (510) 293-0580 www.malcomtech.com
Solderability Testing and Solutions Inc., 108 Rosedale Ave., Richmond KY 40475, +1 (859)353-5914 www.standsgroup.com
Metronelec, 54, Route de Sartrouville - Le Montreal 78232 Le PECO Cedax, France (USA Distributor/Solderability Testing
and Solutions Inc. Blair Park, 108 Rosedale Ave., Richmond, KY 40475, +1 (859) 353-5914) www.standsgroup.com
Robotic Process Systems, 23301 E. Mission Ave., Liberty Lake, WA 99019, +1 (509) 891-1680

C.2 Consumable Product Sources

C.2.1 Test Flux Product Sources The Test Flux product sources described below represent those currently known to the
industry. Users of this document are urged to submit additional product source names as they become available so that this
list can be kept as current as possible.
AIM Solder {www.aimsolder.com} – Standard Flux #1 Product ID: RMA 202-25
GEN3 Systems Limited {www.gen3systems.com} – Product ID’s: SMNA - Standard Flux #1: Actiec 2 / - Standard Flux #2:
Actiec 5
Kester {www.gen3systems.com} – Standard Flux #1 Product ID: 182
Qualitek International, Inc. {www.qualitek.com} – Standard Flux #1Product ID: 285-25
Solderability Testing and Solutions Inc. {www.standsgroup.com} – Standard test flux 0.2% and Standard test flux 0.5%

24
September 2013 IPC J-STD-003C

C.2.2 Gage R&R Test Coupons The copper coupons required for the Gage R&R testing in Appendix D shall be acid cop-
per electroplated foil, HTE grade (conforms to IPC-4562/3 - CU-E3), but they shall have NO conversion coatings applied.
(NOTE: The coupons will/should look stained and oxidized). The copper coupon can be of any of the three following
dimensions, AABUS:
a. 10 mm x 10 mm x 35 µm thick foil (1 oz nominal)
b. 5 mm x 10 mm x 35 µm thick foil (1 oz nominal)
c. 2 mm X 10 mm x 35 µm thick foil (1 oz nominal)
Solderability Testing and Solutions Inc., 108 Rosedale Ave., Richmond KY 40475, +1 (859)353-5914 www.standsgroup.com
is one source of these Gage R&R test coupons.

25
IPC J-STD-003C September 2013

APPENDIX D
Test Protocol for Wetting Balance Gauge Repeatability and
Reproducibility (G R&R) Using Copper Foil Coupons

a. All coupons for these tests shall be prepared individually just prior to testing. Do NOT batch clean the samples.
b. Copper foil of 35 microns nominal thickness (‘‘1 oz’’ copper) shall be used for the test.
c. The copper foil shall have NO surface treatment and is expected to have an oxidized appearance upon receipt from the
supplier. Do not use the copper foil if it is bright and shiny. This is indicative of surface anti tarnish treatments being
used. Surface treatments/preservatives can interfere with the ability to make a consistent ‘‘known good coupon’’ neces-
sary for this test.
d. The copper foil coupons shall be die cut to ensure repeatability of the samples being tested and shall be of the follow-
ing width dimensions:
1. 2 mm
2. 5 mm
3. 10 mm
e. Create a file for each foil width and for each individual person that is involved performing the G R&R.
f. Test parameters shall be:
1. Solder temperature shall be the value recommended for the alloy and the specification being used, i.e., for SnPb and
ANSI-J-STD-003 it shall be 235 °C [455 °F], for ANSI-J-STD-002 it shall be 245 °C [472 °F]. For SAC 305 it shall
be 255 °C [491 °F], regardless of the specification.
2. Immersion depth shall be 0.4 mm [0.016 in].
3. Immersion speed shall be 2 mm/sec [0.079 in/sec].
4. Dwell time in the solder shall be 10 seconds.
5. Immersion angle shall be 90° incident to the solder.
6. No pre-heat shall be used.
g. Sample preparation for the ‘‘known good coupon’’ shall be as follows:
1. Use tweezers to immerse a foil sample into a beaker of Acetone and gently agitate for 20 seconds.
2. Remove sample and blot both sides dry with a suitable lab tissue.
3. Again using tweezers immerse the above sample into a 20% v/v nitric acid solution and gently agitate for 20 seconds.
4. Immerse the sample immediately into DI water and gently agitate for 20 seconds.
5. Blot the sample dry as in step ‘‘b’’ above.
h. Dip sample into the ‘‘standard activated flux’’ normally used for solderability testing for 5 seconds.
i. Holding the samples vertically, blot the lower edge to remove excess flux.
j. Place sample into tool holder.
k. Run the test.
l. Repeat ten times for each foil width and each test person. It is recommended that three operators should participate in
the G R&R study.
m. For ease of data manipulation, it is recommended to convert the wetting forces obtained into mN/mm of wettable length.
For example, for the 10 mm coupon for example, the wettable length is 2 times 10 mm, plus 2 times 0.035 mm for a
total length of 20.07 mm.
n. For the ‘‘standard activated’’ flux of nominal 0.2% activation, the wetting force used for the calculations shall be 0.31
mN/mm. If a more active flux is being used, a large sample shall be run to obtain the mean value and this value used
for the calculations.
o. Calculate the standard deviation for each of the foil widths and each of the operators running the test.
p. Multiply the standard deviation value by 6 (this represents the plus - minus 3 standard deviations of a normal distribu-
tion).

26
September 2013 IPC J-STD-003C

q. Divide this number by 0.31 and multiply by 100 to obtain a percentage value.
r. Tabulate the three values per operator.
s. For an acceptable G R&R, the values obtained should be below 10%.
t. There should be excellent R&R results with the 10 mm coupon the first time this protocol is performed, with an increas-
ing spread between test operators when using the smaller coupons. The test may have to be repeated, or the operators
allowed some ‘‘practice time’’ prior to running the full G R&R.
u. In addition to testing the individual operators, this protocol also tests the machine and will determine linearity and bias,
if any exists. Because the wetting forces have been normalized to mN/mm, the readings for each coupon width should
be the same. If they are clearly different, but the standard deviations produced by the individual test operators are below
10%, then there is a problem with the wetting balance and the manufacturer should be contacted.

27
IPC J-STD-003C September 2013

APPENDIX E
J-STD-002/J-STD-003 Activated Solderability
Test Flux Rationale Committee Letter

The current J-STD-002/J-STD-003 specification includes a departure in the test flux methodology from that used in past sol-
derability testing. The table in 3.2.2 Flux is repeated in Table E-1.
Table E-1 Flux Compositions
Composition by Weight Percent
Constituent Flux #1 Flux #2
Colophony 25 ± 5 25 ± 5
Diethylammonium hydrochloride 0.15 ± 0.01 0.39 ± 0.01
Isopropyl Alcohol (IPA) Balance Balance
Weight of Chlorine as % of solids 0.2 0.5

The J-STD-002/J-STD-003 committees understood that any proposed change to the use of ROL0 (formerly designated type
R) would be heavily scrutinized and would require test data showing the applicability of using a standard activated flux
composition. The J-STD-002/J-STD-003 has spent significant resources investigating this flux change issue, discussing the
chemistry details and conducting multi-company design of experiment (DOE) investigations. The J-STD-002 committee
chairmen, Dave Hillman [Rockwell Collins], Doug Romm [Texas Instruments], Mark Kwoka [Intersil], and Jack McCullen
[Intel], believe that the committee has compiled an appropriate data set and held through topic discussions supporting the
proposed flux material change. The four rationales for proposing/supporting the flux change are summarized below:

1. A Proactive Solderability Testing Approach To The Implementation of Non-Tin Finishes A number of industry stud-
ies (1996 NEMI Surface Finishes Task Group Report, 1997 NCMS Lead-Free Solder Project, 2000 National Physical
Laboratory CMMT (A) 284 Report) have shown that an incompatibility of ‘‘R type’’ flux with non-tin surface finishes
such as palladium, organic solderability preservatives (OSPs), and immersion gold. The introduction of these various
metallic surface finishes on components and printed wiring boards is no longer the exception but has/is quickly becom-
ing the norm. The use of an ‘‘R type’’ flux containing only naturally occurring activators has resulted in ‘‘false negative’’
solderability test results which impact both the component/board fabricator and the assembler negatively in terms of cost
and schedule.
2. Reduced Solderability Test Variability The J-STD-002/003 solderability committees enlisted the assistance of Dr. Carol
Handwerker and the resources of the National Institute of Standards & Technology (NIST) to investigate/compare a stan-
dard activated flux composition versus the ‘‘R type’’ flux composition. A detailed statistical analysis by Bill Russell, Ray-
theon Systems, and NIST statisticians revealed the use of a standard activated flux composition greatly reduced the
amount of solderability test variation. One of the major goals of the J-STD-002/003 solderability committees is to develop
test methods and standards which promote consistency across the industry.
3. Concerns of A Loss of Solderability Assessment Safety Margin The two major historical rationale for using an ‘‘R type’’
flux: 1) colophony or rosin contains only naturally occurring flux activator constituents and thus is not subject to the
problems/complications arising from differences in flux formulations between by the flux suppliers; 2) it was an indus-
try acknowledged fact that if a component or printed wiring board surface was found to give acceptable solderability test
results using ‘‘R type’’ flux then the more active flux formulations used in the assembly process would produce accept-
able solder process results. This solderability assessment safety margin was a self-imposed, industry consensus decision.
The J-STD-002/003 committees understood the historical rationale behind the decision to use ‘‘R type’’ flux and had an
equally strong desire to maintain a solderability assessment safety cushion. However, committees fielded a number of
industry requests to reassess the solderability test flux composition based on the technology improvements in surface fin-
ishes, improvements in the flux chemistry formulations from flux suppliers, and the desire to not have excessively large
safety margins, which would impact cost and schedule in an non-value added manner. The committees conducted a num-
ber of tests (Wenger, Kwoka, ACI) demonstrating, using a specific standard level of activation in real world, industry
supplied component and printed wiring board cases, that the occurrence of a ‘‘false acceptable’’ solderability test result
was extremely low. No case was found that exhibited a ‘‘pass ROL1 test - fail ROL0 test - Fail during board assembly’’
combination. In fact, the use of both ROL1 and ROL0 were found to be more likely to create a ‘‘false reject’’ dip and
look solderability test result when compared to board level soldering performance.

28
September 2013 IPC J-STD-003C

4. Standardization of Solderability Test Flux Composition on a Global Scale A second major goal of the J-STD-002/003
solderability committees is to develop test methods and standards which promote global standardization for the electron-
ics industry. The standard activated flux composition selected and tested by the committees has been utilized in the Inter-
national Electrotechnical Commission (IEC) 60068-2-20 Soldering Specification. The IEC specification is successfully
utilized for solderability testing. Having compatibility of flux composition requirements between the J-STD-002/003
specification and the IEC specifications is a win-win situation for electronics assemblers and component/printed wiring
board fabricators.
A number of the major flux chemistry suppliers have been asked about the electronics industry’s ability to purchase the
standard activated flux composition and positive responses have been received. If you have any questions, please contact the
IPC Technical Staff to obtain additional answers/clarification.

29
 ANSI/IPC-T-50 Terms and Definitions for
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