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TC9400

The TC9400, TC9401, and TC9402 are low-cost voltage-to-frequency converters that utilize CMOS technology, providing a pulse train output proportional to an analog input voltage. They can also function as frequency-to-voltage converters, offering a linear voltage output based on input frequency. Key features include low power dissipation, programmable scale factor, and a range of guaranteed linearity options across different models.

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0% found this document useful (0 votes)
17 views16 pages

TC9400

The TC9400, TC9401, and TC9402 are low-cost voltage-to-frequency converters that utilize CMOS technology, providing a pulse train output proportional to an analog input voltage. They can also function as frequency-to-voltage converters, offering a linear voltage output based on input frequency. Key features include low power dissipation, programmable scale factor, and a range of guaranteed linearity options across different models.

Uploaded by

lilguwnojad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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TC9400

TC9401
TC9402

Voltage-To-Frequency/Frequency-To-Voltage Converters
FEATURES GENERAL DESCRIPTION
Voltage-to-Frequency The TC9400/TC9401/TC9402 are low-cost voltage-to-
frequency (V/F) converters utilizing low power CMOS
■ Choice of Guaranteed Linearity:
technology. The converters accept a variable analog input
TC9401 ......................................................... 0.01%
signal and generate an output pulse train whose frequency
TC9400 ......................................................... 0.05%
is linearly proportional to the input voltage.
TC9402 ......................................................... 0.25%
The devices can also be used as highly-accurate fre-
■ DC to 100 kHz (F/V) or 1Hz to 100kHz (V/F)
quency-to-voltage (F/V) converters, accepting virtually any
■ Low Power Dissipation .......................... 27mW Typ
input frequency waveform and providing a linearly-propor-
■ Single/Dual Supply Operation .................................
tional voltage output.
+ 8V to + 15V or ± 4V to ± 7.5V
A complete V/F or F/V system only requires the addition
■ Gain Temperature Stability ......... ± 25 ppm/°C Typ.
of two capacitors, three resistors, and reference voltage.
■ Programmable Scale Factor

Frequency-to-Voltage ORDERING INFORMATION


■ Operation ............................................ DC to 100kHz Linearity Temperature
■ Choice of Guaranteed Linearity: Part No. (V/F) Package Range
TC9401 ......................................................... 0.02%
TC9400COD 0.05% 14-Pin 0°C to +70°C
TC9400 ......................................................... 0.05%
SOIC (Narrow)
TC9402 ......................................................... 0.25%
TC9400CPD 0.05% 14-Pin 0°C to +70°C
■ Programmable Scale Factor
Plastic DIP
APPLICATIONS TC9400EJD 0.05% 14-Pin – 40°C to +85°C
CerDIP
■ µP Data Acquisition TC9401CPD 0.01% 14-Pin 0°C to +70°C
■ 13-Bit Analog-to-Digital Converters Plastic DIP
■ Analog Data Transmission and Recording TC9401EJD 0.01% 14-Pin – 40°C to +85°C
■ Phase-Locked Loops CerDIP
■ Frequency Meters/Tachometer TC9402CPD 0.25% 14-Pin 0°C to +70°C
■ Motor Control Plastic DIP
■ FM Demodulation
TC9402EJD 0.25% 14-Pin /c/c°C to +85°C
CerDIP
FUNCTIONAL BLOCK DIAGRAM

TC9400
Integrator
Capacitor Integrator Threshold One
OpAmp Detector Shot
RIN
Input
Voltage
IIN Pulse Output

Reference ÷2 Pulse/2 Output


Capacitor

IREF

Reference
Voltage

© 2001 Microchip Technology Inc. DS21483A TC9400/1/2-5 11/6/96


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

*Static-sensitive device. Unused devices must be stored in conductive


ABSOLUTE MAXIMUM RATINGS* material. Protect devices from static discharge and static fields. Stresses
VDD – VSS ................................................................. +18V above those listed under Absolute Maximum Ratings may cause perma-
IIN ........................................................................... 10mA nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
VOUT Max –VOUT Common ..........................................23V
indicated in the operational sections of the specifications is not implied.
VREF – VSS ..............................................................– 1.5V Exposure to Absolute Maximum Rating Conditions for extended periods
Storage Temperature Range ................ – 65°C to +150°C may affect device reliability.
Operating Temperature Range
C Device ................................................ 0°C to +70°C
E Device ........................................... – 40°C to +85°C
Package Dissipation (TA ≤ 70°C)
8-Pin CerDIP ..................................................800mW
8-Pin Plastic DIP ............................................. 730mW
8-Pin SOIC .....................................................470mW
Lead Temperature (Soldering, 10 sec) ................. +300°C

ELECTRICAL CHARACTERISTICS: VDD = +5V, VSS = – 5V, VGND = 0V, VREF = – 5V, RBIAS = 100kΩ,
Full Scale = 10kHz, unless otherwise specified. TA = +25°C, unless temperature range is specified (– 40°C to +85°C
for E device, 0°C to +70°C for C device).
VOLTAGE-TO-FREQUENCY TC9401 TC9400 TC9402
Parameter Definition Min Typ Max Min Typ Max Min Typ Max Unit
Accuracy
Linearity 10 kHz Output Deviation From Straight — 0.004 0.01 — 0.01 0.05 — 0.05 0.25 % Full
Line Between Normalized Zero Scale
and Full-Scale Input
Linearity 100 kHz Output Deviation From Straight — 0.04 0.08 — 0.1 0.25 — 0.25 0.5 % Full
Line Between Normalized Zero Scale
Reading and Full-Scale Input
Gain Temperature Variation in Gain A Due to — ± 25 ± 40 — ± 25 ± 40 — ± 50 ± 100 ppm/°C
Drift (Note 1) Temperature Change Full Scale
Gain Variance Variation From Ideal Accuracy — ± 10 – — ± 10 — — ± 10 – % of
Nominal
Zero Offset (Note 2) Correction at Zero Adjust for Zero — ± 10 ± 50 — ± 10 ± 50 — ± 20 ± 100 mV
Output When Input is Zero
Zero Temperature Variation in Zero Offset Due to — ± 25 ± 50 — ± 25 ± 50 — ± 50 ± 100 µV/°C
Drift (Note 1) Temperature Change
Analog Input
IIN Full Scale Full-Scale Analog Input Current to — 10 — — 10 — 10 — µA
Achieve Specified Accuracy
IIN Overrange Overrange Current — — 50 — — 50 — — 50 µA
Response Time Settling Time to 0.1% Full Scale — 2 — — 2 — — 2 — Cycle
Digital Section
VSAT @ IOL = 10mA Logic "0" Output Voltage (Note 3) — 0.2 0.4 — 0.2 0.4 — 0.2 0.4 V
VOUT Max – VOUT Voltage Range Between Output — — 18 — — 18 — — 18 V
Common (Note 4) and Common
Pulse Frequency — 3 — — 3 — — 3 — µsec
Output Width

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

ELECTRICAL CHARACTERISTICS: (Cont.) VDD = +5V, VSS = – 5V, VGND = 0, VREF = – 5V, RBIAS = 100kΩ,
Full Scale = 10kHz, unless otherwise specified. TA = +25°C, unless temperature range is specified – 40°C to +85°C for
E device, 0°C to +70°C for C device.
FREQUENCY-TO-VOLTAGE TC9401 TC9400 TC9402
Parameter Definition Min Typ Max Min Typ Max Min Typ Max Unit
Supply Current
IDD Quiescent Current Required From Positive
(Note 5) Supply During Operation — 1.5 6 — 1.5 6 — 3 10 mA
ISS Quiescent Current Required From Negative
(Note 5) Supply During Operation — – 1.5 – 6 — – 1.5 – 6 –3 – 10 mA
VDD Supply Operating Range of Positive Supply 4 — 7.5 4 — 7.5 4 — 7.5 V
VSS Supply Operating Range of Negative Supply –4 — – 7.5 – 4 — – 7.5 –4 — – 7.5 V
Reference Voltage
VREF –VSS Range of Voltage Reference Input – 2.5 — — – 2.5 — — – 2.5 — — V
Accuracy
Nonlinearity (Note 10) Deviation From Ideal Transfer — 0.01 0.02 — 0.02 0.05 — 0.05 0.25 % Full
Function as a Percentage Scale
Full-Scale Voltage
Input Frequency Frequency Range for Specified 10 — 100k 10 — 100k 10 — 100k Hz
Range (Note 7 and 8) Nonlinearity
Frequency Input
Positive Excursion Voltage Required to Turn 0.4 — VDD 0.4 — VDD 0.4 — VDD V
Threshold Detector On
Negative Excursion Voltage Required to Turn – 0.4 – 2 – 0.4 — –2 – 0.4 — –2 V
Threshold Detector Off
Minimum Positive Time Between Threshold — 5 — — 5 — — 5 — µsec
Pulse Width (Note 8) Crossings
Minimum Negative Time Between Threshold — 0.5 — — 0.5 — — 0.5 µsec
Pulse Width (Note 8) Crossings
Input Impedance — 10 — — 10 — — 10 — MΩ
Analog Outputs
Output Voltage Voltage Range of Op Amp Output — VDD – 1 — — VDD – 1 — — VDD – 1 — V
(Note 9) for Specified Nonlinearity
Output Loading Resistive Loading at Output of 2 — — 2 — — 2 — — kΩ
Op Amp
Supply Current
IDD Quiescent Current Required From Positive
(Note 10) Supply During Operation — 1.5 6 — 1.5 6 — 3 10 mA
ISS Quiescent Current Required From Negative
(Note 10) Supply During Operation — – 1.5 – 6 – 1.5 – 6 –3 – 10 mA
VDD Supply Operating Range of Positive Supply 4 — 7.5 4 — 7.5 4 — 7.5 V
VSS Supply Operating Range of Negative Supply –4 — – 7.5 – 4 — – 7.5 –4 — – 7.5 V
Reference Voltage
VREF –VSS Range of Voltage Reference Input – 2.5 — — – 2.5 — — – 2.5 — — V
NOTES: 1. Full temperature range. Guaranteed, Not Tested. 6. 10Hz to 100kHz.; Guaranteed, Not Tested
2. IIN = 0. 7. 5µsec minimum positive pulse width and 0.5 µsec minimum
3. Full temperature range, IOUT = 10mA. negative pulse width.
4. IOUT = 10µA. 8. tR = tF = 20nsec.
5. Threshold Detect = 5V, Amp Out = 0V, Full Temperature Range 9. RL ≥ 2kΩ.; Tested @ 10kΩ
10. Full temperature range, VIN = – 0.1V.
© 2001 Microchip Technology Inc. DS21483A 3 TC9400/1/2-5 11/6/96
Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

PIN CONFIGURATIONS
14-Pin Plastic DIP/CerDIP 14-Pin SOIC (Narrow)

IBIAS 1 IBIAS 14
14 VDD 1 VDD

ZERO ADJ 2 13 NC ZERO ADJ 2 13 NC


IIN 3 I 3
12 AMPLIFIER OUT IN 12 AMPLIFIER OUT
TC9400 V TC9400
VSS 4 11 THRESHOLD DETECTOR SS 4 TC9401 11 THRESHOLD DETECTOR
TC9401
TC9402
VREF OUT 5 TC9402 10 FREQ/2 OUT V OUT 5
REF 10 FREQ/2 OUT

GND 6 9 OUTPUT COMMON GND 6 9 OUTPUT COMMON


VREF 7 8 PULSE FREQ OUT V 7 8 PULSE FREQ OUT
REF

NC = NO INTERNAL CONNECTION

PIN DESCRIPTIONS
Pin No. Symbol Description
1 IBIAS This pin sets bias current in the TC9400. Connect to VSS through a 100 kΩ resistor.
See text.
2 Zero Adj Low frequency adjustment input. See text.
3 IIN Input current connection for the V/F converter.
4 VSS Negative power supply voltage connection, typically – 5V.
5 VREFOUT Reference capacitor connection.
6 GND Analog ground.
7 VREF Voltage reference input, typically – 5V.
8 Pulse Freq Out Frequency output. This open drain output will pulse LOW each time the Freq
threshold detector limit is reached. The pulse rate is proportional to input voltage.
9 Output Common Source connection for the open drain output FETs. See text.
10 Freq/2 Out This open drain output is a square wave at one half the frequency of the pulse
output (pin 8). Output transitions of this pin occur on the rising edge of pin 8.
11 Threshold Detect Input to the threshold detector. This pin is the frequency input during F/V operation.
12 Amplifier Out Output of the integrator amplifier.
13 NC No internal connection
14 VDD Positive power supply connection, typically +5V.

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

+5V
+5V

14
VDD RL
10kΩ
THRESHOLD fOUT 8
11 DETECT 3µsec
DELAY
+5V
THRESHOLD
DETECTOR
RL
10kΩ
fOUT/2 10
SELF- ÷2
START 9
–3V OUTPUT
COMMON
12 AMP OUT

VREF OUT
5

CINT 20kΩ TC9400


CREF TC9401
820pF 12pF
180pF TC9402
RIN
INPUT
1MΩ IIN 60pF
3
VIN –
+5V ZERO OpAmp
0V –10V 510kΩ
2 ADJUST
50kΩ +

–5V IBIAS VSS VREF GND

OFFSET 1 4 7 6
10kΩ
ADJUST RBIAS
100kΩ
REFERENCE
VOLTAGE
(TYPICALLY –5V)

–5V

Figure 1. 10 Hz to 10 kHz V/F Converter

VOLTAGE-TO-FREQUENCY (V/F)
CIRCUIT DESCRIPTION
The TC9400 V/F converter operates on the principal At the end of the charging period, CREF is shorted out.
of charge balancing. The operation of the TC9400 is easily This dissipates the charge stored on the reference capaci-
understood by referring to Figure 1. The input voltage (VIN) tor, so that when the output again crosses zero the system
is converted to a current (IIN) by the input resistor. This is ready to recycle. In this manner, the continued discharg-
current is then converted to a charge on the integrating ing of the integrating capacitor by the input is balanced out
capacitor and shows up as a linearly decreasing voltage at by fixed charges from the reference voltage. As the input
the output of the op amp. The lower limit of the output voltage is increased, the number of reference pulses re-
swing is set by the threshold detector, which causes the quired to maintain balance increases, which causes the
reference voltage to be applied to the reference capacitor output frequency to also increase. Since each charge in-
for a time period long enough to charge the capacitor to crement is fixed, the increase in frequency with voltage is
the reference voltage. This action reduces the charge on linear. In addition, the accuracy of the output pulse width
the integrating capacitor by a fixed amount (q = CREF × does not directly affect the linearity of the V/F. The pulse
VREF), causing the op amp output to step up a finite must simply be long enough for full charge transfer to take
amount. place.

© 2001 Microchip Technology Inc. DS21483A 5 TC9400/1/2-5 11/6/96


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

3 µsec
TYP
fOUT

fOUT/2 1/f

CREF
VREF
CINT

AMP 0V
OUT

NOTES: 1. To adjust fMIN, set VIN = 10mV and adjust the 50kΩ offset for 10Hz output.
2. To adjust fMAX, set VIN = 10V and adjust RIN or VREF for 10 kHz output.
3. To increase fOUT MAX to 100kHz, change CREF to 2pF and CINT to 75pF.
4. For high-performance applications, use high-stability components for RIN, CREF, VREF (metal film
resistors and glass capacitors). Also, separate output ground (pin 9) from input ground (pin 6).

Figure 2 . Output Waveforms

The TC9400 contains a "self-start" circuit to ensure the PIN FUNCTIONS


V/F converter always operates properly when power is first
applied. In the event that, during power-on, the Op amp Threshold Detector Input
output is below the threshold and CREF is already charged, In the V/F mode, this input is connected to the amplifier
a positive voltage step will not occur. The op-amp output will output (pin 12) and triggers a 3 µsec pulse when the input
continue to decrease until it crosses the –3.0V threshold of voltage passes through its threshold. In the F/V mode, the
the "self-start" comparator. When this happens, an internal input frequency is applied to this input.
resistor is connected to the op-amp input, which forces the The nominal threshold of the detector is halfway be-
output to go positive until the TC9400 is in its normal tween the power supplies, or (VDD + VSS)/2 ±400mV. The
operating mode. TC9400's charge balancing V/F technique is not dependent
The TC9400 utilizes low power CMOS processing for on a precision comparator threshold, because the threshold
low input bias and offset currents with very low power only sets the lower limit of the op-amp output. The op-amp's
dissipation. The open-drain N-channel output FETs provide peak-to-peak output swing, which determines the frequency,
high voltage and high current sink capability. is only influenced by external capacitors and by VREF.

VOLTAGE-TO-TIME MEASUREMENTS Pulse Freq Out


The TC9400 output can be measured in the time do- This output is an open-drain N-channel FET which
main as well as the frequency domain. Some microcom- provides a pulse waveform whose frequency is proportional
puters, for example, have extensive timing capability but to the input voltage. This output requires a pull-up resistor
limited counter capability. Also, the response time of a time and interfaces directly with MOS, CMOS, and TTL logic.
domain measurement is only the period between two out-
put pulses, while the frequency measurement must accu- Freq/2 Out
mulate pulses during the entire counter timebase period.
Time measurements can be made from either the This output is an open-drain N-channel FET which
TC9400's Pulse Freq Out output or from the Freq/2 output. provides a square wave one-half the frequency of the pulse
The Freq/2 output changes state on the rising edge of frequency output. The Freq/2 output will change state on the
Pulse Freq Out, so Freq/2 is a symmetrical square wave at rising edge of Pulse Freq Out. This output requires a pull-
one half the pulse output frequency. Timing measurements up resistor and interfaces directly with MOS, CMOS, and
can therefore be made between successive Pulse Freq TTL logic.
Out pulses, or while Freq/2 is high (or low).
6

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

Output Common VREF Out


The sources of both the Freq/2 out and the Pulse Freq The charging current for CREF is supplied through this
Out are connected to this pin. An output level swing from the pin. When the op amp output reaches the threshold level,
drain voltage to ground or to the VSS supply may be obtained this pin is internally connected to the reference voltage and
by connecting this pin to the appropriate point. a charge, equal to VREF x CREF, is removed from the
integrator capacitor. After about 3 µsec, this pin is internally
RBIAS connected to the summing junction of the op amp to dis-
An external resistor, connected to VSS, sets the bias charge CREF. Break-before-make switching ensures that
point for the TC9400. Specifications for the TC9400 are the reference voltage is not directly applied to the summing
based on RBIAS = 100kΩ ±10%, unless otherwise noted. junction.
Increasing the maximum frequency of the TC9400
beyond 100kHz is limited by the pulse width of the Pulse V/F CONVERTER DESIGN INFORMATION
Output (typically 3µsec). Reducing RBIAS will decrease the Input/Output Relationships
pulse width and increase the maximum operating frequency,
but linearity errors will also increase. RBIAS can be reduced The output frequency (fOUT) is related to the analog input
to 20kΩ, which will typically produce a maximum full scale voltage (VIN) by the transfer equation:
frequency of 500kHz. VIN 1
Frequency out = ×
RIN (VREF) (CREF)
Amplifier Out
The output stage of the operational amplifier. During External Component Selection
V/F operation, a negative-going ramp signal is available at RIN
this pin. In the F/V mode, a voltage proportional to the The value of this component is chosen to give a full-
frequency input is generated. scale input current of approximately 10µA:

Zero Adjust RIN ≅ VIN Full Scale .


This pin is the noninverting input of the operational 10µA
amplifier. The low-frequency set point is determined by Example: RIN ≅ 10V
= 1MΩ.
adjusting the voltage at this pin. 10µA

IIN Note that the value is an approximation and the exact


relationship is defined by the transfer equation. In practice,
The inverting input of the operational amplifier and the the value of RIN typically would be trimmed to obtain full-
summing junction when connected in the V/F mode. An scale frequency at VIN full scale (see "Adjustment Proce-
input current of 10µA is specified, but an overrange current dure"). Metal film resistors with 1% tolerance or better are
up to 50µA can be used without detrimental effect to the recommended for high-accuracy applications because of
circuit operation. IIN connects the summing junction of an their thermal stability and low-noise generation.
operational amplifier. Voltage sources cannot be attached
directly, but must be buffered by external resistors. CINT
The exact value is not critical but is related to CREF by
VREF the relationship:
A reference voltage from either a precision source or the
VSS supply is applied to this pin. Accuracy of the TC9400 is 3CREF ≤ CINT ≤ 10 CREF.
dependent on the voltage regulation and temperature char-
acteristics of the reference circuitry. Improved stability and linearity are obtained when
Since the TC9400 is a charge balancing V/F converter, CINT ≤ 4CREF. Low-leakage types are recommended,
the reference current will be equal to the input current. For although mica and ceramic devices can be used in applica-
this reason, the DC impedance of the reference voltage tions where their temperature limits are not exceeded.
source must be kept low enough to prevent linearity errors. Locate as close as possible to pins 12 and 13.
For linearity of 0.01%, a reference impedance of 200Ω or
less is recommended. A 0.1µF bypass capacitor should be
connected from VREF to ground.
© 2001 Microchip Technology Inc. DS21483A 7 TC9400/1/2-5 11/6/96
Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

CREF Improved Single Supply V/F Converter


The exact value is not critical and may be used to trim the Operation
full-scale frequency (see "Input/Output Relationships"). Glass
A TC9400 which operates from a single 12 to 15V
film or air trimmer capacitors are recommended because of
variable power source is shown in Figure 5. This circuit uses
their stability and low leakage. Locate as close as possible
two Zener diodes to set stable biasing levels for the TC9400.
to pins 5 and 3.
The Zener diodes also provide the reference voltage, so the
output impedance and temperature coefficient of the Zeners
VDD, VSS
will directly affect power supply rejection and temperature
Power supplies of ±5V are recommended. For high- performance.
accuracy requirements, 0.05% line and load regulation and Full scale adjustment is accomplished by trimming the
0.1µF disc decoupling capacitors located near the pins are input current. Trimming the reference voltage is not recom-
recommended. mended for high accuracy applications unless an op amp is
used as a buffer, because the TC9400 requires a low
Adjustment Procedure impedance reference (see the VREF pin description section
Figure 1 shows a circuit for trimming the zero location. for more information).
Full scale may be trimmed by adjusting RIN, VREF, or CREF. The circuit of Figure 5 will directly interface with CMOS
Recommended procedure for a 10kHz full-scale frequency logic operating at 12V to 15V. TTL or 5V CMOS logic can be
is as follows: accommodated by connecting the output pullup resistors to
the +5V supply. An optoisolator can also be used if an
(1) Set VIN to 10 mV and trim the zero adjust circuit to isolated output is required.
obtain a 10Hz output frequency.
(2) Set VIN to 10V and trim either RIN, VREF, or CREF to
obtain a 10kHz output frequency.
If adjustments are performed in this order, there should be
no interaction and they should not have to be repeated.

500
VDD = +5V
VSS = – 5V
400 RIN = 1MΩ
VIN = +10V
CREF (pF) +12pF

TA = +25°C
300
1 kHz

200

100

100kHz

0 –1 –2 –3 –4 –5 –6 –7
VREF (V)

Figure 3. Recommended CREF vs VREF

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

+
V = 8V TO 15V (FIXED)

R2
14 10kΩ
V2
0.9 2
R1 5V
6 8 fOUT
GAIN 8.2 0.01
ADJUST kΩ µF
10kΩ
7 10 fOUT/2
2 VREF
kΩ 0.01 11
µF
OFFSET
ADJUST 0.2
R1 12 TC9400
5
RIN 820
pF 180
1MΩ pF 3
VIN IIN
0V–10V IIN 1 4 9

100 kΩ

V+ R1 R2 1
fOUT = IIN ×
10V 1 MΩ 10kΩ (V2–V7) (CREF)
12V 1.4 MΩ 14kΩ
15V 2 MΩ 20kΩ (VIN–V2) (V+–V2)
IIN = +
RIN (0.9 R1+0.2 R1)

Figure 4 . Fixed Voltage — Single Supply Operation

+12 to +15V
1.2k*
14
VDD
1µF
11 THRESHOLD
R1 R4 DETECT
CINT 12 AMP OUT 10k 10k
910k 100k D2
5.1VZ CREF 5 CREF
R3
GAIN TC9400
3 IIN fOUT 8
2 ZERO
ADJUST
100k 6 GND 10 OUTPUT
fOUT/2
FREQUENCY
R2 R5
910k 91k D1
0.1µ OUTPUT 9
5.1VZ
COMMON
7 V
REF
INPUT Rp 1 I
OFFSET BIAS
VOLTAGE 100k VSS
(0 to 10V) 20k DIGITAL
4
GROUND
ANALOG GROUND

COMPONENT SELECTION
F/S FREQ. CREF CINT
1 kHz 2200pF 4700pF
10 kHz 180pF 470pF
100 kHz 27pF 75pF

Figure 5. Voltage to Frequency

© 2001 Microchip Technology Inc. DS21483A 9 TC9400/1/2-5 11/6/96


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

FREQUENCY-TO-VOLTAGE (F/V) Input Voltage Levels


CIRCUIT DESCRIPTION The input frequency is applied to the Threshold Detector
When used as an F/V converter, the TC9400 generates input (Pin 11). As discussed in the V/F circuit section of this
an output voltage linearly proportional to the input frequency data sheet, the threshold of pin 11 is approximately (VDD +
waveform. VSS) /2 ±400mV. Pin 11's input voltage range extends from
Each zero crossing at the threshold detector's input VDD to about 2.5 V below the threshold. If the voltage on pin
causes a precise amount of charge (q = CREF × VREF) to be 11 goes more than 2.5 volts below the threshold, the V/F
dispensed into the op amp's summing junction. This charge mode startup comparator will turn on and corrupt the output
in turn flows through the feedback resistor, generating voltage. The Threshold Detector input has about 200 mV of
voltage pulses at the output of the op amp. A capacitor (CINT) hysteresis.
across RINT averages these pulses into a DC voltage which In ±5 V applications, the input voltage levels for the
is linearly proportional to the input frequency. TC9400 are ±400mV, minimum. If the frequency source
being measured is unipolar, such as TTL or CMOS operat-
F/V CONVERTER DESIGN INFORMATION ing from a +5V source, then an AC coupled level shifter
should be used. One such circuit is shown in Figure 6a.
Input/Output Relationships The level shifter circuit in Figure 6b can be used in single
The output voltage is related to the input frequency (fIN) supply F/V applications. The resistor divider ensures that
by the transfer equation: the input threshold will track the supply voltages. The diode
clamp prevents the input from going far enough in the
VOUT = [VREF CREF RINT] fIN. negative direction to turn on the startup comparator. The
diode's forward voltage decreases by 2.1 mV/°C, so for high
The response time to a change in fIN is equal to (RINT ambient temperature operation two diodes in series are
CINT). The amount of ripple on VOUT is inversely proportional recommended.
to CINT and the input frequency.
CINT can be increased to lower the ripple. Values of 1µF
to 100µF are perfectly acceptable for low frequencies.
When the TC9400 is used in the single-supply mode,
VREF is defined as the voltage difference between pin 7 and
pin 2.

+8V to +5V
+5V

14 14
VDD VDD
10k

TC9400 TC9400
Frequency 0.01µF Frequency 33k 0.01µF
33k 11 11
Input Input DET
DET

+5V IN914
+5V IN914 1.0M 1.0M

0V 0V

GND VSS VSS


0.1µF 10k
6 4 4

–5V

(A) ±5V Supply (B) Single Supply

Figure 6. 10 Input Level Shifter


Frequency
TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A
Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

+5V
V+
14
VDD
*
fOUT/2 10
TC9400A
2
TC9401A
TC9402A
OUTPUT V+
COMMON 9 *

THRESHOLD
DETECT *
SEE 11 3 µsec fOUT 8
fIN FIGURE DELAY
6 * OPTIONAL
THRESHOLD IF BUFFER
DETECTOR IS NEEDED

VREF
OUT 5

CREF SEE
12pF 56 pF EQUATION,
IIN 3 PAGE 12
OFFSET
ADJUST
RINT CINT
+5V 60pF 1 MΩ + 1000pF
– AMP
OP OUT 12
100kΩ AMP VO
2 ZERO ADJUST +
2 kΩ
2.2kΩ IBIAS VSS VREF GND
1 4 7 6
10 kΩ
VREF
–5V
(TYPICALLY –5V)

Figure 7. DC — 10 kHz F/V Converter

Input Buffer
fOUT and fOUT/2 are not used in the F/V mode. However,
0.5µsec 5.0µsec
MIN MIN these outputs may be useful for some applications, such as
a buffer to feed additional circuitry. Then, fOUT will follow the
input frequency waveform, except that fOUT will go high
INPUT 3µsec after fIN goes high; fOUT/2 will be squarewave with a
frequency of one-half fOUT.
fOUT
If these outputs are not used, pins 8, 9 and 10 should be
connected to ground.
DELAY = 3µsec

fOUT/2

Figure 8 . F/V Digital Outputs


© 2001 Microchip Technology Inc. DS21483A 11 TC9400/1/2-5 11/6/96
Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

V+ = 10V to 15V

14
10k VDD
6 GND

6.2V .01µF
10k TC9400
5
VREFOUT
500k
2 ZERO
100k ADJUST 47pF
V+ IIN 3
Offset
Adjust .001µF
1M
1.0k AMP OUT 12
33k 0.01µF
Frequency 11 DET VOUT
Input 6
GND
IN914 IBIAS
1.0M VREF VSS
7 4

0.1µF
1.0k
100k

Note: The output is referenced to pin 6, which is at 6.2V (Vz). For frequency meter applications,
a 1 mA meter with a series-scaling resistor can be placed across pins 6 and 12.

Figure 9. F/V Single Supply F/V Converter

Output Filtering
The output of the TC9400 has a sawtooth ripple super-
VREFOUT 5
imposed on a DC level. The ripple will be rejected if the
47pF
TC9400 output is converted to a digital value by an integrat-
IIN 3
ing analog to digital converter, such as the TC7107 or
TC9400
TC7109. The ripple can also be reduced by increasing the 1M .001µF
value of the integrating capacitor, although this will reduce 200
AMP OUT 12
the response time of the F/V converter.
The sawtooth ripple on the output of an F/V can be
.01µF 1M 0.1µF
eliminated without affecting the F/V's response time by GND
using the circuit in Figure 10. The circuit is a capacitance 6 +5
VOUT
multiplier, where the output coupling capacitor is multiplied 2

7
6
by the AC gain of the op amp. A moderately fast op amp, 3 TL071
+
such as the TL071, should be used. 1M 4
–5

12 Figure 10. Ripple Filter

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

F/V POWER-ON RESET In some cases, however, the TC9400 output must be
zero at power-on without a frequency input. In such cases,
In F/V mode, the TC9400 output voltage will occasion-
a capacitor connected from pin 11 to VDD will usually be
ally be at its maximum value when power is first applied. This
sufficient to pulse the TC9400 and provide a power-on reset
condition remains until the first pulse is applied to fIN. In most
(see Figure 11A). Where predictable power-on operation is
frequency-measurement applications this is not a problem,
critical, a more complicated circuit, such as Figure 11B, may
because proper operation begins as soon as the frequency
be required.
input is applied.

VDD

14
1000pF

1kΩ THRESHOLD
11
fIN DETECTOR
(A)

TC9400

VDD

(B)
16 5 2 1
VCC B R C
3
CLRA
100kΩ CD4538
6
Q
4 To TC 9400
A
1µF VSS
fIN
8

Figure 11. Power-On Operation/Reset

© 2001 Microchip Technology Inc. DS21483A 13 TC9400/1/2-5 11/6/96


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

PACKAGE DIMENSIONS

14-Pin CerDIP
PIN 1

.300 (7.62)
.230 (5.84)

.098 (2.49) MAX. .030 (0.76) MIN.

.780 (19.81) .320 (8.13)


.740 (18.80) .290 (7.37)

.040 (1.02)
.200 (5.08) .020 (0.51)
.160 (4.06)
.015 (0.38) 3° MIN.
.200 (5.08) .150 (3.81) .008 (0.20)
.125 (3.18) MIN.

.400 (10.16)
.320 (8.13)
.020 (0.51)
.110 (2.79) .065 (1.65) .016 (0.41)
.090 (2.29) .045 (1.14)
14-Pin Plastic DIP

PIN 1

.260 (6.60)
.240 (6.10)

.310 (7.87)
.770 (19.56) .290 (7.37)
.745 (18.92)

.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51) .015 (0.38)
3° MIN.
.150 (3.81) .008 (0.20)
.115 (2.92)

.400 (10.16)
.310 (7.87)
.110 (2.79) .070 (1.78) .022 (0.56) Dimensions: inches (mm)
.090 (2.29) .045 (1.14) .015 (0.38) 14

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402

PACKAGE DIMENSIONS (Cont.)

14-Pin SOIC (Narrow)


PIN 1

.157 (3.99) .244 (6.20)


.150 (3.81) .228 (5.79)

.050 (1.27) TYP.

.344 (8.74)
.337 (8.56)

.069 (1.75)
.053 (1.35) .010 (0.25)
8° MAX.
.007 (0.18)
Dimensions: inches (mm)
.010 (0.25) .050 (1.27)
.018 (0.46)
.004 (0.10) .016 (0.40)
.014 (0.36)

© 2001 Microchip Technology Inc. DS21483A 15 TC9400/1/2-5 11/6/96


Voltage-To-Frequency/Frequency-To-Voltage Converters

TC9400
TC9401
TC9402
WORLDWIDE SALES AND SERVICE
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Tel: 44 118 921 5869 Fax: 44-118 921-5820

01/09/01
All rights reserved. © 2001 Microchip Technology Incorporated. Printed in the USA. 1/01 Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by
updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual
property rights arising from such use or otherwise. Use of Microchipís products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec-
tual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights
reserved. All other trademarks mentioned herein are the property of their respective companies.

16

TC9400/1/2-5 11/6/96 © 2001 Microchip Technology Inc. DS21483A

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