L4925

Very low drop voltage regulator

Features
■ Operating DC supply voltage range 6 V to 28 V
■ Transient supply voltage up to 40 V
■ Extremely low quiescent current
■ High precision output voltage PowerSO-20
■ Output current capability up to 500 mA
■ Very low dropout voltage less than 0.6 V
■ Reset circuit sensing the output voltage
Description
■ Programmable reset pulse delay with external The L4925 is a monolithic integrated 5 V voltage
capacitor regulator with a very low dropout output and
additional functions such as power-on reset and
■ Thermal shutdown and short circuit protections
programmable reset delay time.
It is designed for supplying microcomputer
controlled systems especially in automotive
applications.

Table 1. Device summary

Order codes
Package
Tube Tape and reel

PowerSO-20 L4925PD L4925PD013TR

February 2010 Doc ID 1770 Rev 7 1/14

www.st.com 1
Contents L4925

Contents

1 Block and pin connections diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

1.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 Reset circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1 Supply voltage transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.2 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5 Package Informations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

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L4925 List of tables

List of tables

Table 2. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Doc ID 1770 Rev 7 3/14

List of figures L4925

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. PowerSO-20 pin connections (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Foldback characteristics of VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Output voltage vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 5. Quiescent current vs supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. Block circuit diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Reset output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8. Application circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 9. PowerSO-20 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 12

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L4925 Block and pin connections diagrams

1 Block and pin connections diagrams

Figure 1. Block diagram

Vz VO
PREREGULATOR VREF
5V 1.23V L4925
CT
VS
Vz
RES
CS 2μ
+
-
= 2V

GND REG RESET

D95AT151

Figure 2. PowerSO-20 pin connections (top view)

Connected to pin 1-10-11-20

GND 1 20 GND
N.C. 2 19 N.C.
VS 3 18 N.C.
VS 4 17 VOUT
N.C. 5 16 VOUT
N.C. 6 15 N.C.
RES 7 14 CT
N.C. 8 13 N.C.
N.C. 9 12 N.C.
GND 10 11 GND

D95AT152

1.1 Thermal data

Table 2. Thermal data
Symbol Parameter PowerSO-20 Unit

Rth(j-amb) Thermal resistance junction to ambient 15 to 60 °C/W

Rth(j-c) Thermal resistance junction to case (max) 3.5 °C/W

Doc ID 1770 Rev 7 5/14

Electrical specifications L4925

2 Electrical specifications

2.1 Absolute maximum ratings

Table 3. Absolute maximum ratings
Symbol Parameter Value Unit

VSDC DC operating supply voltage 28 V

VSTR Transient supply voltage (t < 1s) 40 V
IO Output current internally limited
VO Output voltage 20 V
VRES Output voltage 20 V
IRES Output current 5 mA
Tstg Storage temperature -55 to 150 °C
Tj Operating junction temperature -40 to 150 °C
Tj-SD Thermal shutdown-junction temperature 165 °C

Note: The circuit is ESD protected according to MIL-STD-883C. According to ISO/DIS 7637 the
transients must be clamped with external circuitry (see Application Circuit).

2.2 Electrical characteristics

VS =14 V; Tj = –40 to 125 °C unless otherwise specified.

Table 4. Electrical characteristics

Symbol Parameter Test condition Min. Typ. Max. Unit

VO Output voltage VI = 6 to 28 V; IO = 1 to 500 mA 4.90 5 5.10 V

VI = 35 V; T < 1 s;
VO Output voltage 5.50 V
IO = 1 to 500 mA
IO = 100 mA 0.2 0.3 V
VDP Dropout voltage
IO = 500 mA 0.3 0.6 V
Input to output voltage
VIO difference in undervoltage VI = 4 V; IO = 100 mA 0.5 V
condition
VOL Line regulation VI = 6 to 28 V; IO = 1 to 1 mA 10 mV
VOLO Load regulation IO = 1 to 500 mA 50 mV
VO = 4.5 V; 550 1000 1500 mA
ILIM Current limit
VO = 0; Foldback characteristic 250 mA
IQSE Quiescent current IO = 0.3 mA 190 360 µA
IQ Quiescent current IO = 500 mA 20 mA

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L4925 Electrical specifications

Table 4. Electrical characteristics (continued)

Symbol Parameter Test condition Min. Typ. Max. Unit

Reset

VRT Reset threshold voltage 4.2 4.8 V

VRTH Reset threshold 50 100 200 mV
tRD Reset pulse delay CT = 100 nF; tR ≥100 µs 60 100 140 ms
tRR Reset reaction time CT = 100 nF; 5 30 µs
VRL Reset output low voltage RRES = 10 KΩ to VO; VS = ≥ 3 V 0.4 V
Reset output high leakage
IRH VRES = 5 V 1 µA
current
VCTth Delay comparator threshold 2 V
Delay comparator threshold
VCTth hy 200 mV
hysteresis

Doc ID 1770 Rev 7 7/14

Functional description L4925

3 Functional description

The L4925 is a monolithic integrated voltage regulator, based on the STM modular voltage
regulator approach. Several outstanding features and auxiliary functions are implemented to
meet the requirements of supplying microprocessor systems in automotive applications.
Nevertheless, it is suitable also in other applications where the present functions are
required. The modular approach of this device allows to get easily also other features and
functions when required.

3.1 Voltage regulator

The voltage regulator uses an Isolated Collector Vertical PNP transistor as a regulating
element. With this structure very low dropout voltage at currents up to 500 mA is obtained.

Figure 3. Foldback characteristics of VO

The dropout operation of the standby regulator is maintained down to 3 V input supply
voltage. The output voltage is regulated up to the transient input supply voltage of 35 V. With
this feature no functional interruption due to overvoltage pulses is generated.
The typical curve showing the standby output voltage as a function of the input supply
voltage is shown in Figure 4.
The current consumption of the device (quiescent current) is less than 250 µA. To reduce
the quiescent current peak in the undervoltage region and to improve the transient response
in this region, the dropout voltage is controlled.
The quiescent current as a function of the supply input voltage is shown in Figure 5.

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L4925 Functional description

Figure 4. Output voltage vs input voltage

Figure 5. Quiescent current vs supply voltage

3.2 Reset circuit

The block circuit diagram of the reset circuit is shown in Figure 6. The reset circuit
supervises the output voltage. The reset threshold of 4.5 V is defined with the internal
reference voltage and standby output divider. The reset pulse delay time tRD, is defined with
the charge time of an external capacitor CT:

C T ⋅ 2V
t RD = -------------------
2μA

The reaction time of the reset circuit originates from the discharge time limitation of the reset
capacitor CT and it is proportional to the value of CT. The reaction time of the reset circuit
increases the noise immunity. Standby output voltage drops below the reset threshold only a
bit longer than the reaction time results in a shorter reset delay time.
The nominal reset delay time is generated for standby output voltage drops longer than
approximately 50 ms. The typical reset output waveforms are shown in Figure 7.

Doc ID 1770 Rev 7 9/14

Functional description L4925

Figure 6. Block circuit diagram

Figure 7. Reset output waveforms

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L4925 Application information

4 Application information

4.1 Supply voltage transients

High supply voltage transients can cause a reset output signal disturbance.
For supply voltage greater than 8 V the circuit shows a high immunity of the reset output
against supply transients of more than 100 V/ms. For supply voltage lower than 8 V, supply
transients of more than 0.4 V/ms. can cause a reset signal disturbance.

4.2 Application circuit

Figure 8. Application circuit diagram

Vo Vout
Vz
PREREGULATOR VREF Co
5V 1.23V L4925
VBAT VS CT
Vz
CS 2μ RES RES
+
-
= 2V

GND REG RESET

D95AT153

For stability: CS ≥ 1 µF; CO ≥ 10 µF; ESR ≤ 2.5 Ω at 10 KHz

Recommended for application: CS = CO = 10 µF to 100 µF

Doc ID 1770 Rev 7 11/14

Package Informations L4925

5 Package Informations

Figure 9. PowerSO-20 mechanical data and package dimensions

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 3.6 0.142 MECHANICAL DATA
a1 0.1 0.3 0.004 0.012
a2 3.3 0.130
a3 0 0.1 0.000 0.004
b 0.4 0.53 0.016 0.021 Weight: 1.9gr

c 0.23 0.32 0.009 0.013

D (1) 15.8 16 0.622 0.630
D1 (2) 9.4 9.8 0.370 0.386
E 13.9 14.5 0.547 0.570
e 1.27 0.050
e3 11.43 0.450
E1 (1) 10.9 11.1 0.429 0.437
E2 2.9 0.114
E3 5.8 6.2 0.228 0.244
G 0 0.1 0.000 0.004
H 15.5 15.9 0.610 0.626
h 1.1 0.043
JEDEC MO-166
L 0.8 1.1 0.031 0.043
N 8˚(typ.)
S 8˚(max. )
T 10 0.394
(1) “D and E1” do not include mold flash or protusions.
- Mold flash or protusions shall not exceed 0.15mm (0.006”)
PowerSO-20
- Critical dimensions: “E”, “G” and “a3”.
(2) For subcontractors, the limit is the one quoted in jedec MO-166

N N R

a2 A
c
a1
b e DETAIL B
DETAIL A E

e3
H DETAIL A
lead

D
a3 slug

DETAIL B

20 11 0.35
Gage Plane
-C-

S SEATING PLANE
L
G C
BOTTOM VIEW (COPLANARITY)
E2 E1

E3

1 1 0

PSO20MEC
D1
h x 45˚
0056635 I

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L4925 Revision history

6 Revision history

Table 5. Document revision history

Date Revision Changes

01-Oct-2003 4 First issue in EDOCD DMS

Added GND pins to fig. 4
18-Nov-2005 5 Added order code and changed the formatting style in compliance
with the new template
Reset Threshold Voltage changed from 4.5V / 5.2V (min/max) to
03-Feb-2006 6
4.2V / 4.8V on Table 4.
Reformatted entire document.
09-Feb-2010 7 Removed PENTAWATT package
Updated Table 2: Thermal data

Doc ID 1770 Rev 7 13/14

 L4925

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