Mbi5124gp B
Mbi5124gp B
GFN: QFN24L-4*4-0.5
Product Description
With PrecisionDrive™ technology, MBI5124 is designed for LED displays which require to operate at low current
and to match the luminous intensity of each channel. It provides supply voltage and accepts CMOS logic input at
3.3V and 5.0V to meet the trend of low power consumption. MBI5124 contains a serial buffer and data latches which
convert serial input data into parallel output format. At MBI5124 output stage, sixteen regulated current ports are
designed to provide uniform and constant current sinks for driving LEDs within a large range of VF variations.
Besides, MBI5124 integrates the pre-charge circuit which can relieve the ghosting.
MBI5124 provides users with great flexibility and device performance while using MBI5124 in their system design for
LED display applications, e.g. LED panels. It accepts an input voltage range from 3.3V to 5V and maintains a
constant current up from 1mA to 25mA determined by an external resistor, Rext, which gives users flexibility in
controlling the light intensity of LEDs. MBI5124 guarantees to endure maximum 17V at the output port. The high
clock frequency, 25 MHz, also satisfies the system requirements of high volume data transmission.
R-EXT IO Regulator
VDD
Pre-charge
16-bit Output Drive
OE 16
Configuration
Register
GND 16 16
SDI SDO
16-bit Shift Register
CLK
GND 1 24 VDD
SDI 2 23 R-EXT
CLK 3 22 SDO
LE 4 21 OE
OUT0 5 20 OUT15
OUT1 6 19 OUT14
OUT2 7 18 OUT13
OUT3 8 17 OUT12
OUT4 9 16 OUT11
OUT5 10 15 OUT10
OUT6 11 14 OUT9
OUT7 12 13 OUT8
MBI5124GF/GP/GM
MBI5026CN/CNS/CD/CF/CP
GND 1 24 VDD
MBI5124GF/GP/GM MBI5124GFN
SDI 2 23 R-EXT
DCLK 3 22 SDO
Terminal Description
LE 4 21 GCLK
OUT0 5 20 OUT15
OUT1 6 19 OUT14
Pin 7Name 18 OUT13
OUT2 Function
8
OUT3 GND 17 OUT12
Ground terminal for control logic and current sink
OUT4 9 16 OUT11
OUT5 SDI
10 Serial-data
15 OUT10 input to the shift register
OUT6 11 14 OUT9
OUT7 CLK
12 Clock
13 OUT8input terminal for data shift on rising edge
Data strobe input terminal
LE Serial data is transferred to the output latch when LE is high. The data is latched
when LE goes low.
OE terminal LE terminal
VDD VDD
IN IN
IN OUT
N=0 1 3 4 5 6 7 8 9 10 11 12 13 14 15
CLK
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SDI
LE
OE
D0 OFF
OUT0 ON
OFF
OUT1 D1 ON
OFF
OUT2 D2 ON
OFF
OUT3 ON
OFF
OUT15 D15 ON
D15
SDO
: don’t care
Truth Table
H L Dn Dn ….. Dn - 7 …. Dn - 15 Dn-15
H L Dn+2 Dn + 2 …. Dn - 5 …. Dn - 13 Dn-13
X L Dn+3 Dn + 2 …. Dn - 5 …. Dn - 13 Dn-13
Note: The performance of thermal dissipation is strongly related to the size of thermal pad, thickness and layer
numbers of the PCB. The empirical thermal resistance may be different from simulative value. Users should plan for
expected thermal dissipation performance by selecting package and arranging layout of the PCB to maximize the
capability.
IOUT=10.05mA
Current Skew (Channel) dIOUT1 Rext=1820Ω - ±1.5 ±2.5 %
VDS=1.0V
IOUT=10.05mA
Current Skew (IC) dIOUT2 Rext=1820Ω - ±1.5 ±3.0 %
VDS=1.0V
Output Current vs.
%/dVDS VDS within 1.0V and 3.0V - ±0.1 ±0.3 %/V
Output Voltage Regulation
Output Current vs.
%/dVDD VDD within 4.5V and 5.5V - ±0.5 ±1.0 %/V
Supply Voltage Regulation
Pull-up Resistor RIN(up) OE 125 350 600 KΩ
Pull-down Resistor RIN(down) LE 125 350 600 KΩ
IDD(off) 1 Rext=Open, OUT0 ~ OUT15 =Off - 3.0 -
Rext=1820Ω, (10.7mA)
IDD(off) 2 - 6.80 -
“OFF” OUT0 ~ OUT15 =Off
Rext=1050Ω, (18.8mA)
IDD(off) 3 - 10.09 -
Supply Current OUT0 ~ OUT15 =Off mA
Rext=1820Ω, (10.7mA)
IDD(on) 1 - 6.92 -
OUT0 ~ OUT15=On
“ON”
Rext=1050Ω, (18.8mA)
IDD(on) 2 - 10.31 -
OUT0 ~ OUT15 =On
IOUT=25.8mA
Current Skew dIOUT1 Rext=720Ω - ±1.5 ±2.5 %
VDS=1.0V
IOUT=25.8mA
Current Skew dIOUT2 Rext=720Ω - ±1.5 ±3.0 %
VDS=1.0V
Output Current vs.
%/dVDS VDS within 1.0V and 3.0V - ±0.1 ±0.3 %/V
Output Voltage Regulation
Output Current vs.
%/dVDD VDD within 3.0V and 4.5V - ±0.5 ±1.0 %/V
Supply Voltage Regulation
Pull-up Resistor RIN(up) OE 125 350 600 KΩ
Pull-down Resistor RIN(down) LE 125 350 600 KΩ
IDD(off) 1 Rext= Open, OUT0 ~ OUT15 =Off - 2.45 -
VDD
IOUT
IIH,IIL
OE OUT0
... VDS
CLK
LE
.
OUT15
SDI
SDO
R - EXT GND
VIH, VIL
Iref
IDD VDD
IOUT
VIH, VIL VDD
OE
..
OUT0
Function
CLK
.
Generator LE OUT15
RL
SDI
R - EXT GND
SDO CL
Logic Input
Waveform VL
5V CL
Iref
0V
tr=tf=10ns
Timing Waveform
tW(CLK)
50%
CLK 50% 50%
tsu(D) th(D)
SDO 50%
LE 50% 50%
th(L) tsu(L)
OUTn 50%
LOW = OUTPUT ON
tpLH1, tpHL1
tpLH2, tpHL2
tW(OE)
OE
50% 50%
tpHL3 tpLH3
tof tor
According the driven LED, please set the configuration register by the following settings:
Red LED ( R )
0 1 1 1 1 1 0 1 0 1 1 0 1 0 1 1
Green LED ( G )
1 1 1 1 0 0 0 1 0 1 1 0 1 0 1 1
Blue LED ( B )
1 1 1 0 1 1 0 1 0 1 1 0 1 0 1 1
Pre-charge waveform
OE
OUTn
Pre-charge
control signal
(High=Enable)
IOUT(mA)
MBI5124 VDS vs IOUT @ VDD=5V
30
25
20
25mA
15
20mA
15mA
10 10mA
5mA
1mA
5
0
0 0.5 1 1.5 2 2.5 3 VDS (V)
IOUT(mA)
MBI5124 VDS vs IOUT @ VDD=3.3V
12
10
6 10mA
5mA
4
1mA
2
0
0 0.5 1 1.5 2 2.5 3 VDS (V)
30
25
20
15
10
0
0 1000 2000 3000 4000 5000 6000
Rext(Ω)
Temperature (℃)
300
255℃ 260℃+0℃
-5℃
250 245℃±5℃
240℃
217℃
30s max
200
Average ramp-up Ramp-down
rate= 0.7℃/s 6℃/s (max)
Average ramp-up
rate = 0.4℃/s Average ramp-up
50 rate= 3.3℃/s
25
3 3 3
Volume mm Volume mm Volume mm
Package Thickness
<350 350-2000 ≧2000
o o o
<1.6mm 260 +0 C 260 +0 C 260 +0 C
o o o
1.6mm – 2.5mm 260 +0 C 250 +0 C 245 +0 C
o o o
≧2.5mm 250 +0 C 245 +0 C 245 +0 C
*For details, please refer to Macroblock’s “Policy on Pb-free & Green Package”.
3.5
GF Type: Rth=53.28°C/W
3.0
GP Type: Rth=70.90°C/W
1.5
1.0
Safe Operation Area
0.5
0.0
0 10 20 30 40 50 60 70 80
Ambient Temperature (°C)
VDrop VDrop
VF VF
VDS VDS
MBI5124 MBI5124
MILLIMETER
SYMBOL
MIN. NOM. MAX.
A 0.70 0.75 0.80
A1 - 0.01 0.05
b 0.18 0.25 0.30
c 0.18 0.20 0.25
D 3.90 4.00 4.10
D2 2.50REF(MAX.)
e 0.50BSC
Ne 2.50BSC
Nd 2.50BSC
E 3.90 4.00 4.10
E2 2.50REF(MAX.)
L 0.35 0.40 0.45
h 0.30 0.35 0.40
Note: The thermal pad size may exist a tolerance due to the manufacturing process, please use the maximum
dimensions-D2(max. 2.50mm) x E2(max. 2.50mm) for the thermal pad layout. In addition, to avoid the short circuit
risk, the vias or circuit traces shall not pass through the maximum area of thermal pad.
Macroblock’s products are not designed to be used as components in device intended to support or sustain life or in
military applications. Use of Macroblock’s products in components intended for surgical implant into the body, or
other applications in which failure of Macroblock’s products could create a situation where personal death or injury
may occur, is not authorized without the express written approval of the Managing Director of Macroblock.
Macroblock will not be held liable for any damages or claims resulting from the use of its products in medical and
military applications.
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Unauthorized reproduction, duplication, extraction, use or disclosure of the above mentioned intellectual property
will be deemed as infringement.