Analog and Digital Testing,

Debug and Diagnosis

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Introduction to Power analysis and
Memory Testing

Department of Electronics and Communication Engineering

Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
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Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and Bushnell

Analog and Digital Testing,
Debug and Diagnosis

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Memory Testing Part II

Department of Electronics and Communication Engineering

Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis

Types of Memory
DRAM: High package Density but slow access time (Approx.20 ns).
Capacitor stores bits with refreshing activity.
32GB are commercially available.
Ex: DDR is type of DRAM, which runs faster
SRAM: Fastest access time (Approx.<2 ns).
No need of Capacitor and refreshing activity.
Bits are stored in Latches and FFs
Cache DRAM: (SRAM+DRAM) on single chip to speed up transfer rate between
SRAM and DRAM
ROM/EPROM/EEPROM: Bits are stored using programmable techniques.
No loss of data when powered off.
Analog and Digital Testing, Debug and Diagnosis

Memory testing of fault detection

Static faults: Cells, decoders and encoders
Dynamic faults: Writing, reading and storage times
Abstraction of fault models
S-A-Fs
Transition faults
Coupling Faults
Neighbourhood pattern sensitive faults
Address decoding faults
Analog and Digital Testing, Debug and Diagnosis

March Test Notation

In VLSI testing, March test notation is a sequence of operations
used to test memory. The notation uses letters to represent
operations like writing and reading.
The March test completely detects all the fault models such as
SAF – stuck-at faults, unlinked address decoder faults AFs, and
unlinked Transient faults TFs. 2. It also detects all the CFs-
coupling faults such as CFin – Inversion Coupling faults, CFid –
Idempotent Coupling faults, and CFst – State Coupling Faults.
Analog and Digital Testing, Debug and Diagnosis

March Test Notation

w0: Write a logic 0 into a memory cell
w1: Write a logic 1 into a memory cell
r0: Read a required 0 from a memory cell
r1: Read a required 1 from a memory cell
⇑: March element is done in the ascending order of the address(Increasing Memory addressing Order)
⇓: March element is done in the descending order of the address(Decreasing Memory addressing
Order)
Bidirectional Arrow (double Vertical direction): March element is done in either order of the address
Analog and Digital Testing, Debug and Diagnosis

March Test Notation

: Write a logic 0 to a memory cell containing 1
: Write a logic 1 to a memory cell containing 0
up&down arrows single vertical direction: Invert the cell contents
->: Write a logic 1 to a memory cell containing 1
<-: Write a logic to a memory cell containing 0
⇑: March element is done in the ascending order of the address(Increasing Memory addressing Order)
⇓: March element is done in the descending order of the address(Decreasing Memory addressing
Order)
Bidirectional Arrow: March element is done in either order of the address
Analog and Digital Testing, Debug and Diagnosis

March Test Notation

How March tests work
March tests apply patterns that move up and down memory
addresses while reading and writing values from known
locations. The algorithms determine the memory's size and word
length while retrieving parameters from the memory model.
Analog and Digital Testing, Debug and Diagnosis
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Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and Bushnell

Analog and Digital Testing, Debug and
Diagnosis

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and
Diagnosis
Memory Testing Part III

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
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Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and

Bushnell
Analog and Digital Testing,
Debug and Diagnosis

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Analog testing

Department of Electronics and Communication Engineering

Analog and Digital Testing, Debug and Diagnosis

Analog Testing Difficulties

1.Modeling problems
Analog and Digital Testing, Debug and Diagnosis

2. Simulation Errors:
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis

Analog fault models

Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
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Levels of Abstraction
Analog and Digital Testing, Debug and Diagnosis

Types of Analog testing

Analog and Digital Testing, Debug and Diagnosis
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Analog fault simulation

Analog and Digital Testing, Debug and Diagnosis

DC fault simulation
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and Bushnell

Analog and Digital Testing,
Debug and Diagnosis

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Functional DSP based Testing

Department of Electronics and Communication Engineering

Analog and Digital Testing, Debug and Diagnosis

DSP-based testing for analog and mixed-signal integrated circuits (ICs) leverages digital
signal processing techniques to generate inputs and measure responses, enabling efficient
and accurate testing of complex devices.

What is DSP-based testing?

It's a testing methodology that uses digital signal processing (DSP) algorithms to
generate and analyze signals for testing analog and mixed-signal ICs.

Analog stimulus signals are generated by arbitrary waveform generators (AWGs) which
employ D/A converters, and analog signals are measured by digitizers or samplers which
employ A/D converters.
Analog and Digital Testing, Debug and Diagnosis

Why use DSP-based testing?

• Flexibility: DSP allows for the generation of complex and arbitrary waveforms, enabling
precise testing of various analog and mixed-signal functionalities.
• Accuracy: DSP-based systems can achieve high accuracy in signal generation and
measurement, leading to more reliable test results.
• Efficiency: DSP algorithms can automate and optimize the testing process, reducing
testing time and costs.
Key Components:
• Arbitrary Waveform Generator (AWG): Used to generate analog stimulus signals.
• Digitizer/Sampler: Used to measure analog signals.
• DSP Processor: Used to implement the DSP algorithms for signal generation and
analysis.
Analog and Digital Testing, Debug and Diagnosis

Applications:
• Testing analog-to-digital converters (ADCs).
• Testing digital-to-analog converters (DACs).
• Testing power management integrated circuits (ICs).
• Testing serializers/deserializers (SerDes).
• Testing high-bandwidth memory (HBM).
Mixed-Signal ICs:
• These ICs combine both analog and digital circuitry on a single chip.
• Examples include ADCs, DACs, SerDes, and power management ICs.
• Their usage has grown dramatically with the increased use of cell phones, telecommunications,
portable electronics, and automobiles with electronics and digital sensors.
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Why do we need increased emphasis on analog testing?

• ICs with analog, digital and mixed-signal circuits on the same substrate are now common.
• Designers want to integrate analog and digital devices on the same chip to reduce circuit
packaging and assembly costs.
• Applications include wireless communication, networking, multi-media information
processing (sometimes in a personal computer), process control, and real-time control
systems.
• The growth in these applications areas is explosive.
• Mixed-signal hardware systems have digital cores, frequently for digital signal
processing, surrounded by analog filters,
• The analog portions interface the digital chip portions to the real world.
• Analog transistors and components are vastly larger than digital transistors, but the analog
circuit contains fewer than 100 devices, whereas the digital part now contains millions of
devices.
Analog and Digital Testing, Debug and Diagnosis

Mixed-signal circuits make the testing cost even more of a problem.

• Analog circuit signal observability is reduced in a mixed-signal system. Also, analog test has
become a larger part of the system cost.
• For micro electromechanical systems (MEMS), both mechanical and electromechanical
components are integrated onto a single substrate with the analog and digital electronic signal
processing system. An example is the air-bag controller chip now found in new automobiles,
where various accelerometers exist on the same chip as the electronics that processes their signals.
• The advantage of this, from a system point of view, is reduced distance between the transducer
and the point at which the measurement is taken. This leads to a more reliable measurement, since
there is less opportunity for noise to interfere with the parameter reading. Other systems include
chemical and optical sensors.
• At present, testing costs for analog circuits exceed 30% of the manufacturing cost of these
circuits. Even more disconcerting is the certainty that these costs will rise in the near future.
Analog automatic test equipment (ATE) is inherently much more costly than digital circuit ATE.
Analog and Digital Testing, Debug and Diagnosis

Designers are also moving from non-linear to linear analog circuits in their designs, since linear
analog circuits are much easier to design and test than non-linear ones. Instead, designers move the
non-linear signal processing function into a DSP processor in the digital part of the system.
Benefits:
• More accuracy, because a DSP signal processor has more accuracy and avoids various errors and
information loss due to unwanted analog components or to analog components that are operating
outside of their specifications.
• Easier design and testing, because the remaining analog circuit portion is linear. However,
incoming analog signals need linear filtering and A/D conversion, so there is a limit to how much
analog circuitry can be eliminated. Also, there are significant tradeoffs between analog and digital
implementations. An analog implementation of a filter can use significantly less power than a
DSP processor, and it may be much faster. This could be critical for portable, wireless devices.
Analog and Digital Testing, Debug and Diagnosis

In addition, analog designers now may operate their analog MOSFET circuits in the saturation
transistor region, rather than the linear transistor region. This is because channel length modulation
in the saturation region provides a linear variation of channel current with respect to the drain-to-
source voltage and the device behavior in saturation is often more linear than its behavior in the so
called linear transistor region.
The saturation mode can be modeled as a current source in parallel with a resistor. However, this
change introduces an additional testing requirement: We need to test for DC biasing faults in analog
circuits, to ensure that the transistor operates in the intended transistor mode.
Contrast with Digital Testing: Contrast of analog testing with digital testing to illustrate the
various problems.
1. Size is not a limitation. Analog circuits have relatively few devices, at most 50 to 100, unlike
digital circuits, which have reached 50 million transistors. The number of analog inputs and outputs
is small.
Analog and Digital Testing, Debug and Diagnosis

2. Modeling is far more difficult than in digital circuits as there is no widely-accepted analog fault
model like the digital stuck-at and path-delay fault models.

• There is infinite analog signal range, and a range of good signal values. Acceptable signal
tolerances depend on process variations and measurement inaccuracies.

• Modeling accuracy during analog fault simulation is crucial, unlike during digital fault simulation.

• Analog circuits include noise, which must be modeled and also tested for measurement error
occurs, due to the load on the ATE pin, impedance of the pin, random noise, etc.

• Capacitive coupling between digital and analog circuit substrates in a mixed-signal circuit (MSC)
is another source of noise.
Analog and Digital Testing, Debug and Diagnosis

• Absolute analog component tolerances can vary by 20%, but relative component matching can be
as good as 0.1%. Circuit functionality is designed to depend on component ratios.

• A multiple fault model is mandatory, but faults in multiple components can cancel each other’s
effect, so not every multiple fault is a real fault. The multiple fault set is too large to enumerate.

• There is no unique direction of information flow in an analog circuit, whereas there usually is in
digital CMOS circuits, with the exception of CMOS C-switch busses. The C-switch realizes a
simple connect/disconnect switch between two sub-circuits.
Analog and Digital Testing, Debug and Diagnosis

3. Decomposability: Sub-components cannot be tested individually in an analog

IC in the way that they can be in a digital IC.
4. Test busses are much harder to realize in analog than in digital circuits:
• Transporting an analog signal to an output pin may alter the analog signal and the circuit
functionality.
• Reconfiguring an analog circuit during test is often unacceptable, unlike the case of digital circuit
testing. The reconfiguration hardware can unacceptably change the analog circuit transfer function,
even when it is turned off.
Analog and Digital Testing, Debug and Diagnosis

5. Testing Methods:
• Both analog and digital circuits have structural ATPG methods, but because of a lack of well-
accepted analog fault models and the lack of a mapping between structural analog faults and analog
specifications, structural analog ATPG is not widely used.
• Specification-based (functional) test methods exist for both analog and digital circuits. However,
functional testing is rarely used for digital circuits, because the number of tests is intractable.
Conversely, in analog testing, specification-based tests are most often used, because they are
tractable and need no fault model.
• Digital circuits can be tested separately for logic functionality (stuckfaults) and timing
performance (path-delay faults.) However, these two types of tests cannot be separated in analog
circuits, and are combined.
Analog and Digital Testing, Debug and Diagnosis

Present-Day Analog Testing Methods:

Present analog circuit testing relies mostly on DSP-based analog testers. These instruments
overcame the limits of purely analog instruments, and gave these additional benefits:
Accuracy
The DSP-based ATE is nearly always more accurate than a pure analog test instrument, because the
error in a set of waveform samples is much less after digital signal processing than the error in an
individual sample. Crosstalk, noise, and signal drift are greatly educed in the DSP-based tester,
because analog waveforms are digitized at the earliest opportunity. Non-linearity in analog
components is significantly reduced in the DSP-based tester, because the DSP processor is not
subject to various analog device linearity errors, except in the front-end circuit. This contains a
sample-and-hold device and a high-speed A/D converter (ADC), which have only linear analog sub-
circuits, so accuracy is improved. Aging of components is far less of a problem, because digital
components are more likely to retain their specified performance as they age than analog
components are. Thermal effects are less troublesome in the DSP-based tester than in the pure
analog ATE. Analog components can exhibit a non-linear fluctuation in their transfer function with
temperature.
Analog and Digital Testing, Debug and Diagnosis

Speed
The DSP-based tester can acquire one set of samples for a device under- test (DUT) using one relay
switching period, one sampling period, and one settling time. Then, analysis using a discrete
Fourier transform (DFT) or fast Fourier transform (FFT) can produce many different emulated
analog test instrument measurements. For multiple measurements, the DSP-based tester is more
time efficient than using multiple analog instruments, provided that one needs to make multiple
measurements. For example, the DSP-based ATE can do one FFT calculation, and then derive many
emulated instrument measurements from that. The DSP-based tester eliminates some filter settling
time that is inherent in the analog ATE.
Analog and Digital Testing, Debug and Diagnosis

Ease of Operation:
Testing is more repeatable between DSP-based ATE, because more of it is digital, rather than
analog. Calibration of DSP-based ATE is simpler, again because more of the instrument is
digital, rather than analog. Software can store offsets and gain adjustment factors and apply
these automatically when measurements begin. Calibration is much more repeatable than with a
pure analog tester. The DSP-based ATE has reduced maintenance, again because more of it is
digital, rather than analog, so there are fewer continuous variable electrical adjustments to be
made by a technician.
Analog and Digital Testing, Debug and Diagnosis

Modeling Convenience:
The DSP-based ATE can more readily model the ideal and flawed device than the pure analog
ATE. The DSP-based ATE is extremely flexible. The operator can change test conditions from a
computer console, rather than by adjusting many analog controls on the instrument.
More Measurement Information:
The DSP-based ATE provides additional information along with the desired parameter, e.g., the
DSP peak detector
reports not only the peak value, but also the peak location in time.
Size and Power:
A general-purpose DSP-based ATE is smaller, cheaper, and uses less power than a conventional
analog ATE.
Analog and Digital Testing, Debug and Diagnosis

However, the DSP-based ATE also has the following liabilities:

1. It is expensive, although the cost is coming down because of VLSI technology.

The number of required bits of precision and the bandwidth requirement lead
to a costly digital signal processor. The large number of required FFT computations
for functional measurements and the precision components required
also compound the expense. For mixed-signal ATE, however, the main cost is
becoming the digital pins.

2. When only making one measurement, a conventional purely analog tester is

significantly cheaper. The DSP-based ATE is advantageous when multiple
measurements must be made, which is almost always the case.
Analog and Digital Testing, Debug and Diagnosis

3. The flexibility of the instrument is a problem for unskilled operators. They need to know
instrument theory.
4. The test engineer is required to know physical and mathematical principles underlying each
test, the test error sources, and the DUT error sources.

In the future, these trends will become pronounced:

1. Virtual test is a method that simulates the effect of the combination of a DSPbased
analog tester, measurement error, and a proposed test waveform for a DUT to see if the
waveform really does test the DUT effectively. The benefit is that we avoid tying up a very
expensive ATE for waveform evaluation. However, it is still mostly in the research stage.
2. Present-day, chip-area-intensive ADC self-testing mechanisms will evolve to
require far less chip-area.
Analog and Digital Testing, Debug and Diagnosis

3. We will continue to reduce the cost of DSP-based ATEs by using VLSI technology in the
ATE. Possibly structural analog circuit testing, rather than functional testing with the DSP-
based ATE, can reduce cost. However, for this to happen, we must first establish a mapping
between the proposed structural analog circuit fault models and the specification tests currently
used.

4. New methods will be invented to reduce the time that an analog circuit must sit in the DSP-
based ATE. Reduced time means less testing cost.

5. Industry will move to automatic analog test waveform generation methods,

in order to reduce the non-recurring engineering cost of designing the testing
mechanism. At present, analog test engineers must manually craft test
waveforms.
Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and Bushnell

Analog and Digital Testing, Debug
and Diagnosis

Department of Electronics and

Communication Engineering
Analog and Digital Testing, Debug and
Diagnosis

DAC/ADC Testing

Department of Electronics and Communication

Engineering
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
Analog and Digital Testing, Debug and Diagnosis
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Analog and Digital Testing, Debug and Diagnosis
References

• Essentials of Electronic Testing, V. D Agarwal and

Bushnell