AUTOMOTIVE GRADE AUIRFR540Z

AUIRFU540Z

HEXFET® Power MOSFET

VDSS 100V
D
D
RDS(on) typ. 22.5mΩ
max. 28.5mΩ S
D
S
G G G
ID 35A
D-Pak I-Pak
S AUIRFR540Z AUIRFU540Z
Applications
l Automatic Voltage Regulator (AVR) G D S
l Solenoid Injection Gate Drain Source
l Body Control
l Low Power Automotive Applications

Standard Pack
Base part number Package Type Orderable Part Number
Form Quantity
Tube 75 AUIRFR540Z
Tape and Reel 2000 AUIRFR540ZTR
AUIRFR540Z Dpak
Tape and Reel Left 3000 AUIRFR540ZTRL
Tape and Reel Right 3000 AUIRFR540ZTRR
AUIRFU540Z IPak Tube 75 AUIRFU540Z

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise
specified.
Parameter Max. Units
I D @ TC = 25°C Continuous Drain Current, V GS @ 10V (Silicon Limited) 35
I D @ TC = 100°C Continuous Drain Current, V GS @ 10V (Silicon Limited) 25 A
I DM Pulsed Drain Current c 140
PD @TC = 25°C Power Dissipation 91 W
Linear Derating Factor 0.61 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited) d 39 mJ
EAS (tested ) Single Pulse Avalanche Energy Tested Value h 75
I AR Avalanche Current c See Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Reflow Soldering Temperature, for 10 seconds 300
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case j ––– 1.64
RθJA Junction-to-Ambient (PCB mount) ij ––– 40 °C/W
RθJA Junction-to-Ambient j ––– 110

HEXFET® is a registered trademark of International Rectifier.

*Qualification standards can be found at http://www.irf.com/

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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, I D = 250μA
ΔV (BR)DSS/ΔTJ Breakdown Voltage Temp. Coefficient ––– 0.092 ––– V/°C Reference to 25°C, I D = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 22.5 28.5 mΩ VGS = 10V, ID = 21A e
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = V GS, ID = 50μA
gfs Forward Transconductance 28 ––– ––– S VDS = 25V, ID = 21A
I DSS Drain-to-Source Leakage Current ––– ––– 20 μA VDS = 100V, V GS = 0V
––– ––– 250 VDS = 100V, V GS = 0V, TJ = 125°C
I GSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V
Qg Total Gate Charge ––– 39 59 I D = 21A
Qgs Gate-to-Source Charge ––– 11 ––– nC VDS = 50V
Qgd Gate-to-Drain ("Miller") Charge ––– 12 ––– VGS = 10V e
t d(on) Turn-On Delay Time ––– 14 ––– VDD = 50V
tr Rise Time ––– 42 ––– I D = 21A
t d(off) Turn-Off Delay Time ––– 43 ––– ns RG = 13 Ω
tf Fall Time ––– 34 ––– VGS = 10V e
LD Internal Drain Inductance ––– 4.5 ––– Between lead, D

nH 6mm (0.25in.)
G
LS Internal Source Inductance ––– 7.5 ––– from package
S
and center of die contact
Ciss Input Capacitance ––– 1690 ––– VGS = 0V
Coss Output Capacitance ––– 180 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 100 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 720 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 110 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 190 ––– VGS = 0V, VDS = 0V to 80V f
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 35 MOSFET symbol
(Body Diode) A showing the
I SM Pulsed Source Current ––– ––– 140 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, I S = 21A, V GS = 0V e
t rr Reverse Recovery Time ––– 32 48 ns TJ = 25°C, I F = 21A, V DD = 50V
Qrr Reverse Recovery Charge ––– 40 60 nC di/dt = 100A/μs e
t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Coss eff. is a fixed capacitance that gives the same charging time
max. junction temperature. (See fig. 11). as Coss while VDS is rising from 0 to 80% VDSS .
‚ Limited by TJmax, starting TJ = 25°C, L = 0.17mH Limited by T Jmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 21A, VGS =10V. Part not avalanche performance.
recommended for use above this value. † This value determined from sample failure population. 100%
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%. tested to this value in production.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
ˆ Rθ is measured at TJ approximately 90°C

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1000 1000
VGS ≤60μs PULSE WIDTH VGS
TOP 15V TOP 15V
10V Tj = 25°C 10V
8.0V 8.0V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

7.0V 7.0V
6.0V 6.0V
5.5V 5.5V
100 5.0V 100 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10 10 4.5V

≤60μs PULSE WIDTH

4.5V Tj = 175°C
1 1
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 70
TJ = 25°C
Gfs , Forward Transconductance (S)

60
ID, Drain-to-Source Current(Α)

100
50

TJ = 175°C 40
10 TJ = 175°C
30

TJ = 25°C 20
1

VDS = 25V 10 VDS = 10V

≤60μs PULSE WIDTH 380μs PULSE WIDTH
0.1 0
2 3 4 5 6 7 8 0 10 20 30 40 50
ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance
vs. Drain Current

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3000 20
VGS = 0V, f = 1 MHZ ID= 21A
Ciss = Cgs + Cgd, Cds SHORTED

VGS, Gate-to-Source Voltage (V)

Crss = Cgd
VDS= 80V
2500
16 VDS= 50V
Coss = Cds + Cgd
VDS= 20V
C, Capacitance(pF)

2000
Ciss 12

1500
8

1000

4
500
Coss
Crss 0
0 0 10 20 30 40 50 60
1 10 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)

100.0 100
100μsec
TJ = 175°C 1msec

10.0 10

TJ = 25°C
10msec
1.0 1
Tc = 25°C
Tj = 175°C DC
VGS = 0V Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 1 10 100 1000

VSD, Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

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40 2.5
ID = 21A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V

30 2.0
ID , Drain Current (A)

(Normalized)
20 1.5

10 1.0

0 0.5
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

TC , CaseTemperature (°C) TJ , Junction Temperature (°C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance

Case Temperature vs. Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50
0.20
0.10
R1 R2 R3
0.1 0.05 R1 R2 R3 Ri (°C/W) τi (sec)
τJ
τJ
τC
τ
2.626 0.000052
0.02 τ1 τ2 τ3
0.01 τ1 τ2 τ3 0.6611 0.001297

0.01 Ci= τi/Ri 0.7154 0.01832

Ci i/Ri
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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15V
160

EAS, Single Pulse Avalanche Energy (mJ)

I D
L DRIVER TOP 6.5A
VDS
9.4A
120 BOTTOM 21A

RG D.U.T +
V
- DD
IAS A
VGS
20V 80
tp 0.01Ω

40
Fig 12a. Unclamped Inductive Test Circuit

V(BR)DSS
tp 0
25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

vs. Drain Current
I AS

Fig 12b. Unclamped Inductive Waveforms

QG
10 V
QGS QGD

4.5
VG ID = 1.0mA
ID = 250μA
VGS(th) Gate threshold Voltage (V)

4.0
ID = 50μA

Charge 3.5

3.0
Fig 13a. Basic Gate Charge Waveform
2.5

2.0

1.5
L
VCC 1.0
DUT -75 -50 -25 0 25 50 75 100 125 150 175
0
1K TJ , Temperature ( °C )

Fig 14. Threshold Voltage vs. Temperature

Fig 13b. Gate Charge Test Circuit

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100

Duty Cycle = Single Pulse

Allowed avalanche Current vs
Avalanche Current (A)

10 avalanche pulsewidth, tav

0.01 assuming ΔTj = 25°C due to
avalanche losses
0.05
0.10
1

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

40
TOP Single Pulse Notes on Repetitive Avalanche Curves , Figures 15, 16:
BOTTOM 1% Duty Cycle (For further info, see AN-1005 at www.irf.com)
ID = 21A 1. Avalanche failures assumption:
EAR , Avalanche Energy (mJ)

Purely a thermal phenomenon and failure occurs at a

30
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
20 3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
10 5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
0 Tjmax (assumed as 25°C in Figure 15, 16).
25 50 75 100 125 150 175 tav = Average time in avalanche.
D = Duty cycle in avalanche = t av ·f
Starting TJ , Junction Temperature (°C) ZthJC(D, tav) = Transient thermal resistance, see figure 11)

Fig 16. Maximum Avalanche Energy PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
vs. Temperature Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav

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Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

*
VGS=10V
ƒ Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

RD
VDS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)

D-Pak Part Marking Information

Part Number AUFR540Z

Date Code
Y= Year
IR Logo
YWWA WW= Work Week
A= Automotive, LeadFree

XX or XX

Lot Code

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

I-Pak Part Marking Information

Part Number AUFU540Z

Date Code
Y= Year
IR Logo
YWWA WW= Work Week
A= Automotive, LeadFree

XX or XX

Lot Code

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

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D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )

15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 )

FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
†
Qualification Information
Automotive
(per AEC-Q101)†

Qualification Level Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of
the higher Automotive level.

D-PAK MSL1
Moisture Sensitivity Level
I-PAK MSL1
Machine Model Class M2 (+/- 200V)††
AEC-Q101-002
Human Body Model Class H1B (+/- 1000V)††
ESD
AEC-Q101-001
Charged Device Model Class C5 (+/- 2000V)††
AEC-Q101-005
RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/

†† Highest passing voltage.

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IMPORTANT NOTICE

Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve
the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services
at any time and to discontinue any product or services without notice. Part numbers designated with the “AU” prefix follow
automotive industry and / or customer specific requirements with regards to product discontinuance and process change
notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order acknowledgment.

IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s
standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.

IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products
and applications using IR components. To minimize the risks with customer products and applications, customers should
provide adequate design and operating safeguards.

Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration and
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service voids all express and any implied warranties for the associated IR product or service and is an unfair and deceptive
business practice. IR is not responsible or liable for any such statements.

IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant into
the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the IR
product could create a situation where personal injury or death may occur. Should Buyer purchase or use IR products for
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employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and
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Only products certified as military grade by the Defense Logistics Agency (DLA) of the US Department of Defense, are
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Buyers acknowledge and agree that any use of IR products not certified by DLA as military-grade, in applications requiring
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IR products are neither designed nor intended for use in automotive applications or environments unless the specific IR
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designation “AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications,
IR will not be responsible for any failure to meet such requirements.

For technical support, please contact IR’s Technical Assistance Center

http://www.irf.com/technical-info/

WORLD HEADQUARTERS:

101 N. Sepulveda Blvd., El Segundo, California 90245

Tel: (310) 252-7105

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Revision History
Date Comments
6/6/2014 • Updated part number by the pictures of the parts to AU nomenclature on page 1.

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