ARM Microprocessors

History of ARM
• ARM (Acorn RISC Machine) started as a new, powerful, CPU design for the
replacement of the 8-bit 6502 in Acorn Computers (Cambridge, UK, 1985)
• First models had only a 26-bit program counter, limiting the memory space
to 64 MB (not too much by today standards, but a lot at that time).
• 1990 spin-off: ARM renamed Advanced RISC Machines
• ARM now focuses on Embedded CPU cores
• IP licensing: Almost every silicon manufacturer sells some microcontroller
with an ARM core. Some even compete with their own designs.
• Processing power with low current consumption
• Good MIPS/Watt figure
• Ideal for portable devices
• Compact memories: 16-bit opcodes (Thumb)
• New cores with added features
• Harvard architecture (ARM9, ARM11, Cortex)
• Floating point arithmetic
• Vector computing (VFP, NEON)
• Java language (Jazelle)
TM
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ARM Ltd
Design and license ARM core design but not fabricate
 Facts
• 32-bit CPU
• 3-operand instructions (typical): ADD Rd,Rn,Operand2
• RISC design…
• Few, simple, instructions
• Load/store architecture (instructions operate on registers, not memory)
• Large register set
• Pipelined execution
• … Although with some CISC touches…
• Multiplication and Load/Store Multiple are complex instructions (many cycles
longer than regular, RISC, instructions)
• … And some very specific details
• No stack. Link register instead
• PC as a regular register
• Conditional execution of all instructions
• Flags altered or not by data processing instructions (selectable)
• Concurrent shifts/rotations (at the same time of other processing)
• …
TM
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 Topologies
Von Neumann Harvard

ARM9s
ARM7s and newers
and olders
Inst. Data

AHB
bus
I D
Cache Cache
MEMORY
& I/O

Bus Interface

AHB
Memory-mapped I/O: bus

• No specific instructions for I/O

(use Load/Store instr. instead) MEMORY
• Peripheral’s registers at some & I/O
memory addresses
TM
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ARM Ltd
❑ ARM was originally developed at Acron Computer Limited, of
Cambridge, England between 1983 and 1985.
– 1980, RISC concept at Stanford and Berkeley universities.
– First RISC processor for commercial use
❑ 1990 Nov, ARM Ltd was founded
❑ ARM cores
– Licensed to partners who fabricate and sell to customers.
❑ Technologies assist to design in the ARM application
– Software tools, boards, debug hardware, application software, bus
architectures, peripherals etc…
❑ Modification of the acronym expansion to Advanced RISC
Machine.

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Why ARM?
❑One of the most licensed and thus widespread
processor cores in the world
– Used in PDA, cell phones, multimedia players, handheld
game console, digital TV and cameras
❑Used especially in portable devices due to its low
power consumption and reasonable performance

❑A simple but powerful design

❑A whole family of designs sharing similar design
principles and a common instruction set
ARM powered products
Naming ARM
❑ARMxyzTDMIEJFS
– x: series
– y: MMU
– z: cache
– T: Thumb
– D: debugger
– M: Multiplier
– I: Embedded ICE (built-in debugger hardware)
– E: Enhanced instruction
– J: Jazelle (JVM)
– F: Floating-point
– S: Synthesizible version (source code version for
EDA tools)
Classifications of ARM Processors
Classifications of ARM Processors
Summary of ARM architectures
Core Architecture
ARM1 v1
ARM2 v2
ARM2as, ARM3 v2a
ARM6, ARM600, ARM610 v3
ARM7, ARM700, ARM710 v3
ARM7TDMI, ARM710T, ARM720T, ARM740T v4T
StrongARM, ARM8, ARM810 v4
ARM9TDMI, ARM920T, ARM940T v4T
ARM9ES v5TE
ARM10TDMI, ARM1020E v5TE
ARM core architecture

Makes core ideal for audio and video applications

ARM core architecture
ARM 7 applications
ARM9 applications
ARM11 applications
ARM CortexM applications

• Dell E4300
Latitude Laptop
• instant boot-up
for users and
access to select
applications,
with multi-day
battery lifetimes
ARM CortexA applications
ARM CortexR
Popular ARM architectures (selection)
❑ARM7TDMI
– 3 pipeline stages (fetch/decode/execute)
– High code density/low power consumption
– One of the most used ARM-version (for low-end systems)
– All ARM cores after ARM7TDMI include TDMI even if they
do not include TDMI in their labels
❑ARM9TDMI
– Compatible with ARM7
– 5 stages (fetch/decode/execute/memory/write)
– Separate instruction and data cache
❑ARM11
ARM design philosophy
❑Small processor for lower power consumption (for
embedded system)
❑High code density for limited memory and physical
size restrictions
❑The ability to use slow and low-cost memory
❑Reduced die size for reducing manufacture cost and
accommodating more peripherals
ARM architecture
❑32 bit microcontroller
❑32 bit ALU
❑32 bit data bus
❑32 bit instructions
❑32 bit address bus
(4 GB memory capacity)
❑3 stage pipelining
❑37 registers- 32 bits each
16 available at a time
(Ro to R15)
ARM architecture

❑Load/store architecture
❑A large array of uniform registers
❑Fixed-length 32-bit instructions
❑3-address instructions
❑7 operating modes
❑7 Interrupts/ Exceptions
❑7addressing modes
❑3 data formats( 8, 16 & 32 bit)
ARM Applications
ARM Classic processors
❑Smart phones
❑Netbooks
❑eReaders
❑Digital TV
❑Home gateways
❑Servers & networking
ARM Cortex-R- Real time embedded processors
❑Automotive braking system
❑Power train solutions
❑Mass storage controller
❑Networking & Printing 25
ARM Applications
ARM Cortex –M Embedded Processors
❑Microcontrollers
❑Mixed signal devices
❑Smart sensors
❑Automotive body electronics & airbags

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Data Size and Instruction Set
❑ARM processor is a 32-bit architecture
❑When used in relation to the ARM
– Byte means 8 bits
– Halfword means 16 bits (two bytes)
– Word means 32 bits (four bytes)
❑Most ARM’s implement two instruction sets
– 32-bit ARM instruction set
– 16-bit Thumb instruction set

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Data Types
❑ARM processor supports 6 data types
– 8-bits signed and unsigned bytes
– 16-bits signed and unsigned half-word, aligned on 2-byte
boundaries
– 32-bits signed and unsigned words, aligned on 4-byte
boundaries
❑ARM instructions are all 32-bit words, word-aligned
❑Thumb instructions are half-words, aligned on 2-
byte boundaries

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Pipeline Organization ()

❑3-stage pipeline: Fetch – Decode - Execute

❑Three-cycle latency,
one instruction per cycle throughput

i
n
s
t i Fetch Decode Execute
r
u Fetch Decode Execute
i+1
c
t
i i+2 Fetch Decode Execute
o cycle
n
t t+1 t+2 t+3 t+4
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ARM
❑AM-Advanced RISC Machine is a 32-bit RISC
(Reduced Instruction Set Computer) processor
architecture developed by ARM Holdings. Many
beginners sometimes misunderstood that the
ARM is microcontroller or processor but in reality
❑ARM is an architecture which is used in many
processors and microcontrollers. The ARM
architecture licensed to companies that want to
manufacture ARM-based CPUs or System-on-Chip
products. This enables the companies to develop
their own processors compliant with the ARM
instruction set architecture

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LPC 2148
❑For example, the device we are using LPC2148 is
ARM architecture based SOC product developed by
NXP Semiconductor. Similarly, all major
semiconductor manufacturers like Atmel, Samsung,
TI etc. they all make ARM based SOCs.
❑Why start with ARM7 LCP2148?

❑ARM7 is most successful and widely used processor

family in embedded system applications. So we have
decided to choose ARM7 TDMI based NXP
controller LPC2148. Also, ARM7 is a balance
between classic and new Cortex series.
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LPC 2148 micrcontroller

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Why start with ARM7 LCP2148?
❑ARM7 is excellent to get start with in terms of
resources available on internet and quality
documentation provided by NXP. It suits perfectly
for beginners to get in-depth idea about hardware
and software implementation.

❑LPC2148 is manufactured by NXP Semiconductor

(Phillips) and it is preloaded with many in-built
features and peripherals. This makes it more
efficient and reliable choice for an high-end
application developer.

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LPC2148 FEATURES(NxP semiconductors)
❑CPU : ARM 7 core
❑Word length : 32 bit processor
❑ROM : 512 KB
❑RAM : 40 KB
❑2 parallel port( P0, P1 -→ 29 + 16= 45 GPIO)
❑2 Timers: T0,T1(32 bit) --→4 compare , 4 capture ,
6 PWM
❑Interrupts sources= 22
❑1 Watch dog timer
❑1 RTC( Real time clock: HH:MM:SS)
❑2 ADC(AD0, AD1)→ 8 + 6 = 14 CHANNELS( 10 bit)
❑ Multi channel ADC(Ex:0808– 8 analog inputs) 34
LPC2148 FEATURES(NxP semiconductors)
❑1 DAC(10Bit)
❑2 - I2C bus, 2 – UARTs, 2- SPI/SSP, 1 USB

Applications of LPC2148
❑Industrial Control
❑Medical systems
❑Access control
❑Point of sale
❑Communication gateway
❑Embedded soft modem
❑General purpose applications
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Block diagram of LPC2148

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Pin Diagram of LPC2148

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Activation Circuit of LPC2148

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