Lesson 8_et438b.
pptx
LESSON 8: ANALOG SIGNAL
CONVERSION
1 ET 438b Sequential Control and Data Acquisition
Department of Technology
LEARNING OBJECTIVES
After this presentation you will be able to:
Determine the resolution and accuracy of a digitized
Lesson 8_et438b.pptx
analog signal.
Explain how digital-to-analog converts operate
Explain how commonly used analog-to-digital
converts operate
Compare and contrast the characteristics several
commonly used analog-to-digital converters.
2
ANALOG SIGNAL CONVERSION
Two Problems
Analog-to-digital conversion (ADC):
Input continuous signals converted to
Lesson 8_et438b.pptx
discrete values after sampling
Digital-to-analog conversion (DAC)
Output Discrete values converted t continuous
signals
Number of bits in digital signal determines the resolution
of the digital signals. Resolution also depends on voltage
span.. 3
RESOLUTION AND ACCURACY OF DIGITIZED SIGNALS
Resolution - smallest number that can be
measured
Accuracy - is the number measured correct
Infinite
resolution
ADC Resolution Max. digital
value line
111
The output is a 0 -7 in binary
discretized version 110
zero
of the continuous 101
error
input. pts.
100
Lesson 8_et438b.pptx
011
Error determined by
the step size of the 010
digital 001
representation
4
000
Vin Full scale
et438b-2.pptx 4 analog
input
RESOLUTION FORMULAS
Resolution, in terms of full scale voltage of ADC, is
equal to value of Least Significant Bit (LSB)
Vfs
VLSB
2n
Where Vfs = full scale voltage
n = number of bits
VLSB = voltage value of LSB
Finite bit digital conversion introduces quantization errors that
range from ± VLSB /2
Maximum VLSB
Q.E.
quantization error is 2
equal to:
Where Q.E. = quantization error
VLSB = voltage value of LSB 5
Lesson 8_et438b.pptx
DIGITAL RESOLUTION AND ERROR IN ADC
Error in natural binary
111
coding is ±1/2 LSB
110
1 LSB Resolution 3-bit system
101
Lesson 8_et438b.pptx
Vfs
100 VLSB
2n
011
10 V 10
-1/2 LSB VLSB 3 125
.
010 2 8
Full scale
001 analog input
000
+1/2 1.25
8.75 10 V
LSB Vin
All voltage values between 6
8.75-10 V map to the 111 code
Number of counts reduced by 1
RESOLUTION FORMULAS
Percent Resolution- Based on the number of transitions (2n-1)
Lesson 8_et438b.pptx
1
%resolution 100%
2 1
n
Where n = number of bits in digital representation
Example 1: An 8-bit digital system is used to convert an analog
signal to digital signal for a data acquisition system. The voltage
range for the conversion is 0-10 V. Find the resolution of the system
and the value of the least significant bit
n=8 so signal converted to 256 different levels.
Vfs=10 Vdc 1
Vfs %resolution 100%
VLSB 2n 1
2n
1
%resolution 100%
28 1
Vfs 10 V 10
VLSB 8 0.0390625 V
2n 2 256 %resolution 0.392%
Example 2: The 8-bit converter of the previous
example is replaced with a 12 bit system. Compute
the resolution and the value of the least significant
bit.
Signal converted to 4096 different levels n = 12
Vfs Vfs 10 V 10
VLSB n = 12 bits Vfs = 10 Vdc VLSB 0.002441 V
2n 2n 212 4096
Digital Reconstruction
1
%resolution 12 100% 5
2 1
%resolution 0.0244%
amplitude
Difference between
analog value and
digital reconstruction 5
is quantizing error 0 0.005 0.01 0.01 0.02
time
8
Lesson 8_et438b.pptx
Digital-to-Analog Conversion
Digital-to-Analog Converter (DAC) Transfer Function
Infinite
resolution
line
FS
DAC produces discrete voltage
Lesson 8_et438b.pptx
(7/8)FS
values for each digital code
(3/4)FS
Analog Output Signal
Maximum
(5/8)FS
Voltage Output,
(1/2)FS Vomax
(3/8)FS
Vo max
resolution VLSB
(1/4)FS 2n 1
(1/8)FS Max output approaches
FS as n goes to infinity
0 Full scale
000 001 010 011 100 101 110 111 Digital
Digital Input Code Code
9
TYPE OF DIGITAL-TO-ANALOG CONVERTERS
Lesson 8_et438b,pptx
Binary-Weighted Resistor DAC
Summing amplifier Rules of Ideal OP AMPs Iin = 0,
LSB
B0 with digitally Zin = infinity
controlled inputs I A I1 I 2 I3 .... I n
In
V V V V
I1 , I2 , I3 , ... I n n 1
R 2R 4R (2 )R
B(n-3)
V V V V
I A B(n 1) B(n 2) B(n 3) ... B0 n 1
R 2R 4R (2 )R
IF
B(n-2) I3
B(n-1) I2
IA Formula for output V
R
I1 V0 I F R F
MSB
B(n i) V
V0 R F i 1
n
Iin
2i 1 R 10
B0, B(n-3), B(n-2), ....B(n-1) take on
values of 1 or 0 depending of the
digital output controlling switch
Lesson 8_et438b.pptx
BINARY WEIGHTED DAC EXAMPLE
Example: For the binary-weighted resistor DAC below find the
output when the input word is 11012 V = 10 Vdc, Rf = R
B(n i) V
V0 R F i 1
n
n=4
2i 1 R
B3 B(4-1)=B3=1 MSB
B=11012 B(4-2)=B2=1
B(4-3)=B1=0
B2 B(4-4)=B0=1 LSB
Since Rf = R
B1 B3 V B2 V B1 V B0 V
Vo R 11 21 31 41
2 R 2 R 2 R 2 R
B0 R 1 V 1 V 0 V 1 V
Vo 0 1 2 3
R 2 2 2 2
110 110 0 10 110
Vo 1 0 1 2 3
2 2 2 2
11
10
Vo 10 0 10 5 1.25 16.25
10
2 8
R-2R BINARY LADDER DAC
R-2R Ladder produces binary weighted current values from only 2
resistance values.
Vref = 10 Vdc
Lesson 8_et438b.pptx
R= 10k
2R = 20k
Req1
Req2
Req3 Find Req3 by assuming
all switches are closed to
Virtual
ground
Ground
R eq1 20 k 20 k 10 k 20 k
Circuit Analysis
R eq 2 R eq1 20 k 10 k 20 k
Currents through each 2R
value resistor directed to OP R eq 3 R eq 2 20 k 10 k
AMP or ground by digital R eq 3 10 k
switch Network equivalent resistance is R 12
R-2R LADDER ANALYSIS (CONTINUED)
R2 R4
V=10 Vdc 10k 10k Find Iin from Req3 and V
V1 V2 V3
Iin I I’ V 10 V
I1 I2
R5 Iin 1.0 mA
20k 20k I3 20k 20k R eq 3 10 k
R1 R3 R6
Lesson 8_et438b.pptx
I4
Current Values
V1 10 V
I1 0.5 mA I Iin I1 1 mA - 0.5 mA 0.5 mA I1 = 0.5 mA MSB
R1 20 k
I2 = 0.25 mA
V2 V1 I R 2 V2 10 0.5 mA 10 k 10 5 5 V I3 = 0.125 mA LSB
V2 5V
I2 0.25 mA I' I1 I 2 0.5 mA - 0.25 mA 0.25 mA
R 3 20 k Current values directed
V3 V2 I'R 4 V3 5 0.25 mA 10 k 5 2.5 2.5 V to OP AMP summing
junction or ground. At
V3 2.5 V V 2.5 V summing junction:
I3 0.125 mA I 4 3 0.125 mA
R 5 20 k R 6 20 k
13
Vo =-Rf∙IT
R-2R EXAMPLE
Lesson 8_et438b.pptx
Find the output voltage for the R-2R DAC shown below. The digital input is
1102. R=15k, 2R=30k and Rf=15k , Vref=5 Vdc
Find currents I0, I1, I2 and
I2 I1 I0 use formula V0 = - ITRf
Req
IT
All other currents reduced by
factor of 2.
14
COMMERCIAL DACS: DAC0800 FAMILY
Devices used in practical designs use integrated R-2R networks
and transistor switching. They have TTL compatible inputs.
Design Equations
Lesson 8_et438b.pptx
Vref
Iref
Rref
Iref 4
D
14 I0 Iref
2 256
D = decimal
equivalent of
binary input
8-bit binary code converted to 256 levels
of I0. Full scale value set by reference
Vref 255 Full scale
current. 1 bit change produces change of Ifs 15
Rref 256 output
1/256 in I0
DAC0800 EXAMPLE
Use OP AMP to convert current to voltage. The reference voltage is
+10 V dc and the reference resistance is 5k. The value of Rf = 2.5k
Lesson 8_et438b.pptx
Vref 10 V
I ref 2.0 mA
R ref 5 k
Io
a.) convert binary
to decimal
11012 23 (1) 2 2 (1) 21 (0) 20 (1)
11012 8 4 1 13
a.) Digital input 000011012
D 13
b.) Digital input 100011012
D
Find I0 I0 Iref
256
13
I 0 (2.0 mA) 0.1015625 mA 101.5625 A
256 Io enters so negative 16
V0 (I0 ) R f (0.1015625 mA)(2.5 k) 0.253906 V
DAC0800 EXAMPLE (CONTINUED)
b.) Digital input 100011012 Vref 10 V
I ref 2.0 mA
R ref 5 k
Io
Lesson 8_et438b.pptx
I0
b.) convert binary to decimal
100011012 27 (1) 26 (0) 25 (0) 2 4 (0) 23 (1) 2 2 (1) 21 (0) 20 (1)
11012 128 8 4 1 141
Io enters so negative
D 141
I0 I ref I0 2.0 1.1015625 mA 0.8984375 mA
D 141
I0 I ref (2.0) 1.1015626 mA
256 256 17
V0 (I0 ) R f (1.1015625 mA)(2.5 k) 2.753906 V
ANALOG-TO-DIGITAL CONVERSION (ADC)
Converting continuous signals to digital values requires
3 steps
Lesson 8_et438b.pptx
Sample analog signal. Nyquist rate or above
1 Need a minimum of 2x highest frequency
Higher rates ease signal reconstruction
Hold analog sample while conversion is in
2 progress
3 Convert analog value to digital value (binary)
18
TYPES OF ANALOG-TO-DIGITAL CONVERTERS
Tracking Successive
Integrating
(Counter Type) Approximation
• High • High Speed • Conversion
Lesson 8_et438b.pptx
Accuracy in tracking time
• Low Speed mode independent
• Low Cost • Slow of input value
• Not Conversion • Most
commonly times (Some commonly
used in DAQ Sub-types) used in DAQ
• Noise applications
Sensitive
19
TYPES OF ANALOG-TO-DIGITAL CONVERTERS
“Flash” or
Delta/Sigma
Parallel
• Multi- • One bit
Lesson 8_et438b.pptx
Comparators Conversion
• Highest • High
Speed Resolution
• High Cost • Ratio of 1-to-
0 represent
input
• Uses digital
filtering
20
COUNTER-TYPE ANALOG-TO-DIGITAL
CONVERTER OPERATION
V
When V+ = V-
Digital output
V+
A
+ B C
Lesson 8_et438b.pptx
- V AND O D
U A
V- N C
T
Clock E
R
1.) Input a constant value. Requires a sample and hold circuit.
(Not Shown)
2.) AND gate passes clock signal when point A logic high
21
3.) Counter incremented by signal B
4.) DAC output increases as counter output increases
COUNTER-TYPE ANALOG-TO-DIGITAL
CONVERTER OPERATION
Digital output
V+
A
+ B C
- V AND O D
Lesson 8_et438b.pptx
U
A Tracking A/D
V- N
T C converters use
Clock
E
R
up/down counters
to minimize
conversion times
5.) Counter stops when DAC V exceeds input V
Input V
Input Conversion time
Value depends on the
DAC Output input level 22
Value
Time
