Irf6722Mpbf Irf6722Mtrpbf: V V R R
Irf6722Mpbf Irf6722Mtrpbf: V V R R
IRF6722MPbF
IRF6722MTRPbF
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l RoHS Compliant Containing No Lead and Bromide
l Low Profile (<0.7 mm) VDSS VGS RDS(on) RDS(on)
l Dual Sided Cooling Compatible 30V max ±20V max 4.7mΩ@ 10V 8.0mΩ@ 4.5V
l Ultra Low Package Inductance Qg tot Qgd Qgs2 Qrr Qoss Vgs(th)
l Optimized for High Frequency Switching 11nC 4.3nC 1.2nC 26nC 11nC 1.8V
l Ideal for CPU Core DC-DC Converters
l Optimized for Control FET application
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques
l 100% Rg tested
DirectFET ISOMETRIC
MP
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST MQ MX MT MP
Description
The IRF6722MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection
soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET pack-
age allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6722MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF6722MPbF has been optimized for parameters that are critical in synchronous buck
operating from 12 volt bus converters including Rds(on) and gate charge to minimize losses.
20 14.0
VGS, Gate-to-Source Voltage (V)
15 VDS= 15V
10.0
8.0
10
T J = 125°C 6.0
5 4.0
T J = 25°C 2.0
0 0.0
0 2 4 6 8 10 12 14 16 18 20 0 4 8 12 16 20 24 28
VGS, Gate -to -Source Voltage (V) QG, Total Gate Charge (nC)
Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
Notes:
Click on this section to link to the appropriate technical paper. TC measured with thermocouple mounted to top (Drain) of part.
Click on this section to link to the DirectFET Website. Repetitive rating; pulse width limited by max. junction temperature.
Surface mounted on 1 in. square Cu board, steady state. Starting TJ = 25°C, L = 1.45mH, RG = 25Ω, IAS = 11A.
www.irf.com 1
11/12/07
IRF6722MPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
BVDSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 23 ––– mV/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 4.7 7.7 mΩ VGS = 10V, ID = 13A i
––– 8.0 10.8 VGS = 4.5V, ID = 11A i
VGS(th) Gate Threshold Voltage 1.4 1.8 2.4 V VDS = VGS, ID = 50µA
∆VGS(th)/∆TJ Gate Threshold Voltage Coefficient ––– -5.9 ––– mV/°C
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 24V, VGS = 0V
––– ––– 150 VDS = 24V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
gfs Forward Transconductance 25 ––– ––– S VDS = 15V, ID = 11A
Qg Total Gate Charge ––– 11 17
Qgs1 Pre-Vth Gate-to-Source Charge ––– 2.4 ––– VDS = 15V
Qgs2 Post-Vth Gate-to-Source Charge ––– 1.2 ––– nC VGS = 4.5V
Qgd Gate-to-Drain Charge ––– 4.3 ––– ID = 11A
Qgodr Gate Charge Overdrive ––– 3.5 ––– See Fig. 15
Qsw Switch Charge (Qgs2 + Qgd) ––– 5.5 –––
Qoss Output Charge ––– 11 ––– nC VDS = 16V, VGS = 0V
RG Gate Resistance ––– 1.4 2.5 Ω
td(on) Turn-On Delay Time ––– 11 ––– VDD = 15V, VGS = 4.5V i
tr Rise Time ––– 7.8 ––– ns ID = 11A
td(off) Turn-Off Delay Time ––– 9.5 ––– RG = 1.8Ω
tf Fall Time ––– 6.1 ––– See Fig. 17
Ciss Input Capacitance ––– 1300 ––– VGS = 0V
Coss Output Capacitance ––– 490 ––– pF VDS = 15V
Crss Reverse Transfer Capacitance ––– 150 ––– ƒ = 1.0MHz
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 52 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 110 integral reverse
(Body Diode) g p-n junction diode.
VSD Diode Forward Voltage ––– 0.81 1.0 V TJ = 25°C, IS = 11A, VGS = 0V i
trr Reverse Recovery Time ––– 19 29 ns TJ = 25°C, IF = 11A
Qrr Reverse Recovery Charge ––– 26 39 nC di/dt = 250A/µs i
Notes:
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2 www.irf.com
IRF6722MPbF
Absolute Maximum Ratings
Parameter Max. Units
PD @TA = 25°C Power Dissipatione 2.3 W
PD @TA = 70°C Power Dissipatione 1.5
PD @TC = 25°C Power Dissipationf 42
TP Peak Soldering Temperature 270 °C
TJ Operating Junction and -40 to + 150
TSTG Storage Temperature Range
Thermal Resistance
Parameter Typ. Max. Units
RθJA el
Junction-to-Ambient ––– 55
RθJA jl
Junction-to-Ambient 12.5 –––
RθJA kl
Junction-to-Ambient 20 ––– °C/W
RθJC Junction-to-Casefl ––– 3.0
RθJ-PCB Junction-to-PCB Mounted 1.0 –––
Linear Derating Factore 0.018 W/°C
100
D = 0.50
10 0.20
Thermal Response ( Z thJA )
0.10
0.05
1 0.02
0.01
R1
R1
R2
R2
R3
R3 Ri (°C/W) τi (sec)
τJ τA
τJ τA 6.3466 0.00237
τ1 τ2 τ3
0.1 τ1 τ2 τ3 26.688 0.9124
Ci= τi/Ri
Ci= τi/Ri
21.955 43.9
0.01 Notes:
SINGLE PULSE
( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100 1000
t1 , Rectangular Pulse Duration (sec)
2.5V 10
0.1
2.5V
≤60µs PULSE WIDTH ≤60µs PULSE WIDTH
Tj = 25°C Tj = 150°C
0.01 1
0.1 1 10 100 0.1 1 10 100
VDS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics Fig 5. Typical Output Characteristics
1000 2.0
VDS = 15V ID = 13A
≤60µs PULSE WIDTH
V GS = 10V
ID, Drain-to-Source Current (A)
10
TJ = 150°C 1.0
1 TJ = 25°C
TJ = -40°C
0.1 0.5
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics Fig 7. Normalized On-Resistance vs. Temperature
10000 30
VGS = 0V, f = 1 MHZ
Vgs = 3.5V T J = 25°C
C iss = C gs + C gd, C ds SHORTED
Vgs = 4.0V
C rss = C gd 25 Vgs = 4.5V
C oss = C ds + C gd Vgs = 5.0V
Vgs = 8.0V
Typical RDS(on) ( mΩ)
C, Capacitance(pF)
20 Vgs = 10V
Ciss
1000 15
Coss
10
5
Crss
100 0
1 10 100 0 20 40 60 80 100 120
VDS, Drain-to-Source Voltage (V)
ID, Drain Current (A)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
4 www.irf.com
IRF6722MPbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
10 DC
10msec
1
1
0.1 TA = 25°C
TJ = 150°C
VGS = 0V Single Pulse
0 0.01
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0.01 0.10 1.00 10.00 100.00
VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage Fig11. Maximum Safe Operating Area
60 3.0
40
2.0
30
ID = 50µA
1.5
ID = 150µA
20
ID = 250µA
1.0 ID = 1.0mA
10 ID = 1.0A
0 0.5
25 50 75 100 125 150 -75 -50 -25 0 25 50 75 100 125 150
Fig 12. Maximum Drain Current vs. Case Temperature Fig 13. Typical Threshold Voltage vs. Junction
Temperature
350
EAS , Single Pulse Avalanche Energy (mJ)
ID
300 TOP 0.98A
1.23A
250 BOTTOM 11A
200
150
100
50
0
25 50 75 100 125 150
Starting T J , Junction Temperature (°C)
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
S
20K
Fig 15a. Gate Charge Test Circuit Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
L DRIVER
VDS
RGSG
V D.U.T +
- VDD
IAS A
20V
tp 0.01Ω I AS
Fig 16a. Unclamped Inductive Test Circuit Fig 16b. Unclamped Inductive Waveforms
RD VDS
V DS
90%
VGS
D.U.T.
RG
+
- VDD
V GS 10%
Pulse Width ≤ 1 µs VGS
Duty Factor ≤ 0.1 %
td(on) tr t d(off) tf
Fig 17a. Switching Time Test Circuit Fig 17b. Switching Time Waveforms
6 www.irf.com
IRF6722MPbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+
***
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
*
RG • dv/dt controlled by RG V DD Re-Applied
+
• Driver same type as D.U.T. ** Voltage Body Diode Forward Drop
• I SD controlled by Duty Factor "D" - Inductor Curent
• D.U.T. - Device Under Test
Ripple ≤ 5% ISD
* Use P-Channel Driver for P-Channel Measurements *** VGS = 5V for Logic Level Devices
** Reverse Polarity for P-Channel
Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs
G = GATE
D= DRAIN
S = SOURCE
D D
S
G
S
D D
www.irf.com 7
IRF6722MPbF
DirectFET Outline Dimension, MP Outline
(Medium Size Can, P-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC IMPERIAL
CODE MIN MAX MAX MAX
A 6.25 6.35 0.246 0.250
B 4.80 5.05 1.889 0.199
C 3.85 3.95 0.152 0.156
D 0.35 0.45 0.014 0.018
E 0.58 0.62 0.023 0.032
F 0.58 0.62 0.023 0.032
G 0.75 0.79 0.030 0.031
H 0.53 0.57 0.021 0.022
J 0.63 0.67 0.025 0.026
K 1.59 1.72 0.063 0.068
L 2.87 3.04 0.113 0.119
M 0.616 0.676 0.0235 0.0274
R 0.020 0.080 0.0008 0.0031
P 0.08 0.17 0.003 0.007
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8 www.irf.com
IRF6722MPbF
DirectFET Tape & Reel Dimension (Showing component orientation).
DIMENSIONS
METRIC IMPERIAL
NOTE: CONTROLLING
CODE MIN MAX MIN MAX
DIMENSIONS IN MM
A 7.90 8.10 0.311 0.319
B 3.90 4.10 0.154 0.161
C 11.90 12.30 0.469 0.484
D 5.45 5.55 0.215 0.219
E 5.10 5.30 0.201 0.209
F 6.50 6.70 0.256 0.264
G 1.50 N.C 0.059 N.C
H 1.50 1.60 0.059 0.063
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/2007
www.irf.com 9