EC3021E: Analog MOS Integrated Circuits

Dhanaraj K. J.
Associate Professor
ECED, NIT Calicut
 id = g m v gs + g o vds Small Signal
Channel
2I D conductance
gm =
(VGS − VT )
g o  I D ro basically relates to the slope of iD-vDS curve in
the saturation region. This is due to channel length
1 modulation.
ro = rds 
I D

2
  Find the small signal req for the given circuit

v − vs If ro=10k, gm=2mS,
i = g m v gs + R=10k, req=?
ro
vs = iR = −v gs  i (ro + g m ro R + R ) = v
req=220k
v − iR v
 i = − g miR +  req = = ro + g m ro R + R
ro i
3
 Find the small signal req for the given circuit

If ro=10k, gm=2mS,
R=10k, req=?
v − vd
i = − g m v gs + i (ro + R ) = g m ro v + v
ro
req=950
v = −v gs v
 req = =
(ro + R )
i (1 + g m ro )
v − iR
i = g mv +
ro
4
The value of gate-to-source voltage VGS needed to cause surface
inversion (to create the conducting channel) is called the threshold
voltage VT.
Increasing the VGS (gate to source voltage) above and beyond VT will
not affect the surface potential and the depletion region width. They
will remain approximately constant and equal to their values attained
at the onset of surface inversion.

The main four physical components of the threshold voltage are

1) The work function difference between the gate and the channel
2) The gate voltage component to change the surface potential
3) The gate voltage component to offset the depletion charge
4) The gate voltage component to offset the fixed charges in the
gate-oxide and in the silicon-oxide interface.
 Voltage drop across oxide
due to depletion charge
Voltage drop across Surface Charge : due to imperfection in
Depletion region the oxide/substrate interface & doping
At inversion Implants: to adjust VT by
introducing a small doped
region at oxide/substrate surface
QB QOX
VT = MS - 2F - -
Cox Cox

Work-function
difference between
Gate-Oxide Capacitance per unit area
gate material and Si
Oxide permittivity
Depletion Layer Charge
OX = 3.5 x 10 -13 F/cm
COX =
tOX Oxide thickness
~ a few nm
  The threshold voltage of a MOSFET is affected by the voltage which
is applied to the back contact, which is called Body Effect (Substrate
bias effect). The voltage difference between the source and the
bulk, VBS changes the width of the depletion layer and therefore also
the voltage across the oxide due to the change of the charge in the
depletion region.

 ox
Cox =
tox

 Substrate can be thought of as a second gate, and is referred to as

the back gate, the body effect is called the back-gate effect.

VT = VT 0 +  ( − 2F + VSB − − 2F ) nMOS→ F -ve,  +ve, VSB +ve

Body bias (Substrate bias) pMOS→ F +ve,  -ve, VSB -ve

coefficient 7
Q. Find Vx for the following circuit if =0.4, kn=200A/V2. VT0=1V, |-2F|=0.6

 Vx2 
T2→ linear; I D 2 = k n  (5 − 1)Vx − 
 2 
kn
T1→ saturation; I D1 = (5 − Vx − VT 1 )2
2
1 Vx2
(5 − Vx − VT 1 ) = 4Vx −
2

2 2

VT1 Vx
(5 − Vx − VT 1 )2 = 8Vx − Vx2 ……..(1)

1 1.17 VT 1 = VT 10 +  ( − 2F + VSB − − 2F )

( )
1.064 1.21
1.069 1.21 VT 1 = 1 + 0.4 0.6 + Vx − 0.6 ……..(2)
 Vx = 1.21V
8
id = g m v gs + g o vds + g mb vbs kn
iD = (vGS − vT ) (1 + vDS )
2

2
g mb =
iD
vGS vGS =VGS
vT = VT 0 +  ( − 2 + v
F SB − − 2F )
+  ( 2 − v )
v DS =VDS
v BS =VBS
= VT 0 F BS − 2F
 iD  vT 
g mb =   
 vT  vBS 
 − 
= −k n (VGS − VT )(1 + VDS ) 
 2 2 − V 
 F BS 
= g m
  
 = 
 2 2 − V 
 F BS 
9
id = g m v gs + g o vds + g mb vbs

10
 Find the small signal req for the given circuits

( ro + RD )
 req = ro + ( g m + g mb )ro R + R  req =
1 + ( g m + g mb )ro

11
1. Razavi B. Design of Analog CMOS Integrated Circuits, 2001. New
York, NY: McGraw-Hill. 2017;587(589):83-90
2. P. Allen & D. Holberg, CMOS Analog Circuit Design, 3rd Edition,
Oxford University Press, 2013
3. Jan M Rabaey, Digital Integrated Circuits - A Design Perspective,
Prentice Hall, 2nd Edition, 2005

12
EC3021E: Analog MOS Integrated Circuits, Monsoon Semester 2025-26 13