EXPERIMENT NO 10: Design Pseudo Random Sequence generator using
IC7495.
AIM: To design the operation of Pseudo Random sequence generator.
COMPONENTS REQUIRED: IC7495, IC 7486, patch cords, trainer kits.
The 74LS95 is a 4-Bit Shift Register with serial and parallel synchronous operating modes.
The serial shift right and parallel load are activated by separate clock inputs which are
selected by a mode control input. The data is transferred from the serial or parallel D inputs to
the Q outputs synchronous with the HIGH to LOW transition of the appropriate clock input.
The sequence generator circuit is used to generate a prescribed series of bits in
synchronization through a CLK. This kind of generator is used as a code generator, counters,
random bit generators, sequence, and prescribed period generator. The basic design diagram
of this is shown below.
The N-bit shift register outputs like Q0 through QN-1 are applied like the inputs to
a combinational circuit is known as the next state decoder. Here, the output of a next state
decoder ‘Y’ is given as the serial input to the shift register. The designing of the next state
decoder is done based on the sequence required.
The minimum of number of flip-flops, N required to generate a sequence of length S is given
by S≤2N-1.
Result: Verified the Pseudo Random sequence generator using 7495.
