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Mikrosensorer
MEMS Products & Packaging Issues MEMS Packaging Approaches Integrated microfabrication processes Water bonding processes Wafer level packaging Power supply Signal recording
Packaging of MEMS sensors
Recommended Literature
Handbook of silicon based MEMS Materials & technologies Author: Lindroos, Veikko. Available as eBook on http://www.lub.lu.se/en/search/lubsearch.html Part V: Encapsulation of MEMS Components
Project meeting 1
Sensor Accelerometer Pressure sensor Flow sensor Time 17/4, 13.15 17/4, 14.15 17/4, 15.15
Packaging
One of least explored MEMS components Litterature is scarce No unique and generally applicable packaging method for MEMS Each device works in a special environment Each device has unique operational specs
Design Issues in MEMS packaging
Up to and exceeding 80% of total cost Sensors need direct access to the environment Often package must be specifically designed for device Reliability Media compatibility Modularity Small quantities
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Example Accelerometer
Key Issues Free standing microstructures Temperature sensitive microelectronics Hermetic sealing
Example Pressure Sensor
Key Issues Exposure to external pressure source Housing for harsh environment Interface coating
Example Microfluidic Device
Key Issues Micro-to-Macro interconnections Good sealing Temperature sensitive materials Optical access
Packaging serves two main functions
Protection from environment
Electrical isolation or passivation from electrolytes and moisture Mechanical protection to ensure structural integrity Optical and thermal protection to prevent undesired effects on performance Chemical isolation from harsh chemical environment
Protection from device
Material selection to eliminate or reduce host response Device operation to avoid toxic products Device sterilization
Packaging
Electrical protection
Electrostatic shielding Moisture penetration (major failure mechanism for biosensors) Interface adhesion Interface stress Corrosion of substrate materials
Major Issues in MEMS packaging
Release and stiction Die handling and dicing Stress Outgassing Testing Encaptulation / Hermetic seals Integration
Mechanical protection
Rigidity; must be mechanically stable throughout device life Weight, size, and shape for convenience in handling and operation
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Packaging levels
Wafer Die Device System
Wafer Level Packaging
To adopt IC packaging processes as much as possible To protect MEMS devices and follow IC packaging processes Encapsulations (caps) are required
Die Packaging Operations
Die separation Die pick Die attach (a) Inspection Wire Bonding (b) Preseal inspection Packaging and Sealing (c) Plating Lead trim Final Tests
Electrical Contacts
Wire bonding
Most common method Uses variety of metals, Au/Al combination popular
Ball bond
Wedge bond
Electrical Contacts
Flip chips
Solder bumps used to attach flipped chip Quick universal connection Allows individual chip optimization Connect dissimilar materials
Sealing Methods
Hermetic
Welding Soldered lid Glass-sealed lid or top Wafer bonding processes
Nonhermetic
Epoxy molding Blob top
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Package Encapsulation
Protection from corrosion, mechanical damage Moisture is one of the major sources of corrosion
Types of Hermetic Bonding
The permeability to moisture of Glasses, Ceramics and Metals is orders of magnitude lower than plastic materials
Metal package
harshest conditions, 80% of all metal packages are welded, the remaining being soldered
Ceramic package
Solder glass seal by high-lead-content vitreous or de-vitrifying glasses at 400oC Hard glass seal by high-melting borosilicate glass at 1100oC
Soldering and Brazing
Soldering
Tin-Lead solder (indium and silver are sometimes added to improve the fatigue strength) Tin-Lead oxidizes easily and should be stored in nitrogen
Welding
Most popular method in high-reliability packages High-current pulses produce local heating 10001500oC Can accommodate greater deviations from flatness Electrode, e-beam and laser can be used as energy sources
Brazing
Eutectic Au-Sn (80:20) at 280oC 350oC for stronger, more corrosion-resistant seal and the use of flux can be avoided
Glass Sealing
Device passivation to against moisture and contaminant Hermetic glass-to-metal seals or glass-ceramic seal Chemical inertness, oxidation resistance, electrical insulation, impermeability to moisture and other gasses, wide choice of thermal characteristics Soft glass sealing are made by lead-zinc-borate glasses below 420oC ->low water content, good chemical durability, thermal expansion closely matched to that of the ceramic
Glass Sealing
Disadvantages: low strength and brittleness Water is absorbed on glass network and may get released into the sealed cavity
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Polymer Sealing
Advantages:
Low bonding temperature No metal ions Elastic property of polymer can reduce bonding stress
Wafer Bonding Processes
Anodic Bonding
Temperature ~450oC, voltage ~1000 volts Silicon (metal) to glass
Disadvantages:
Not a good material for hermetic sealing High vapor pressure Poor mechanical properties
Fusion Bonding
Temperature ~1000oC Silicon to silicon (glass, oxide)
Examples:
Silicone (Blob top) UV-curable encapsulant resins Thick ultraviolet photoresists such as polyimides, AZ-4000, and SU-8
Eutectic Bonding
Silicon to metal (silicon-to-gold ~363oC)
Anodic bondning
Anodic Bonding
Sodium-rich glass (Pyrex) Operation temperature is well below the melting temperature of glass for 5 ~ 10 minutes Surface roughness < 1 m Native oxide on Si must be thinner than 0.2 m Bonding temperature below 450oC or the thermal properties of materials begin to deviate seriously
Silicon Fusion Bonding
Clean surface, roughness < 4 nm Activated (Hydrated) in warm sulfuric acid Weak Hydrogen bond Dehydration in 1000oC Forms stable silicondioxide bond
Eutectic Bonding
Formed by heating two (or more) materials (e.g. Au and Si) so they diffuse together. The resulting alloy composition melts at a lower temperature than the base materials (e.g. a 97Au-3Si eutectic melts at 363C).
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Eutectic Bonding
Benefits:
Good thermal conductivity Electrically conducting Good fatigue/creep resistance Low contamination 'High' process/operating temperature capability.
LPCVD encapsulation
(a) Standard surface micromachining process (b) Additional thick PSG (phosphosilicate glass) deposition to define encapsulation regions
Limitations:
High stresses on Si chip due to CTE mismatch on larger dies Relatively high processing temperatures Die back metallisation may be required Rework is difficult.
(c) Additional thin PSG deposition to define etch channels
LPCVD encapsulation
(d) Nitride shell deposition; etch hole definition
Laser bonding of polymers
(e) Removal of all sacrificial PSG inside the shell; supercritical CO2 drying; global LPCVD sealing
Other bonding methods
UV Curable Materials Photoresists Adhesives (Glues, Silicones) Waxes Chemical Bonding Hydrophilic bond
Power
External power source Batteries
large and heavy
RF coil
Inductive charging and reading
Energy in the environment
Energy harvesting, scavenging
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Energy Harvesting
Ambient-radiation sources (RF-coils) Photovoltaic harvesting Biomechanical harvesting Piezoelectric energy (Vibrations) Thermoelectrics (Thermal difference) Pyroelectricity (Heat change) Magnetostatic energy (Inductive) Blood sugar energy (Biobattery)
Signal recording
Since it is possible to make small effective sensors, why not have sensors everywhere and monitor the process continously?
Example Neural Electrodes
Signal Recording Utah Neural Array
100 channels Sample with 10 bits
10 kS/s => 10 Mbits/s Bluetooth 1 Mbit/s
Porous silicon
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Set-up for porous silicon etch
Principle of poreformation
Porous Silicon formation
Porous Silicon
Poresize: 1nm-10m Area enlargement: 300m2/g Porosity: 80% Optically active
Vertical macro pores
Porosity of porous silicon is dependent of:
Current Density Etch time HF/etanol mix Illumination Crystal orientation Doping type Doping concentration
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Applications of porous silicon
Sacrificial material - Under etch and release of surface structures Optical components - electroluminiscence - optical sensor surface (elipsometri) Chemically active surface - catalyst, super hydrofobic surfaces Electrical insulator - deep/thick oxides Explosive
Porous silicon as sacrificial layer
Channels created with porous etching
Porous membrane
Micro enzym reactor in porous silicon
Cell culturing
Pore size influences axonal outgrowth
Axons preferred to grow on silicon with small pores (~300 nm).
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Superhydrophobicity
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