ICX285AL: Diagonal 11 MM (Type 2/3) Progressive Scan CCD Image Sensor With Square Pixel For B/W Cameras
ICX285AL: Diagonal 11 MM (Type 2/3) Progressive Scan CCD Image Sensor With Square Pixel For B/W Cameras
Features
Progressive scan allows individual readout of the image signals from all pixels.
High horizontal and vertical resolution (both approximately 1024 TV-lines) still images without a mechanical
shutter
Supports high frame rate readout mode (effective 256 lines output, 60 frame/s)
Square pixel
Aspect ratio: 4:3
Horizontal drive frequency: 28.64 MHz Pin 1
High sensitivity, low smear 2
Low dark current, excellent anti-blooming characteristics
Continuous variable-speed shutter V
Horizontal register: 5.0 V drive
Device Structure 8
2
Interline CCD image sensor H 40
Pin 11
Image size: Diagonal 11 mm (Type 2/3)
Total number of pixels: 1434 (H) 1050 (V) approx. 1.50M pixels Optical black position
Number of effective pixels: 1392 (H) 1040 (V) approx. 1.45M pixels (Top View)
Number of active pixels: 1360 (H) 1024 (V) approx. 1.40M pixels
Chip size: 10.2 mm (H) 8.3 mm (V)
Unit cell size: 6.45 m (H) 6.45 m (V)
Optical black: Horizontal (H) direction: Front 2 pixels, rear 40 pixels
Vertical (V) direction: Front 8 pixels, rear 2 pixels
Number of dummy bits: Horizontal 20
Vertical 3
Substrate material: Silicon
Sony reserves the right to change products and specifications without prior notice. This information does not convery any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
1
E00Y42A27
ICX285AL
GND
GND
V2B
V2A
V3
V4
V1
NC
NC
NC
10 9 8 7 6 5 4 3 2 1
Vertical register
Note)
11 12 13 14 15 16 17 18 19 20
VOUT
VDD
RG
H2
H1
SUB
CSUB
VL
H1
H2
Pin Description
Pin No. Symbol Description Pin No. Symbol Description
1 V1 Vertical register transfer clock 11 VOUT Signal output
2 V2A Vertical register transfer clock 12 VDD Supply voltage
3 NC 13 RG Reset gate clock
4 V2B Vertical register transfer clock 14 H2 Horizontal register transfer clock
5 NC 15 H1 Horizontal register transfer clock
6 NC 16 SUB Substrate clock
7 V4 Vertical register transfer clock 17 CSUB Substrate bias*1
8 V3 Vertical register transfer clock 18 VL Protective transistor bias
9 GND GND 19 H1 Horizontal register transfer clock
10 GND GND 20 H2 Horizontal register transfer clock
*1
DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of
0.1F.
2
ICX285AL
Bias Conditions
Item Symbol Min. Typ. Max. Unit Remarks
Supply voltage VDD 14.55 15.0 15.45 V
Protective transistor bias VL *2
DC characteristics
Item Symbol Min. Typ. Max. Unit Remarks
Supply current IDD 9 11 mA
*2
VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the
V driver should be used.
*3
Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within
the CCD.
3
ICX285AL
Waveform
Item Symbol Min. Typ. Max. Unit Remarks
diagram
Readout clock voltage VVT 14.55 15.0 15.45 V 1
VVH1, VVH2 0.05 0 0.05 V 2 VVH = (VVH1 + VVH2)/2
VVH3, VVH4 0.2 0 0.05 V 2
VVL1, VVL2,
7.3 7.0 6.7 V 2 VVL = (VVL3 + VVL4)/2
VVL3, VVL4
VV 6.5 7.0 7.35 V 2 V V = VVHn VVLn (n = 1 to 4)
Vertical transfer
VVH3 VVH 0.25 0.1 V 2
clock voltage
VVH4 VVH 0.25 0.1 V 2
VVHH 1.4 V 2 High-level coupling
VVHL 1.3 V 2 High-level coupling
VVLH 1.4 V 2 Low-level coupling
VVLL 0.8 V 2 Low-level coupling
VH 4.75 5.0 5.25 V 3
Horizontal transfer
VHL 0.05 0 0.05 V 3
clock voltage
VCR VH/2 V 3 Cross-point voltage
VRG 3.0 3.3 5.5 V 4
Reset gate VRGLH VRGLL 0.4 V 4 Low-level coupling
clock voltage
VRGL VRGLm 0.5 V 4 Low-level coupling
Substrate clock voltage VSUB 21.25 22.0 22.75 V 5
4
ICX285AL
V4 RH RH
H1 H2
CV4 R4 RH CHH RH
CV12B CV34 H1 H2
CV1
Horizontal transfer clock equivalent circuit
CV12A CV2B3
RRG
RGND RG
CV3
CV2A4
CV2A3
R3 CRG
R2A
V2A CV2A V3
Vertical transfer clock equivalent circuit Reset gate clock equivalent circuit
5
ICX285AL
100%
90%
VVT M
2
10%
0% 0V
tr twh tf
V1 V3
VVHL
VVHL VVHL VVH3 VVHL
VVH1
VVLH VVL3VVLH
VVLL VVLL
VVL
VVL1 VVL
V2A, V2B V4
VVHL VVHL
VVHL
VVHL VVH4
VVL2 VVL4
VVLH VVLH
VVLL VVLL
VVL VVL
H2
90%
VCR
VH
twl
VH
2
10%
H1 VHL
two
Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR.
The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two.
tr twh tf
VRGH
RG waveform
twl
VRG
Point A
VRGLH
VRGL
VRGLL
VRGLm
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from
Point A in the above diagram until the rising edge of RG.
In addition, VRGL is the average value of VRGLH and VRGLL.
VRGL = (VRGLH + VRGLL)/2
Assuming VRGH is the minimum value during the interval twh, then:
VRG = VRGH VRGL
Negative overshoot level during the falling edge of RG is VRGLm.
100%
90%
M
VSUB
M
2
10%
VSUB 0%
tr twh tf
During imaging ns
H2 10 12.5 10 12.5 5 7.5 5 7.5
During parallel- H1 0.01 0.01
s
serial conversion H2 0.01 0.01
Reset gate clock RG 4 8 24 2 2 ns
During drain
Substrate clock SUB 3.5 3.9 0.5 0.5 s
charge
two
Item Symbol Unit Remarks
Min. Typ. Max.
Horizontal transfer
H1, H2 8 10 ns
clock
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1.0
0.9
0.8
0.7
Relative Response
0.6
0.5
0.4
0.3
0.2
0.1
0
400 500 600 700 800 900 1000
Wave Length [nm]
8
ICX285AL
1392 (H)
16 16
V 8
10
H H
8 8
1040 (V)
8
Zone 0, I
Zone II, II'
V Ignored region
10 Effective pixel region
Measurement System
Note) Adjust the amplifier gain so that the gain between [*A] and [*B] equals 1.
9
ICX285AL
Readout modes
The diagram below shows the output methods for the following two readout modes.
16 16
15 15
14 14
13 13
12 12
11 11
10 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1
VOUT VOUT
Note) Blacked out portions in the diagram indicate pixels which are not read out.
Output starts from line 1 in high frame rate readout mode.
10
ICX285AL
Measurement conditions
(1) In the following measurements, the substrate voltage is set to the value indicated on the device, and the
device drive conditions are at the typical values of the progressive scan mode, bias and clock voltage condi-
tions.
(2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical
black level (OB) is used as the reference for the signal output, which is taken as the value measured at point
[*B] of the measurement system.
1. Sensitivity 1
Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of
1/100 s, measure the signal output (VS1) at the center of the screen, and substitute the value into the following
formula.
100
S1 = VS1 [mV]
30
2. Sensitivity 2
Set to standard imaging condition II. After selecting the electronic shutter mode with a shutter speed of
1/500 s, measure the signal output (VS2) at the center of the screen, and substitute the value into the following
formula.
500
S2 = VS2 [mV]
30
3. Saturation signal
Set to standard imaging condition III. After adjusting the luminous intensity to 20 times the intensity with the
average value of the signal output, 200 mV, measure the minimum value of the signal output.
4. Smear
Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, first adjust the luminous intensity
to 500 times the intensity with the average value of signal output, 200 mV. Then after the readout clock is
stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the
maximum value (Vsm [mV]) of the signal output and substitute the value into the following formula.
Vsm 1 1
Sm = 20 log [dB] (1/10 V method conversion value)
200 500 10
11
ICX285AL
6. Dark signal
Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and the
device in the light-obstructed state, using the horizontal idle transfer level as a reference.
8. Lag
Adjust the signal output generated by strobe light to 200 mV. After setting the strobe light so that it strobes
with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula.
VD
Light
Output
12
Drive Circuit
5.0V
15V
7V 100k
0.1 0.1
1/35V
1 20
XSUB 2 19
0.1 1 2 3 4 5 6 7 8 9 10
XV4 3 18
NC
NC
NC
V1
V4
V3
V2A
V2B
GND
GND
4 17
5 16 ICX285
CXD3400N (BOTTOM VIEW)
(TOP VIEW)
XV2 6 15
H2
H1
VL
CSUB
SUB
H1
H2
RG
VDD
VOUT
XSG2B 7 14
13
20 19 18 17 16 15 14 13 12 11
XSG2A 8 13
XV3 9 12
XV1 10 11
0.1
3.3/20V
4.7k
H2
1/20V CCD OUT
H1
0.1
RG
ICX285AL
14
V2A
VD
V4
V3
V2B
V1
HD
OUT
CCD
1040
1
2
1063
1068
"a"
1
2
3
4
1 5
2 6
3 7
4 8
5 9
Drive Timing Chart (Vertical Sync) Progressive Scan Mode
6 10
7 11
8 12
1 13
2
3
4
5
6
7
8
9 21
10
1031
1032 1044
1040 1052
1
2
1063
1068
1
1
2
ICX285AL
Drive Timing Chart (Vertical Sync "a" Enlarged) Progressive Scan Mode
H1
1
1
56
56
392
392
1790
1790
70 nsec (2 bits)
HD
98
V2A
1 126
15
V2B
1 126
182
V3
1 126
1 210
V4
ICX285AL
Drive Timing Chart (Horizontal Sync) Progressive Scan Mode
392
412
430
1790
1
56
CLK
H1
H2
RG
SHP
SHD
1 210
16
V1 1 84 1 42
1 42 1 168
V2A 1 126
1 42 1 168
V2B 1
1 126 1 84
1 126
V3
1 210
V4 126
1 126
105 1 105
SUB
ICX285AL
17
V2A
VD
V4
V3
V2B
V1
HD
OUT
CCD
1020
1025 260
1028 261
1033 262
1036 263
264
265
266
267
"a"
1
1 2
4 3
1 4
4 5
9 6
12 7
17 8
20 9
25 10
11
12
13
1020
1025 260
1028 261
Drive Timing Chart (Vertical Sync) High Frame Rate Readout Mode
1033 262
1036 263
264
265
266
267
"a"
1
1 2
4 3
1 4
4 5
9 6
12 7
17 8
20 9
25 10
11
12
13
1020
1025 260
1028 261
1033 262
1036 263
264
265
266
267
1
1 2
4 3
1 4
4 5
9 6
12 7
17 8
ICX285AL
Drive Timing Chart (Vertical Sync "a" Enlarged) High Frame Rate Readout Mode
H1
1
1
56
56
392
392
1790
1790
70 nsec (2 bits)
HD
V1
V2A
18
V2B
V3
V4
84 10 10 10 10 10 10 10 10
ICX285AL
Drive Timing Chart (Horizontal Sync) High Frame Rate Readout Mode
392
412
430
1790
1
56
CLK
H1
H2
RG
SHP
SHD
1 50 1 50 1 50 1 50
19
V1
1 20 1 30 1 30 1 30
1 10 1 50 1 50 1 50
V2A
1 30 1 30 1 30 1 30
1 10 1 50 1 50 1 50
V2B
1 30 1 30 1 30 1 30
1 30 1 50 1 50 1 50
V3
1 30 1 30 1 30 1 30
1 50 1 50 1 50 1 50
V4
1 30 1 30 1 30
1 126
SUB
105 1
ICX285AL
ICX285AL
Notes on Handling
2) Soldering
a) Make sure the package temperature does not exceed 80C.
b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W
soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently.
c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering
tool, use a thermal controller of the zero cross On/Off type and connect it to ground.
4) Do not expose to strong light (sun rays) for long periods. For continuous using under cruel condition exceeding
the normal using condition, consult our company.
5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in
such conditions.
6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks.
20
Package Outline Unit: mm
0 to 9
+ 0.25 20 11
2-2.50 0
A D
~
~
6.0
20.32
2-
5.0
0
20.2 0.3
3.
B
R
2-
0.25
26.0 0.25 (Elongated Hole)
1Pin Index
3.2 0.3
21
1. "A" is the center of the effective image area.
2. The straight line B which passes through the center of the reference hole and the elongated
1.0
hole is the reference axis of vertical direction (V).
2.54 0.46 3. The straight line C which passes through the center of the reference hole at right angle to vertical
reference line B is the reference axis of horizontal direction (H).
1.27
5.5 0.2
4. The bottom D is the height reference.(Two points are specified.)
0.3 M
5. The center of the effective image area specified relative to the reference hole
is (H, V) = (13.15, 5.0) 0.15mm.
PACKAGE STRUCTURE
6. The angle of rotation relative to the reference line B is less than 1
PACKAGE MATERIAL Ceramic
7. The height from the bottom D to the effective image area is 1.46 0.15mm.
LEAD TREATMENT GOLD PLATING
LEAD MATERIAL 8. The tilt of the effective image area relative to the bottom D is less than 60m.
42 ALLOY
PACKAGE MASS 5.90g 9. The thickness of the cover glass is 0.75mm and the refractive index is 1.5.
Sony Corporation
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