Power Management Systems,
System on Chip (SoC)
Jyotirmoy Ghosh
Advanced VLSI Design Laboratory,
Indian Institute of Technology Kharagpur
Email- jyotirmoy@iitkgp.ac.in
Contents
What is power management
How to decide
DC-DC power converters
■ LDO
■ Inductor based switched mode converters
● Closed loop control
■ Switched capacitor converters
Voltage regulator module
■ Dynamic voltage scaling
■ Current mode control
■ Pulse skip mode
SOC implementation
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What is Power Management ?
Supply Load
Vin A direct connection
L, C, Power switches, etc.
Vout
is not desirable.
Converter - Power Stage
2.5V-5.5V 1.2V
Controller
An Example of a Power Management System: DC-DC Converter
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Domains of Power Management
Voltage Conversion
DC to DC – Cell phones
DC to AC – Home inverter
AC to DC – Rectifier as in a PC supply
AC to AC - Transformer
Others
Battery Charging – Cell phone chargers
Drivers – CFL and LED Drivers
Power Quality Improvement
And many more…
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Typical applications
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World wide Power Management
The market is
expected to grow at a
rate higher than most
of other areas in IC
design.
In many large analog
companies, half of the
business is in power
management.
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Example: Power Management Unit for a Notebook
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How to choose?
Input - Output Voltage Range
Load current
Voltage and Current Ripple
Efficiency
Nature of Application
Transient Requirements
Loop BW
EMI
Input – Output Isolation
Board Area
Cost
…
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DC-DC conversion techniques
Low Drop-Out Regulators
Inductor Based Switched Mode Power Converter
Switched Capacitor Converters
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Low Drop-Out Regulator
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Resistor divider
R1
Vout = Vin
R1 + R2
R1
Vout → V’out
Vin
LOAD
R2
Can’t draw any current
without causing extra drop!
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LDO – Low Drop Out regulator
The idea is to control R1.
R1
Vout →V’
→ Vout
out
Vin
LOAD
R2
Controller
Drop R2.
Use feedback control to adjust the value of R1.
Consider Vin = 5.0 V; Vout = 1.0 V. Efficiency =
?
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R1 to a MOSFET
Power MOSFET (Acting as R1)
Vout → Vout
Vin
LOAD
Driver
Controller
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Inductor Based Switched Mode Converter
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Step down switching converter: Buck Converter
Buck Converter Circuit ON-state OFF-state
Applying volt-sec balance for the inductor:
Ts
1
∫
Ts 0
VL dt = 0
DTs Ts
⇒ ∫0
VL dt + ∫
DTs
VL dt = 0.
⇒ (Vg − Vo)DTs + ( − Vo)(1 − D)Ts = 0
Inductor Voltage
⇒ Vo = DVg
Vo
Conversion ratio of Buck Converter: D=
Vg
Thus, this is a step-down conversion
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Analysis of Buck Converter Cont..
Inductor current ripple:
di (Vg − VO )DTs
Inductor voltage current relation: V = L Thus ∆i L =
dt L
During time interval dt = D.Ts, (1 − D)VO Ts
or, ∆i L =
change in inductor current di is ∆iL ; L
V
and voltage across the inductor is (Vg − VO ) Since I L = IO = O
R
∆iL (1 − D)RTs
Current ripple factor =
IL L
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Analysis of Buck Converter Cont..
Output voltage ripple:
Total charge transferred to capacitor that causes the voltage to swing from
maximum to minimum:
1 ∆i L TS ∆i L TS
∆q = =
2 2 2 8
∆q ∆i L TS VO (1 − D)TS2
∆VO = = =
C 8C 8LC
Voltage ripple factor
∆Vo (1 − D)Ts 2
=
Vo 8LC
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Analysis of Boost Converter
Boost Converter Circuit ON-state OFF-state
Inductor Voltage
From inductor volt-sec balance: (Vg)DTs + (Vg − VO )(1 − D)Ts = 0
Vg
or, VO =
(1 − D)
VO 1
Conversion ratio of Boost Converter: =
Vg 1 − D
Thus, this is a step-up conversion
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Analysis of Boost Converter Cont..
Inductor current ripple:
di
Inductor voltage current relation: V=L VgDTs
dt Thus, ∆iL =
L
During tiem interval dt= D.Ts
Io Vo Vg
change in inductor current di is ∆i L IL = = =
(1− D) R(1− D) R(1− D)2
and votlage across the inductor is Vg
2
∆iL D.(1 − D) RTs
Current ripple factor =
IL L
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Analysis of Boost Converter Cont..
Output voltage ripple:
Total charge transferred to capacitor that causes the voltage to swing from
maximum to minimum:
∆q = IO DTs
∆q I O DTs VO DTs
Thus, ∆VO = = =
C C RC
∆VO DTs
Voltage ripple factor =
VO RC
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Non inverting Buck-Boost Converter
Cascading of Buck Converter and Boost Converter
VO D (VO ≥ Vg) when, ( D ≥ 0.5)
Voltage conversion ratio: =
Vg 1 − D
(VO < Vg) when, ( D < 0.5)
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Switched Mode Converter in Closed Loop
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Classical PWM Voltage mode control
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Small signal model
T(s) = Gvd(s) . H(s) . Gc(s) . 1/VM
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Switched Capacitor Converter
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Step-up Conversion
From capacitor - charge balance :
(Vout − VDD )C = VDD C
or, Vout = 2VDD
Simple voltage doubler circuit
Voltage multiplier circuit – Dickson charge pump
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Step-down Conversion
VIN
VOUT =
2 VIN
VOUT =
3
On-chip scalable voltage generation
Good choice for very low power battery operated system
Voltage scaling below 1V
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Comparison of three classes
This is a basic comparison for typical members from each class and is only meant
to give a rough idea. Depending on actual circumstances, exceptions may arise.
Criteria LDO Inductor Based Charge Pumps
Switcher
Voltage Conversion Only Buck1 All (buck, boost, All (in discrete
Range inversion) steps)2
Efficiency Low High High
Max Output Current Moderate3 High3 Low4
Vout ripple Negligible High High
Design Complexity Moderate High High
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An application of Switching Converter:
Voltage Regulator Module (VRM) for Processors
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Technology Challenges
Stringent transient specifications
Low voltage and current ripple
Typical load transient waveform
Tight line and load regulations
High efficiency throughout the
operation periods
Typical efficiency vs. load current waveform
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Dynamic voltage scaling
Typical processor voltage and dynamically scaled processor voltage
CPU power loss = CVCC
2
f + PLEAK
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PWM Current Mode Converter
Dead Vout
Driver Faster dynamic response
band L
O Better stability
A
D
Better line regulation
PWM PID
Comparator Vf
EA
Latch Ve
Ri Vref
IL
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Difference between VMC and CMC
Voltage Mode Control
Vref
vcontrol
EA d
PWM
V0
ramp
Current Mode Control
Vref
vcontrol clk S d
EA Q
Comp. R
V0
iL(t)
Inductor current vcontrol
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Low load efficiency
Pulse skip mode
Boost converter with pulse skip mode
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SOC Implementation
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Block diagram of buck converter & its different
flavors
Converter IC
Fully
Ramp Osc. Controller IC Integrated
Converter IC
PWM Dead
Latch Driver
Comp band
L
O
A
D
VREF
Error Amp
Compensator
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Commercially where we are now?
Controller IC: (Commercially most popular)
■ As power circuits and compensator are external, it has lot of flexibility to
change the power circuits for various applications, value of L & C etc.
■ But, it takes lot of area.
Converter IC: (Commercially moderately popular)
■ As, fixed power circuit are integrated in-side the chip, it can be used for
specific type of applications.
■ As, compensator is also integrated, only specific value of L & C should be
connected as off-chip.
■ It takes much lesser area than the previous solution.
Fully integrated converter IC: (Commercially less popular/ mostly in
research phase)
■ Can be used for very specific applications.
■ It is most area efficient solution.
■ But, it has lesser power efficiency due to the limitation of on-chip L & C.
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Selection of switching frequency
Advantages and Disadvantages of Higher Switching Frequency
Advantages:
■ Enable smaller solution size
● Smaller inductor can be used with higher switching frequency to
maintain the same current ripple
● Improve dynamic performance because of higher bandwidth of control
loop
Disadvantages:
■ Increase AC losses
● Gate drive loss
● Switching loss
● Dead time loss
● AC loss of inductor
■ EMI impact
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Selection of MOSFETs
• For a given die size, N-MOSFET offers low on-resistance and lower gate charge
compared to P-MOSFET but requires “bootstrapped” drive circuit
• Tradeoff in selection: power loss, cost and package type (for discrete MOSFETs)
• MOSFETs are characterized by its Figure of Merit (FOM) = Qg * RDS(on)
Vertical MOSFETs:
High voltage blocking capability
Higher packing density
Lateral MOSFETs:
Lower gate charge
Higher current carrying capacity per unit cross
Cross-section of vertical MOS
sectional area at low voltage
Suitable for low voltage, high current applications
Terminals are readily available for connection with
metal layers: suitable for on-chip implementation of
DC-DC converters Cross-section of lateral MOS
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Different losses in converter circuit
Conduction loss:
■ Losses due to drain-source resistance of big power MOS
■ Conduction loss ∞ RDS_on of the power MOS∞ 1/ Die size.
2 ∆I 2
Pcond = RDS _ on * D * Iout +
12
Gate drive loss:
■ Losses due to charging/discharging the highly capacitive gate
node of the power MOS.
■ Gate driver loss ∞ Gate charge (Qg=Cg*Vin) ∞ Die size.
PGateDrive = (CGS + CGD ) * Vin * Fsw
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Different losses in converter circuit
Transition loss:
■ Losses across the power switch at the edge of transition.
■ tr and tf are the rise and fall time of the switch node
respectively.
■ Ipm and Ipp are the minimum and maximum peak value of
inductor current.
Ptran = 0.5 * Vin * Fsw * (t r * I pm + t f * I pp )
Drain-bulk capacitive switching loss:
■ Losses due to the parasitic drain-bulk capacitance of the
power MOS in the switch node.
1 2
PDB = CDB * Vin
2
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Different losses in converter circuit
Dead time loss:
■ Losses due to the conduction of body diode of power MOS
during dead-time.
■ VF is the diode forward voltage.
■ tD_rise and tD_fall are the dead time at rising and falling edge
respectively.
PDiode = VF * Iout * Fsw * (t D _ rise + t D _ fall )
Body diode reverse recovery loss:
■ Losses due to reverse recovery in the body diode of the low-
side power MOS .
■ Qrr is the reverse recover charge.
Prr = Vin * Fsw * Qrr
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Different losses in converter circuit
Inductor loss:
■ Loss due to the DC and AC resistance of the inductor.
2 ∆I 2
PInductor = Rdc * Iout + Rac *
12
Capacitor loss:
■ Loss due to the ESR of the capacitor.
∆I 2
PESR = RESR *
12
Controller loss:
■ Loss due to the quiescent current consumption in the
controller.
PController = Vin * Iq
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Trade-off in optimizing different losses
How to fix the size of power MOS in a particular technology?
■ Total power loss is minimum at the point where gate driver
loss and conduction loss is equal.
■ This sizing maximizes the power efficiency.
Optimal die size
Power dissipation (W)
Total loss
Gate driver loss
Conduction loss
Die size (mm2)
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Packaging issues
PVDD
Typical value of bond-wire Package +
LBONDWIRE*(di/dt)
inductance is 1.5 nH – 4.8 nH. Wafer
-
PMOS
For high speed converter (not Gate Driver
LBONDWIRE
L Vout
necessarily high frequency NMOS
RLOAD
converter), di/dt=1A/1nS. LBONDWIRE*(di/dt)
+
C
-
So, assuming 2 nH bond-wire PGND
inductance, supply bounce is 2 V!
Solution: Use of lead-less
package which eliminates the
supply bounce.
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Example of layout
NMOS
PMOS NMOS Driver
PMOS Driver
Controller
Layout of a 20MHz dc-dc buck converter in a 0.5 µm process.
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20 MHz DC-DC converter developed by IIT-
Kharagpur- An example
AVDD PVDD L VOUT
VFS1 SW
VIN CIN VFS2 VFB
+
− VTS1 VTEST,ANA
VTS2 VTEST,DIG C CBYPASS
AGND PGND
Typical application circuit
Die photograph
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20 MHz DC-DC converter developed by IIT-
Kharagpur- An example
PCB layout Evaluation board
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Acknowledgement
Prof. Amit Patra, Department of Electrical Engineering, IIT Kharagpur
Power Management Group, AVDL
Rakesh Babu
Asif Eqbal
Pradipta Patra
Ashis Maity
Srikanth Pam
Rupam Mukherjee
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Thank You
Power Management Group, AVLSI Design Lab, IIT-Kharagpur 51
References
Robert W. Erickson and Dragan Maksimovic, “Fundamentals of Power
Electronics,” Springer International Edition, 2006.
B. Lynch and K. Hesse, “Under the hood of low-voltage dc/dc converters,” in
Proc. Power Supply Design Seminar (SEM 1500), 2002.
Jens Ejury,“How to Compare the Figure Of Merit (FOM) of MOSFETs,” Infineon
Technologies Application Notes.
Donald Schelle, Jorge Castorena, “Buck Converter Design Demystified,”
Maxim Integrated Products.
Everett Rogers, “Understanding Buck-Boost Power Stages in Switch Mode
Power Supplies,” Application Report, Texas Instruments.
Power Management technique for multimedia mobile phones. , no. 1, April
2006, Available at www.edn.com.
J.M. Rivas, D. Jackson, O. Leitermann, A.D. Sagneri, Yehui Han, and D.J.
Perreault, .Design Considerations for Very High Frequency dc-dc Converters,.
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE, pp. 1.11,
18-22 June 2006.
Power Management Group, AVLSI Design Lab, IIT-Kharagpur 52
References
MIC2285 Datasheet, Micrel Inc., 8MHz PWM Synchronous Buck Regulator
with LDO Standby Mode, Available at ww.micrel.com/\_PDF/mic2285.pdf.
EP5362Q Datasheet, Enpirion, Inc., 600mA Synchronous Buck Regulators
with Integrated Inductor, Available at www.enpirion.com.
MIC2245 Datasheet, Micrel Inc., 4MHz PWM Synchronous Buck Regulator
with LDO Standby Mode, Available at www.micrel.com/PDF/mic2245.pdf.
MAX8460 Datasheet, Maxim Inc., 4MHz, 500mA Synchronous Step-Down
DC-DC Converters in Thin SOT and TDFN, Available at www.maxim-ic.com
TPS623XX Datasheet, Texas Instruments, 500-mA, 3MHz Synchronous
Step-Down Converters in chip scale package, Available at
www.focus.ti.com/lit/ds/symlink/tps62315.pdf.
S. Abedinpour, B. Bakkaloglu, and S. Kiaei, .A Multi-Stage Interleaved
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SiGe process,. Solid-State Circuits, 2006 IEEE International Conference
Digest of Technical Papers, pp. 1398.1407, Feb. 6-9, 2006.
Power Management Group, AVLSI Design Lab, IIT-Kharagpur 53
References
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Power Management Group, AVLSI Design Lab, IIT-Kharagpur 54
